)]}'
{
  "commit": "5f8eed067914d6e02ee27207e610ace801f1799b",
  "tree": "5ce39ede3af0f57438652b26e61fb14a591b1252",
  "parents": [
    "cdc562e8d46a46290f3002f3acf53a7436d16002"
  ],
  "author": {
    "name": "dineshannayya",
    "email": "dinesh.annayya@gmail.com",
    "time": "Fri Feb 25 17:54:10 2022 +0530"
  },
  "committer": {
    "name": "dineshannayya",
    "email": "dinesh.annayya@gmail.com",
    "time": "Fri Feb 25 17:54:10 2022 +0530"
  },
  "message": "spi flash file added\n",
  "tree_diff": [
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "e3c4b1bbc4218d5494fbce0f505073d94c58879f",
      "new_mode": 33261,
      "new_path": "verilog/dv/user_spi/flash1.hex"
    }
  ]
}