)]}'
{
  "commit": "2a4369669816f03976fa5b8bce1e94a6f53f2eae",
  "tree": "2135fca189a7d46265a3ac2ea9f6ab0faa963412",
  "parents": [
    "de1bbba534362c074ef978f3c962ba590a5bed9b"
  ],
  "author": {
    "name": "dineshannayya",
    "email": "dinesh.annayya@gmail.com",
    "time": "Mon Aug 22 18:21:54 2022 +0530"
  },
  "committer": {
    "name": "dineshannayya",
    "email": "dinesh.annayya@gmail.com",
    "time": "Mon Aug 22 18:21:54 2022 +0530"
  },
  "message": "arduino timer related clean-up\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c9f11b4322481f7a64ebbb96b6952e40f7839ec3",
      "old_mode": 33188,
      "old_path": "verilog/dv/agents/uart_agent.v",
      "new_id": "2b12d644c482b38baa89cfd0babda532b2ed5573",
      "new_mode": 33188,
      "new_path": "verilog/dv/agents/uart_agent.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "aa946e0e99c3f3e5395189b7ca755d268efd18b4",
      "new_mode": 33188,
      "new_path": "verilog/dv/arduino_timer_intr/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f38f333bf25b943a58f780bd319cd5f38dcd9ecb",
      "new_mode": 33188,
      "new_path": "verilog/dv/arduino_timer_intr/arduino_timer_intr.ino"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "d59053a1c5838289fee1af57ebfab3afffc1b8e0",
      "new_mode": 33188,
      "new_path": "verilog/dv/arduino_timer_intr/arduino_timer_intr.ino.cpp"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "5e423d55745410af9adf9ee6480665a035cdc9cb",
      "new_mode": 33188,
      "new_path": "verilog/dv/arduino_timer_intr/arduino_timer_intr_tb.v"
    },
    {
      "type": "modify",
      "old_id": "02ecb2a98f696d1a457a40b6a2234b1f31cb66ca",
      "old_mode": 33261,
      "old_path": "verilog/rtl/pinmux/src/pinmux_top.sv",
      "new_id": "22dce38ec8ed7bed9a48ce5163037394cb1bda67",
      "new_mode": 33261,
      "new_path": "verilog/rtl/pinmux/src/pinmux_top.sv"
    },
    {
      "type": "modify",
      "old_id": "ae981dc9c0b9b231fcee9c023cf2ad0ba44fe7f8",
      "old_mode": 33188,
      "old_path": "verilog/rtl/pinmux/src/timer_top.sv",
      "new_id": "127d62f8134807b07524012ddebde8d3812245d3",
      "new_mode": 33188,
      "new_path": "verilog/rtl/pinmux/src/timer_top.sv"
    },
    {
      "type": "modify",
      "old_id": "d3c9ec7cdf5752237e02e6e39fc1d4ba6a0278ec",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project_wrapper.v",
      "new_id": "e54e37a7dca97b0bdb415631fbe8c69e7d2cea0f",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
  ]
}