)]}'
{
  "commit": "cda14dc0670f9c3b6918b96556abf479038761fa",
  "tree": "873f63dfa88b38334c720a5dcfca0f73b37a88e6",
  "parents": [
    "d7d43bba84973010727afeb2088c7f804d29ff86"
  ],
  "author": {
    "name": "Sukru Uzun",
    "email": "sukru.uzun@procenne.com",
    "time": "Mon Mar 21 22:51:06 2022 +0300"
  },
  "committer": {
    "name": "Sukru Uzun",
    "email": "sukru.uzun@procenne.com",
    "time": "Mon Mar 21 22:51:06 2022 +0300"
  },
  "message": "update user_project utility files\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2e2532572edb193c3a1744425e25bda6cb7f6a90",
      "old_mode": 33188,
      "old_path": "gds/user_project_wrapper.gds",
      "new_id": "3b215fbbf4ac6d5eb7c3ace084f7f15783750bf7",
      "new_mode": 33188,
      "new_path": "gds/user_project_wrapper.gds"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a9e67b05d4531f68b4923cdac6ec01793026aec9",
      "new_mode": 33188,
      "new_path": "lef/user_project_wrapper.lef"
    },
    {
      "type": "modify",
      "old_id": "31face23e6f91871d47f53d3f59369d3377f4407",
      "old_mode": 33261,
      "old_path": "openlane/user_project_wrapper/config.tcl",
      "new_id": "dfc6d887678447bfb4a1be0764a5e13578c13dfb",
      "new_mode": 33261,
      "new_path": "openlane/user_project_wrapper/config.tcl"
    },
    {
      "type": "modify",
      "old_id": "66a273fdf15f18f6bc7b9066e9cae8c1646aeed1",
      "old_mode": 33188,
      "old_path": "openlane/user_project_wrapper/macro.cfg",
      "new_id": "920abe4aa27e261c90661cf0e354fe53ec5d8e50",
      "new_mode": 33188,
      "new_path": "openlane/user_project_wrapper/macro.cfg"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "1bf5c12c82966812b7a073dfb08a0b6b2da0e2b2",
      "new_mode": 33188,
      "new_path": "verilog/gl/trng_wb_wrapper.v"
    },
    {
      "type": "modify",
      "old_id": "d467c063f837fdd5621c6896f9289e0927230a3b",
      "old_mode": 33188,
      "old_path": "verilog/gl/user_proj_example.v",
      "new_id": "f63a7a4d9c355bddfce194e90e7ca6efcf08ed4f",
      "new_mode": 33188,
      "new_path": "verilog/gl/user_proj_example.v"
    },
    {
      "type": "modify",
      "old_id": "98801d08c4e067179150c80d1a460ce2782e7c7d",
      "old_mode": 33188,
      "old_path": "verilog/gl/user_project_wrapper.v",
      "new_id": "c0d7e6cdda743a23c639c10e129a7d9fd438cd98",
      "new_mode": 33188,
      "new_path": "verilog/gl/user_project_wrapper.v"
    },
    {
      "type": "modify",
      "old_id": "2190831d421cf7b6027bf51bd6ae6d712b6d4552",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project_wrapper.v",
      "new_id": "51fcb7d2cd3ed40d9aec1dd1778629f4eb0642a9",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
  ]
}