)]}'
{
  "commit": "809d63ad1ddbb130073b900b3d4d2f8a01257cf1",
  "tree": "e621f0457a4759fcf5a79b8e9df242cad691c62b",
  "parents": [
    "b8a6c411f392d570c67ea8c2dcb8cdd3ac2dbff7"
  ],
  "author": {
    "name": "Ali Imran",
    "email": "ali1120001@outlook.com",
    "time": "Sat Mar 19 10:47:53 2022 +0500"
  },
  "committer": {
    "name": "Ali Imran",
    "email": "ali1120001@outlook.com",
    "time": "Sat Mar 19 10:47:53 2022 +0500"
  },
  "message": "Imem Verilog added\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "cd620c26d1edcf3d3a1b9097d593bc2d285517b3",
      "old_mode": 33188,
      "old_path": "verilog/rtl/IMem_Interface.v",
      "new_id": "e8ad2fc49c3fbf5365b2452b10a97d663c57cdf8",
      "new_mode": 33188,
      "new_path": "verilog/rtl/IMem_Interface.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "fe885ed77f4dcb502495638c824366947b150fc4",
      "new_mode": 33188,
      "new_path": "verilog/rtl/sky130_sram_1kbyte_1rw1r_32x256_8.v"
    }
  ]
}