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# Created by write_sdc
# Sat Mar 19 18:28:33 2022
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current_design c0_system
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# Timing Constraints
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create_clock -name clk_g -period 20.0000 [get_ports {clk_g}]
set_clock_transition 0.1500 [get_clocks {clk_g}]
set_clock_uncertainty 0.2500 clk_g
set_propagated_clock [get_clocks {clk_g}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[0]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[10]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[11]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[12]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[13]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[14]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[15]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[16]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[17]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[18]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[19]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[1]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[20]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[21]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[22]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[23]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[24]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[25]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[26]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[27]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[28]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[29]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[2]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[30]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[31]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[3]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[4]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[5]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[6]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[7]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[8]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout0[9]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[0]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[10]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[11]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[12]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[13]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[14]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[15]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[16]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[17]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[18]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[19]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[1]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[20]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[21]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[22]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[23]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[24]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[25]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[26]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[27]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[28]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[29]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[2]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[30]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[31]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[3]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[4]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[5]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[6]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[7]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[8]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_dout1[9]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {rst_g}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {rx}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[0]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[10]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[11]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[12]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[13]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[14]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[15]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[16]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[17]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[18]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[19]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[1]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[20]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[21]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[22]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[23]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[24]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[25]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[26]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[27]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[28]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[29]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[2]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[30]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[31]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[3]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[4]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[5]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[6]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[7]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[8]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout0[9]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[0]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[10]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[11]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[12]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[13]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[14]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[15]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[16]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[17]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[18]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[19]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[1]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[20]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[21]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[22]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[23]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[24]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[25]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[26]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[27]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[28]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[29]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[2]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[30]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[31]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[3]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[4]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[5]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[6]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[7]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[8]}]
set_input_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_dout1[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[13]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[14]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[15]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[16]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[17]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[18]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[19]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[20]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[21]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[22]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[23]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[24]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[25]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[26]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[27]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[28]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[29]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[30]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[31]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr0[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[13]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[14]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[15]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[16]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[17]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[18]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[19]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[20]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[21]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[22]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[23]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[24]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[25]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[26]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[27]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[28]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[29]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[30]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[31]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_addr1[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_csb0}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_csb1}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[13]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[14]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[15]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[16]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[17]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[18]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[19]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[20]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[21]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[22]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[23]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[24]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[25]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[26]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[27]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[28]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[29]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[30]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[31]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_din0[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_web0}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_wmask0[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_wmask0[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_wmask0[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {bb_wmask0[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_gecerli}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[13]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[14]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[15]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[16]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[17]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[18]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[19]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[20]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[21]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[22]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[23]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[24]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[25]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[26]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[27]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[28]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[29]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[30]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[31]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[32]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[33]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[34]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[35]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[36]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[37]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_oeb[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[13]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[14]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[15]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[16]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[17]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[18]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[19]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[20]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[21]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[22]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[23]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[24]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[25]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[26]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[27]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[28]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[29]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[30]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[31]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {io_ps[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {tx}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr0[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_addr1[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_csb0}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_csb1}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[10]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[11]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[12]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[13]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[14]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[15]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[16]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[17]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[18]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[19]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[20]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[21]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[22]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[23]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[24]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[25]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[26]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[27]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[28]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[29]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[30]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[31]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[3]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[4]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[5]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[6]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[7]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[8]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_din0[9]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_web0}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_wmask0[0]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_wmask0[1]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_wmask0[2]}]
set_output_delay 4.0000 -clock [get_clocks {clk_g}] -add_delay [get_ports {vb_wmask0[3]}]
###############################################################################
# Environment
###############################################################################
set_load -pin_load 0.0334 [get_ports {bb_csb0}]
set_load -pin_load 0.0334 [get_ports {bb_csb1}]
set_load -pin_load 0.0334 [get_ports {bb_web0}]
set_load -pin_load 0.0334 [get_ports {io_gecerli}]
set_load -pin_load 0.0334 [get_ports {tx}]
set_load -pin_load 0.0334 [get_ports {vb_csb0}]
set_load -pin_load 0.0334 [get_ports {vb_csb1}]
set_load -pin_load 0.0334 [get_ports {vb_web0}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[31]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[30]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[29]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[28]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[27]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[26]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[25]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[24]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[23]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[22]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[21]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[20]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[19]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[18]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[17]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[16]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[15]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[14]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[13]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[12]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[11]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[10]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[9]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[8]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[7]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[6]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[5]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[4]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[3]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[2]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[1]}]
set_load -pin_load 0.0334 [get_ports {bb_addr0[0]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[31]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[30]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[29]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[28]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[27]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[26]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[25]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[24]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[23]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[22]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[21]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[20]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[19]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[18]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[17]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[16]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[15]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[14]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[13]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[12]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[11]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[10]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[9]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[8]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[7]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[6]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[5]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[4]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[3]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[2]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[1]}]
set_load -pin_load 0.0334 [get_ports {bb_addr1[0]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[31]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[30]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[29]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[28]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[27]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[26]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[25]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[24]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[23]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[22]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[21]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[20]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[19]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[18]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[17]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[16]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[15]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[14]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[13]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[12]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[11]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[10]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[9]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[8]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[7]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[6]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[5]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[4]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[3]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[2]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[1]}]
set_load -pin_load 0.0334 [get_ports {bb_din0[0]}]
set_load -pin_load 0.0334 [get_ports {bb_wmask0[3]}]
set_load -pin_load 0.0334 [get_ports {bb_wmask0[2]}]
set_load -pin_load 0.0334 [get_ports {bb_wmask0[1]}]
set_load -pin_load 0.0334 [get_ports {bb_wmask0[0]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[37]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[36]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[35]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[34]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[33]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[32]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[31]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[30]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[29]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[28]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[27]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[26]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[25]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[24]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[23]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[22]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[21]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[20]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[19]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[18]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[17]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[16]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[15]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[14]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[13]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[12]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[11]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[10]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[9]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[8]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[7]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[6]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[5]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[4]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[3]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[2]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[1]}]
set_load -pin_load 0.0334 [get_ports {io_oeb[0]}]
set_load -pin_load 0.0334 [get_ports {io_ps[31]}]
set_load -pin_load 0.0334 [get_ports {io_ps[30]}]
set_load -pin_load 0.0334 [get_ports {io_ps[29]}]
set_load -pin_load 0.0334 [get_ports {io_ps[28]}]
set_load -pin_load 0.0334 [get_ports {io_ps[27]}]
set_load -pin_load 0.0334 [get_ports {io_ps[26]}]
set_load -pin_load 0.0334 [get_ports {io_ps[25]}]
set_load -pin_load 0.0334 [get_ports {io_ps[24]}]
set_load -pin_load 0.0334 [get_ports {io_ps[23]}]
set_load -pin_load 0.0334 [get_ports {io_ps[22]}]
set_load -pin_load 0.0334 [get_ports {io_ps[21]}]
set_load -pin_load 0.0334 [get_ports {io_ps[20]}]
set_load -pin_load 0.0334 [get_ports {io_ps[19]}]
set_load -pin_load 0.0334 [get_ports {io_ps[18]}]
set_load -pin_load 0.0334 [get_ports {io_ps[17]}]
set_load -pin_load 0.0334 [get_ports {io_ps[16]}]
set_load -pin_load 0.0334 [get_ports {io_ps[15]}]
set_load -pin_load 0.0334 [get_ports {io_ps[14]}]
set_load -pin_load 0.0334 [get_ports {io_ps[13]}]
set_load -pin_load 0.0334 [get_ports {io_ps[12]}]
set_load -pin_load 0.0334 [get_ports {io_ps[11]}]
set_load -pin_load 0.0334 [get_ports {io_ps[10]}]
set_load -pin_load 0.0334 [get_ports {io_ps[9]}]
set_load -pin_load 0.0334 [get_ports {io_ps[8]}]
set_load -pin_load 0.0334 [get_ports {io_ps[7]}]
set_load -pin_load 0.0334 [get_ports {io_ps[6]}]
set_load -pin_load 0.0334 [get_ports {io_ps[5]}]
set_load -pin_load 0.0334 [get_ports {io_ps[4]}]
set_load -pin_load 0.0334 [get_ports {io_ps[3]}]
set_load -pin_load 0.0334 [get_ports {io_ps[2]}]
set_load -pin_load 0.0334 [get_ports {io_ps[1]}]
set_load -pin_load 0.0334 [get_ports {io_ps[0]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[12]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[11]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[10]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[9]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[8]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[7]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[6]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[5]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[4]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[3]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[2]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[1]}]
set_load -pin_load 0.0334 [get_ports {vb_addr0[0]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[12]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[11]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[10]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[9]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[8]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[7]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[6]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[5]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[4]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[3]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[2]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[1]}]
set_load -pin_load 0.0334 [get_ports {vb_addr1[0]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[31]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[30]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[29]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[28]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[27]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[26]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[25]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[24]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[23]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[22]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[21]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[20]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[19]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[18]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[17]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[16]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[15]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[14]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[13]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[12]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[11]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[10]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[9]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[8]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[7]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[6]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[5]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[4]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[3]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[2]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[1]}]
set_load -pin_load 0.0334 [get_ports {vb_din0[0]}]
set_load -pin_load 0.0334 [get_ports {vb_wmask0[3]}]
set_load -pin_load 0.0334 [get_ports {vb_wmask0[2]}]
set_load -pin_load 0.0334 [get_ports {vb_wmask0[1]}]
set_load -pin_load 0.0334 [get_ports {vb_wmask0[0]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {clk_g}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {rst_g}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {rx}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[31]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[30]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[29]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[28]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[27]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[26]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[25]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[24]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[23]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[22]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[21]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[20]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[19]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[18]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[17]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[16]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[15]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[14]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[13]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[12]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[11]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[10]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[9]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[8]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[7]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[6]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[5]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[4]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[3]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[2]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[1]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout0[0]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[31]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[30]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[29]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[28]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[27]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[26]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[25]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[24]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[23]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[22]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[21]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[20]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[19]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[18]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[17]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[16]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[15]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[14]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[13]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[12]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[11]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[10]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[9]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[8]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[7]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[6]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[5]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[4]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[3]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[2]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[1]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bb_dout1[0]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[31]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[30]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[29]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[28]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[27]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[26]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[25]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[24]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[23]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[22]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[21]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[20]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[19]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[18]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[17]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[16]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[15]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[14]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[13]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[12]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[11]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[10]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[9]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[8]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[7]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[6]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[5]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[4]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[3]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[2]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[1]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout0[0]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[31]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[30]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[29]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[28]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[27]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[26]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[25]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[24]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[23]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[22]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[21]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[20]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[19]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[18]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[17]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[16]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[15]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[14]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[13]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[12]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[11]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[10]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[9]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[8]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[7]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[6]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[5]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[4]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[3]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[2]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[1]}]
set_driving_cell -lib_cell sky130_fd_sc_hd__inv_2 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {vb_dout1[0]}]
set_timing_derate -early 0.9500
set_timing_derate -late 1.0500
###############################################################################
# Design Rules
###############################################################################
set_max_fanout 5.0000 [current_design]