)]}'
{
  "commit": "65afea9f33a88905cfb4b15d6e7412f2af06bdce",
  "tree": "1b045c929832d345c0467cb7b62d4c5ce8a2f437",
  "parents": [
    "2bf5b4338746cf6a799c7118cb86a6ed3d9acabd"
  ],
  "author": {
    "name": "Rameen Anwar",
    "email": "ramianwer1996@gmail.com",
    "time": "Fri Mar 18 06:03:37 2022 -0700"
  },
  "committer": {
    "name": "Rameen Anwar",
    "email": "ramianwer1996@gmail.com",
    "time": "Fri Mar 18 06:03:37 2022 -0700"
  },
  "message": "Placed modified RTL and Gate level netlist in respective folders\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8668e51e9d0991c60db5cd66dda1b520752099f0",
      "old_mode": 33188,
      "old_path": "verilog/gl/azadi_soc_top_caravel.v",
      "new_id": "6fc9a66320ebd714134c47d646d28d2155789eb4",
      "new_mode": 33188,
      "new_path": "verilog/gl/azadi_soc_top_caravel.v"
    },
    {
      "type": "modify",
      "old_id": "3585d6adf0f63164f277a0511cf43920a3dd1b6f",
      "old_mode": 33188,
      "old_path": "verilog/rtl/azadi_soc_top_caravel.v",
      "new_id": "4bddcf0b30bb629fcc5bc93a8fa65f9aaaff5d84",
      "new_mode": 33188,
      "new_path": "verilog/rtl/azadi_soc_top_caravel.v"
    },
    {
      "type": "modify",
      "old_id": "715d81235eefdd22ea6267182ee9ec23ef16201a",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project_wrapper.v",
      "new_id": "4ddd23bf3a479f0ee32f23772b2d66d80efe5898",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
  ]
}