diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz
index ff65c1c..35ccfa6 100644
--- a/gds/user_analog_project_wrapper.gds.gz
+++ b/gds/user_analog_project_wrapper.gds.gz
Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 7531757..3ad49ce 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
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 magic
 tech sky130A
-timestamp 1647316183
+timestamp 1644270303
 << nwell >>
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+rect 98150 7703 280657 7704
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+rect 17807 7281 279614 7300
 << viali >>
 rect 164500 338774 165766 339949
 rect 164481 331688 165747 332863
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 rect 164930 101789 165003 102964
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@@ -9436,19 +14487,6 @@
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@@ -10091,14 +15129,6 @@
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@@ -10157,17 +15158,17 @@
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+rect 11000 26000 276000 28000
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@@ -10335,8 +15333,6 @@
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@@ -10679,7 +15675,6 @@
 rect 157052 135000 159393 136391
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@@ -10728,7 +15716,7 @@
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@@ -10788,16 +15776,16 @@
 timestamp 1641017053
 transform 1 0 27511 0 1 45357
 box -460 -1085 31200 495
-use pll_full  pll_full_0
-timestamp 1644910320
-transform 1 0 24183 0 1 99593
-box -5794 -2690 26430 12835
+use pd  pd_5
+timestamp 1644268929
+transform 1 0 38673 0 1 170517
+box -215 -855 1685 810
 use divider  divider_3
-timestamp 1647119365
+timestamp 1644268929
 transform 1 0 31863 0 1 169542
 box -490 -235 4690 2150
 use divider  divider_0
-timestamp 1647119365
+timestamp 1644268929
 transform 1 0 246803 0 1 129340
 box -490 -235 4690 2150
 use divbuf  divbuf_25
@@ -10812,10 +15800,6 @@
 timestamp 1641017053
 transform 1 0 237976 0 1 143283
 box -460 -1085 31200 495
-use pd  pd_5
-timestamp 1646991908
-transform 1 0 38673 0 1 170517
-box -215 -855 1685 810
 use divbuf  divbuf_18
 timestamp 1641017053
 transform 1 0 30445 0 1 186973
@@ -10833,9 +15817,13 @@
 transform 1 0 30286 0 1 179927
 box -460 -1085 31200 495
 use pd  pd_4
-timestamp 1646991908
+timestamp 1644268929
 transform 1 0 36668 0 1 222858
 box -215 -855 1685 810
+use cp  cp_0
+timestamp 1640911461
+transform 1 0 21911 0 1 264642
+box -415 -1715 4690 2035
 use divbuf  divbuf_14
 timestamp 1641017053
 transform 1 0 31964 0 1 233669
@@ -10856,22 +15844,22 @@
 timestamp 1641017053
 transform 1 0 28673 0 1 263178
 box -460 -1085 31200 495
-use divider  divider_1
-timestamp 1647119365
-transform 1 0 250269 0 1 235475
-box -490 -235 4690 2150
 use ro_complete  ro_complete_0
-timestamp 1644910320
+timestamp 1644268929
 transform 1 0 242309 0 1 239846
 box -348 -5690 4661 1440
+use divider  divider_1
+timestamp 1644268929
+transform 1 0 250269 0 1 235475
+box -490 -235 4690 2150
+use divbuf  divbuf_21
+timestamp 1641017053
+transform 1 0 234867 0 1 263433
+box -460 -1085 31200 495
 use divbuf  divbuf_20
 timestamp 1641017053
 transform 1 0 234788 0 1 260967
 box -460 -1085 31200 495
-use cp  cp_0
-timestamp 1640911461
-transform 1 0 21911 0 1 264642
-box -415 -1715 4690 2035
 use divbuf  divbuf_10
 timestamp 1641017053
 transform 1 0 28832 0 1 268030
@@ -10880,10 +15868,6 @@
 timestamp 1641017053
 transform 1 0 28752 0 1 265644
 box -460 -1085 31200 495
-use divbuf  divbuf_21
-timestamp 1641017053
-transform 1 0 234867 0 1 263433
-box -460 -1085 31200 495
 use divbuf  divbuf_22
 timestamp 1641017053
 transform 1 0 234947 0 1 265819
@@ -10896,16 +15880,16 @@
 timestamp 1641017053
 transform 1 0 245858 0 1 309157
 box -460 -1085 31200 495
-use pll_full  pll_full_1
-timestamp 1644910320
-transform 1 0 31292 0 1 318138
-box -5794 -2690 26430 12835
 use divbuf  divbuf_5
 timestamp 1641017053
 transform 1 0 245938 0 1 311543
 box -460 -1085 31200 495
+use pll_full  pll_full_1
+timestamp 1644268929
+transform 1 0 31292 0 1 318138
+box -5794 -2690 26430 12835
 use ro_complete  ro_complete_1
-timestamp 1644910320
+timestamp 1644268929
 transform 1 0 247313 0 1 328719
 box -348 -5690 4661 1440
 use divbuf  divbuf_2
diff --git a/mag/user_analog_project_wrapper_bkp.mag b/mag/user_analog_project_wrapper_bkp2.mag
similarity index 68%
rename from mag/user_analog_project_wrapper_bkp.mag
rename to mag/user_analog_project_wrapper_bkp2.mag
index 3ad49ce..7531757 100644
--- a/mag/user_analog_project_wrapper_bkp.mag
+++ b/mag/user_analog_project_wrapper_bkp2.mag
@@ -1,6 +1,6 @@
 magic
 tech sky130A
-timestamp 1644270303
+timestamp 1647316183
 << nwell >>
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 rect 23497 264291 23832 264611
@@ -93,22 +93,6 @@
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@@ -117,22 +101,6 @@
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@@ -181,22 +149,6 @@
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@@ -205,22 +157,6 @@
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 << viali >>
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 rect 165003 101789 166269 102964
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 rect 164966 94290 166232 95465
 rect 164947 87204 166213 88379
 rect 164910 80802 166176 81977
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 rect 164930 101789 165003 102964
 rect 166269 101789 166351 102964
 rect 164930 101698 166351 101789
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 rect 164893 95465 166314 95548
 rect 164893 94290 164966 95465
 rect 166232 94290 166314 95465
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 rect 164793 117918 166059 119093
 rect 164902 109991 166168 111166
 rect 165003 101789 166269 102964
+rect 18819 98349 18869 98399
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 rect 164966 94290 166232 95465
 rect 164947 87204 166213 88379
 rect 164910 80802 166176 81977
@@ -13219,6 +8125,22 @@
 rect 164930 101789 165003 102964
 rect 166269 101789 166351 102964
 rect 164930 101698 166351 101789
+rect 18809 98399 18879 98409
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+rect 18809 97158 18879 97168
+rect 18809 97108 18819 97158
+rect 18869 97108 18879 97158
+rect 18809 97098 18879 97108
 rect 164893 95465 166314 95548
 rect 164893 94290 164966 95465
 rect 166232 94290 166314 95465
@@ -13821,6 +8743,10 @@
 rect 164793 117918 166059 119093
 rect 164902 109991 166168 111166
 rect 165003 101789 166269 102964
+rect 18819 98349 18869 98399
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 rect 164966 94290 166232 95465
 rect 164947 87204 166213 88379
 rect 164910 80802 166176 81977
@@ -14259,6 +9185,26 @@
 rect 164930 101789 165003 102964
 rect 166269 101789 166351 102964
 rect 164930 101698 166351 101789
+rect 18809 98399 18888 98414
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+rect 18818 98198 18897 98213
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+rect 18878 98147 18897 98198
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+rect 18803 97509 18882 97524
+rect 18803 97508 18813 97509
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+rect 18863 97458 18882 97509
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+rect 18809 97158 18888 97173
+rect 18809 97157 18819 97158
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+rect 18869 97107 18888 97158
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 rect 291170 95715 292400 98115
 rect 164893 95465 166314 95548
 rect 164893 94290 164966 95465
@@ -14285,14 +9231,17 @@
 rect 280813 73748 281123 75451
 rect 282980 73748 292400 75451
 rect 280813 73656 292400 73748
-rect 280813 73516 287932 73656
+rect 280813 73527 288755 73656
+rect 280813 73516 286531 73527
 rect 291170 73415 292400 73656
 rect 164819 70727 166240 70810
 rect 164819 69552 164892 70727
 rect 166158 69552 166240 70727
-rect 291170 70535 292400 70815
 rect 164819 69461 166240 69552
-rect 287095 68642 292400 70535
+rect 287067 70535 288755 70545
+rect 291170 70535 292400 70815
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 rect 291170 68415 292400 68642
 rect 164745 64732 166166 64815
 rect 164745 63557 164818 64732
@@ -14487,6 +9436,19 @@
 rect 164793 117918 166059 119093
 rect 164902 109991 166168 111166
 rect 165003 101789 166269 102964
+rect 18818 98349 18819 98398
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+rect 18818 97107 18869 97108
 rect 164966 94290 166232 95465
 rect 164947 87204 166213 88379
 rect 164910 80802 166176 81977
@@ -15129,6 +10091,14 @@
 rect 166059 117918 166831 119093
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 rect 164365 116868 166882 117775
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 rect 164365 111166 167036 112245
 rect 164365 109991 164902 111166
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 rect 166269 101789 167036 102964
 rect 164365 101597 167036 101789
 rect 164365 100690 167087 101597
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 rect 164365 96615 166665 100690
 rect 164365 95465 166831 96615
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 rect 164365 94290 164966 95465
 rect 166232 94290 166831 95465
 rect 164365 94193 166831 94290
@@ -15158,17 +10157,17 @@
 rect 166176 80802 166665 81977
 rect 164365 80650 166665 80802
 rect 164363 75873 166716 80650
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+rect 7143 75802 189636 75873
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 rect 7143 75451 283186 75789
 rect 7143 73748 281123 75451
 rect 282980 73748 283186 75451
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 rect 278502 73408 283186 73413
 rect 164363 71584 166716 73379
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 rect 164231 70727 166716 71584
 rect 164231 69552 164892 70727
 rect 166158 69552 166716 70727
@@ -15244,7 +10243,10 @@
 rect 39396 28000 40707 29869
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 rect 164365 28000 166665 30313
-rect 11000 26000 276000 28000
+rect 11000 27979 99535 28000
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+rect 11000 26000 176227 27979
+rect 95970 25823 107673 26000
 rect 164365 22332 166665 26000
 rect 163820 21815 166993 22332
 rect 163820 20640 164657 21815
@@ -15333,6 +10335,8 @@
 rect 234435 138541 234651 138747
 rect 244789 130459 244953 130625
 rect 244999 130457 245163 130623
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+rect 21893 112672 22049 112824
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 rect 24430 45535 24554 45659
 rect 24694 45538 24818 45662
@@ -15675,6 +10679,7 @@
 rect 157052 135000 159393 136391
 rect 232121 135000 234728 138538
 rect 11000 133000 276000 135000
+rect 21168 115242 22352 133000
 rect 157052 131451 159393 133000
 rect 157052 128209 160042 131451
 rect 244660 130625 245186 133000
@@ -15688,6 +10693,13 @@
 rect 157052 120197 159393 128188
 rect 157052 116893 159559 120197
 rect 157052 116868 159557 116893
+rect 21224 112825 22229 115242
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 rect 157052 112245 159393 116868
 rect 157052 108941 159764 112245
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@@ -15716,7 +10728,7 @@
 rect 156779 51797 159393 53422
 rect 156720 50746 159393 51797
 rect 157052 50000 159393 50746
-rect 11000 48000 276000 50000
+rect 11000 48000 176227 50000
 rect 22603 45664 25872 48000
 rect 157052 45727 159393 48000
 rect 22603 45662 24978 45664
@@ -15776,16 +10788,16 @@
 timestamp 1641017053
 transform 1 0 27511 0 1 45357
 box -460 -1085 31200 495
-use pd  pd_5
-timestamp 1644268929
-transform 1 0 38673 0 1 170517
-box -215 -855 1685 810
+use pll_full  pll_full_0
+timestamp 1644910320
+transform 1 0 24183 0 1 99593
+box -5794 -2690 26430 12835
 use divider  divider_3
-timestamp 1644268929
+timestamp 1647119365
 transform 1 0 31863 0 1 169542
 box -490 -235 4690 2150
 use divider  divider_0
-timestamp 1644268929
+timestamp 1647119365
 transform 1 0 246803 0 1 129340
 box -490 -235 4690 2150
 use divbuf  divbuf_25
@@ -15800,6 +10812,10 @@
 timestamp 1641017053
 transform 1 0 237976 0 1 143283
 box -460 -1085 31200 495
+use pd  pd_5
+timestamp 1646991908
+transform 1 0 38673 0 1 170517
+box -215 -855 1685 810
 use divbuf  divbuf_18
 timestamp 1641017053
 transform 1 0 30445 0 1 186973
@@ -15817,13 +10833,9 @@
 transform 1 0 30286 0 1 179927
 box -460 -1085 31200 495
 use pd  pd_4
-timestamp 1644268929
+timestamp 1646991908
 transform 1 0 36668 0 1 222858
 box -215 -855 1685 810
-use cp  cp_0
-timestamp 1640911461
-transform 1 0 21911 0 1 264642
-box -415 -1715 4690 2035
 use divbuf  divbuf_14
 timestamp 1641017053
 transform 1 0 31964 0 1 233669
@@ -15844,22 +10856,22 @@
 timestamp 1641017053
 transform 1 0 28673 0 1 263178
 box -460 -1085 31200 495
-use ro_complete  ro_complete_0
-timestamp 1644268929
-transform 1 0 242309 0 1 239846
-box -348 -5690 4661 1440
 use divider  divider_1
-timestamp 1644268929
+timestamp 1647119365
 transform 1 0 250269 0 1 235475
 box -490 -235 4690 2150
-use divbuf  divbuf_21
-timestamp 1641017053
-transform 1 0 234867 0 1 263433
-box -460 -1085 31200 495
+use ro_complete  ro_complete_0
+timestamp 1644910320
+transform 1 0 242309 0 1 239846
+box -348 -5690 4661 1440
 use divbuf  divbuf_20
 timestamp 1641017053
 transform 1 0 234788 0 1 260967
 box -460 -1085 31200 495
+use cp  cp_0
+timestamp 1640911461
+transform 1 0 21911 0 1 264642
+box -415 -1715 4690 2035
 use divbuf  divbuf_10
 timestamp 1641017053
 transform 1 0 28832 0 1 268030
@@ -15868,6 +10880,10 @@
 timestamp 1641017053
 transform 1 0 28752 0 1 265644
 box -460 -1085 31200 495
+use divbuf  divbuf_21
+timestamp 1641017053
+transform 1 0 234867 0 1 263433
+box -460 -1085 31200 495
 use divbuf  divbuf_22
 timestamp 1641017053
 transform 1 0 234947 0 1 265819
@@ -15880,16 +10896,16 @@
 timestamp 1641017053
 transform 1 0 245858 0 1 309157
 box -460 -1085 31200 495
+use pll_full  pll_full_1
+timestamp 1644910320
+transform 1 0 31292 0 1 318138
+box -5794 -2690 26430 12835
 use divbuf  divbuf_5
 timestamp 1641017053
 transform 1 0 245938 0 1 311543
 box -460 -1085 31200 495
-use pll_full  pll_full_1
-timestamp 1644268929
-transform 1 0 31292 0 1 318138
-box -5794 -2690 26430 12835
 use ro_complete  ro_complete_1
-timestamp 1644268929
+timestamp 1644910320
 transform 1 0 247313 0 1 328719
 box -348 -5690 4661 1440
 use divbuf  divbuf_2
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index ebccc94..b7fa192 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -106,3469 +106,2971 @@
 + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
 + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
 + wbs_stb_i wbs_we_i
-C0 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C1 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
-C2 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
-C3 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
-C4 divbuf_3/OUT divbuf_3/OUT4 1.11fF
-C5 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
-C6 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
-C7 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C8 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
-C9 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF
-C10 divider_2/tspc_1/Q divider_2/tspc_0/Z3 0.45fF
-C11 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
-C12 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
-C13 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
-C14 divbuf_8/IN divbuf_8/OUT5 0.00fF
-C15 cp_0/upbar cp_0/down 0.02fF
-C16 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
-C17 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
-C18 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
-C19 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF
-C20 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
-C21 divider_0/mc2 divider_0/and_0/OUT 0.05fF
-C22 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
-C23 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C24 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
-C25 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z2 0.11fF
-C26 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C27 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/divider_0/clk 1.36fF
-C28 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
-C29 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
-C30 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
-C31 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF
-C32 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF
-C33 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF
-C34 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z1 0.03fF
-C35 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
-C36 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
-C37 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
-C38 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
-C39 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
-C40 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C41 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C42 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_1/Q 0.45fF
-C43 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C44 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
-C45 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
-C46 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF
-C47 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF
-C48 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
-C49 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
-C50 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
-C51 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
-C52 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
-C53 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C54 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
-C55 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
-C56 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
-C57 io_clamp_low[0] io_analog[4] 0.53fF
-C58 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
-C59 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
-C60 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
-C61 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
-C62 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
-C63 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C64 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
-C65 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C66 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/A 0.80fF
-C67 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/divider_0/clk 1.46fF
-C68 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF
-C69 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF
-C70 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF
-C71 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/clk 0.05fF
-C72 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
-C73 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar1 0.11fF
-C74 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
-C75 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C76 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
-C77 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
-C78 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
-C79 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
-C80 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
-C81 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
-C82 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
-C83 divbuf_13/IN divbuf_13/OUT5 0.00fF
-C84 divbuf_5/OUT divbuf_6/OUT 3.23fF
-C85 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
-C86 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
-C87 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
-C88 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C89 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
-C90 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C91 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.00fF
-C92 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF
-C93 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF
-C94 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C95 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
-C96 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
-C97 divider_0/nor_1/B divider_0/tspc_0/Z2 0.40fF
-C98 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF
-C99 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C100 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C101 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
-C102 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
-C103 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
-C104 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_1/Q 0.45fF
-C105 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C106 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
-C107 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
-C108 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
-C109 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
-C110 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
-C111 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
-C112 divider_2/tspc_1/Z1 divider_2/nor_0/B 0.03fF
-C113 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
-C114 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C115 divbuf_2/OUT divbuf_2/OUT3 0.26fF
-C116 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
-C117 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
-C118 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C119 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/clk 0.01fF
-C120 divbuf_6/OUT divbuf_6/OUT3 0.26fF
-C121 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
-C122 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
-C123 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
-C124 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
-C125 divider_2/nor_1/B divider_2/and_0/B 0.29fF
-C126 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
-C127 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C128 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
-C129 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
-C130 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
-C131 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
-C132 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
-C133 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
-C134 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
-C135 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
-C136 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
-C137 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
-C138 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/OUT2 0.42fF
-C139 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
-C140 divbuf_18/OUT4 divbuf_18/OUT3 5.16fF
-C141 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
-C142 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
-C143 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF
-C144 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF
-C145 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
-C146 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
-C147 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
-C148 divbuf_16/OUT2 divbuf_16/a_492_n240# 0.42fF
-C149 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
-C150 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
-C151 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
-C152 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
-C153 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
-C154 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C155 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C156 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
-C157 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
-C158 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
-C159 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
-C160 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
-C161 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C162 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
-C163 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
-C164 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
-C165 divbuf_4/OUT divbuf_4/OUT2 0.06fF
-C166 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
-C167 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
-C168 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C169 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C170 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C171 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
-C172 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
-C173 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
-C174 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C175 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
-C176 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
-C177 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
-C178 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C179 divider_0/tspc_1/Z2 divider_0/tspc_1/a_630_n680# 0.01fF
-C180 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C181 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/clk 0.01fF
-C182 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
-C183 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
-C184 divbuf_15/OUT divbuf_15/OUT3 0.26fF
-C185 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
-C186 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
-C187 divbuf_16/OUT divbuf_16/OUT2 0.06fF
-C188 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
-C189 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
-C190 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
-C191 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
-C192 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
-C193 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
-C194 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
-C195 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT 0.00fF
-C196 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C197 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
-C198 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C199 filter_0/a_4216_n2998# filter_0/v 0.36fF
-C200 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z4 0.65fF
-C201 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C202 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C203 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
-C204 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
-C205 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
-C206 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
-C207 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
-C208 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
-C209 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C210 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
-C211 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DIV 0.04fF
-C212 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C213 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/clk 0.01fF
-C214 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
-C215 filter_0/v divbuf_25/OUT3 0.26fF
-C216 io_clamp_low[1] io_clamp_high[1] 0.53fF
-C217 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C218 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
-C219 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
-C220 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
-C221 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
-C222 pd_1/tspc_r_0/Qbar1 pd_1/R 0.01fF
-C223 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C224 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C225 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
-C226 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF
-C227 divbuf_0/OUT divbuf_0/OUT2 0.06fF
-C228 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF
-C229 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_0/B 0.03fF
-C230 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF
-C231 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C232 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C233 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
-C234 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C235 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
-C236 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
-C237 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
-C238 divbuf_1/OUT5 divbuf_1/IN 0.00fF
-C239 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF
-C240 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
-C241 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C242 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z2 0.23fF
-C243 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/clk 0.29fF
-C244 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
-C245 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
-C246 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
-C247 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
-C248 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.35fF
-C249 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
-C250 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
-C251 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
-C252 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF
-C253 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C254 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
-C255 pd_0/DOWN pd_0/R 0.36fF
-C256 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
-C257 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
-C258 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
-C259 pd_1/R pd_1/and_pd_0/Z1 0.02fF
-C260 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
-C261 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
-C262 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
-C263 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
-C264 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
-C265 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
-C266 divbuf_25/OUT2 divbuf_25/a_492_n240# 0.42fF
-C267 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
-C268 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C269 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_1/B 0.47fF
-C270 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
-C271 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C272 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C273 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF
-C274 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C275 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
-C276 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C277 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C278 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
-C279 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
-C280 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
-C281 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
-C282 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT5 0.02fF
-C283 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C284 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
-C285 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
-C286 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
-C287 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
-C288 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
-C289 divider_2/tspc_1/Z3 divider_2/nor_0/B 0.38fF
-C290 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF
-C291 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
-C292 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
-C293 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C294 divbuf_15/OUT2 divbuf_15/OUT 0.06fF
-C295 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
-C296 divbuf_2/OUT divbuf_2/OUT5 43.38fF
-C297 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF
-C298 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF
-C299 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z1 0.01fF
-C300 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/clk 0.01fF
-C301 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/A 1.21fF
-C302 divbuf_15/OUT3 divbuf_15/OUT5 0.01fF
-C303 divider_0/nor_0/A divider_0/and_0/A 0.01fF
-C304 divbuf_6/OUT divbuf_6/OUT5 43.38fF
-C305 divbuf_3/IN divbuf_3/OUT5 0.00fF
-C306 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF
-C307 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C308 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C309 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
-C310 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF
-C311 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_0/B 0.03fF
-C312 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
-C313 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C314 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C315 divider_2/prescaler_0/Out divider_2/clk 0.51fF
-C316 divbuf_16/OUT4 divbuf_16/OUT3 5.16fF
-C317 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Qbar1 0.30fF
-C318 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
-C319 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
-C320 pd_1/DOWN pd_1/R 0.36fF
-C321 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
-C322 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
-C323 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
-C324 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/divider_0/clk 1.46fF
-C325 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
-C326 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
-C327 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
-C328 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
-C329 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
-C330 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF
-C331 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF
-C332 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.29fF
-C333 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
-C334 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
-C335 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
-C336 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C337 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C338 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C339 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C340 divider_1/mc2 divider_1/and_0/A 0.16fF
-C341 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
-C342 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
-C343 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
-C344 divider_2/nor_0/B divider_2/and_0/B 0.31fF
-C345 divider_2/tspc_0/Z3 divider_2/Out 0.05fF
-C346 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
-C347 divider_0/tspc_0/Z3 divider_0/tspc_1/Q 0.45fF
-C348 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C349 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
-C350 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF
-C351 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF
-C352 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_1/B 0.22fF
-C353 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
-C354 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
-C355 divider_0/nor_0/B divider_0/tspc_0/Z2 0.20fF
-C356 divbuf_4/OUT divbuf_4/OUT4 1.11fF
-C357 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/B 0.08fF
-C358 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C359 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
-C360 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT2 1.37fF
-C361 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF
-C362 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z1 0.01fF
-C363 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C364 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
-C365 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
-C366 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
-C367 cp_0/a_10_n50# cp_0/vbias 0.19fF
-C368 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z4 0.04fF
-C369 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
-C370 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
-C371 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
-C372 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C373 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
-C374 divider_0/tspc_1/Z2 divider_0/nor_0/B 0.30fF
-C375 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF
-C376 divbuf_15/OUT divbuf_15/OUT5 43.38fF
-C377 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
-C378 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
-C379 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
-C380 divider_1/tspc_2/Q divider_1/nor_0/B 0.22fF
-C381 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
-C382 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
-C383 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
-C384 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
-C385 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
-C386 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
-C387 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
-C388 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
-C389 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
-C390 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT2 0.02fF
-C391 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C392 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C393 filter_0/a_4216_n5230# filter_0/v 0.91fF
-C394 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C395 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF
-C396 divbuf_15/OUT2 divbuf_15/OUT5 0.02fF
-C397 divbuf_14/OUT divbuf_14/OUT4 1.11fF
-C398 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
-C399 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
-C400 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
-C401 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C402 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF
-C403 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/clk 0.01fF
-C404 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
-C405 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
-C406 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF
-C407 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
-C408 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
-C409 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
-C410 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF
-C411 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
-C412 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
-C413 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
-C414 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
-C415 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
-C416 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z3 0.09fF
-C417 pd_1/tspc_r_1/Z2 pd_1/REF 0.19fF
-C418 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/z5 0.11fF
-C419 divbuf_0/OUT divbuf_0/OUT3 0.26fF
-C420 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C421 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
-C422 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
-C423 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.04fF
-C424 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_0/B 0.38fF
-C425 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C426 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C427 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/divider_0/clk 1.46fF
-C428 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C429 divbuf_14/OUT5 divbuf_14/a_492_n240# 0.01fF
-C430 divider_0/tspc_1/Q divider_0/tspc_0/Z2 0.14fF
-C431 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
-C432 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF
-C433 divider_2/tspc_1/Q divider_2/tspc_0/a_630_n680# 0.01fF
-C434 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
-C435 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
-C436 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
-C437 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
-C438 divbuf_20/IN divbuf_20/OUT5 0.00fF
-C439 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF
-C440 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
-C441 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
-C442 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
-C443 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C444 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
-C445 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
-C446 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
-C447 cp_0/a_1710_n2840# cp_0/out 0.61fF
-C448 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
-C449 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
-C450 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
-C451 divbuf_4/OUT divbuf_3/OUT 2.71fF
-C452 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
-C453 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C454 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C455 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C456 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
-C457 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z2 0.19fF
-C458 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C459 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C460 divbuf_17/a_492_n240# divbuf_17/OUT2 0.42fF
-C461 divider_0/and_0/OUT divider_0/clk 0.04fF
-C462 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
-C463 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF
-C464 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C465 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
-C466 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT 0.26fF
-C467 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT5 20.26fF
-C468 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
-C469 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C470 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
-C471 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
-C472 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
-C473 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
-C474 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
-C475 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF
-C476 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
-C477 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
-C478 divbuf_16/OUT5 divbuf_16/IN 0.00fF
-C479 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
-C480 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
-C481 divbuf_6/OUT divbuf_7/OUT 2.98fF
-C482 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C483 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
-C484 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF
-C485 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C486 divbuf_19/OUT4 divbuf_19/OUT 1.11fF
-C487 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
-C488 divider_1/nor_1/B divider_1/tspc_1/Q 0.22fF
-C489 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
-C490 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
-C491 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
-C492 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_0/B 0.38fF
-C493 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C494 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C495 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
-C496 divider_1/nor_0/A divider_1/and_0/A 0.01fF
-C497 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
-C498 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT2 0.06fF
-C499 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
-C500 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
-C501 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C502 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
-C503 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
-C504 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
-C505 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF
-C506 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C507 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF
-C508 divbuf_3/OUT divbuf_3/OUT2 0.06fF
-C509 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C510 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
-C511 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C512 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
-C513 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
-C514 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C515 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
-C516 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
-C517 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C518 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C519 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C520 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
-C521 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
-C522 divbuf_22/IN divbuf_22/OUT5 0.00fF
-C523 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
-C524 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
-C525 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C526 divider_0/tspc_2/Q divider_0/tspc_1/Z1 0.01fF
-C527 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
-C528 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C529 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C530 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_1/B 0.22fF
-C531 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C532 divbuf_5/OUT divbuf_5/OUT2 0.06fF
-C533 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
-C534 divider_0/nor_0/B divider_0/and_0/A 0.26fF
-C535 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
-C536 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C537 divbuf_16/OUT2 divbuf_16/OUT3 1.37fF
-C538 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
-C539 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF
-C540 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF
-C541 pd_0/R pd_0/UP 0.45fF
-C542 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
-C543 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
-C544 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
-C545 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C546 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
-C547 pll_full_1/filter_0/a_4216_n5230# pll_full_1/divider_0/clk 1.58fF
-C548 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divbuf_0/IN 0.05fF
-C549 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
-C550 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C551 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C552 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF
-C553 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/clk 0.11fF
-C554 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z3 0.09fF
-C555 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
-C556 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C557 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
-C558 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
-C559 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF
-C560 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C561 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
-C562 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
-C563 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
-C564 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
-C565 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
-C566 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
-C567 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT4 5.16fF
-C568 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
-C569 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
-C570 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z2 0.14fF
-C571 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.01fF
-C572 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C573 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF
-C574 pll_full_1/ro_complete_0/a2 pll_full_1/divider_0/clk 0.11fF
-C575 divbuf_14/IN divbuf_14/OUT5 0.00fF
-C576 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
-C577 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
-C578 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.31fF
-C579 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF
-C580 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF
-C581 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/a_492_n240# 0.42fF
-C582 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
-C583 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
-C584 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C585 divider_0/and_0/A divider_0/and_0/B 0.18fF
-C586 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C587 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
-C588 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_740_n680# 0.21fF
-C589 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
-C590 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C591 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
-C592 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
-C593 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
-C594 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
-C595 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF
-C596 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
-C597 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
-C598 divbuf_9/IN divbuf_9/OUT5 0.00fF
-C599 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT4 20.26fF
-C600 divbuf_0/OUT divbuf_0/OUT4 1.11fF
-C601 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF
-C602 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C603 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.51fF
-C604 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C605 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/divider_0/clk 1.58fF
-C606 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
-C607 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF
-C608 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
-C609 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
-C610 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF
-C611 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C612 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
-C613 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
-C614 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
-C615 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
-C616 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
-C617 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF
-C618 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C619 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C620 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
-C621 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
-C622 divider_2/mc2 divider_2/and_0/A 0.16fF
-C623 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C624 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
-C625 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
-C626 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C627 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
-C628 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
-C629 divbuf_2/IN divbuf_2/OUT5 0.00fF
-C630 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C631 divbuf_14/OUT divbuf_14/OUT2 0.06fF
-C632 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
-C633 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C634 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C635 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C636 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
-C637 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
-C638 pll_full_1/cp_0/a_1710_0# pll_full_1/pd_0/DOWN 0.04fF
-C639 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
-C640 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
-C641 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C642 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
-C643 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
-C644 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C645 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
-C646 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
-C647 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
-C648 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
-C649 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
-C650 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C651 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
-C652 divider_1/and_0/OUT divider_1/clk 0.04fF
-C653 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
-C654 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
-C655 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
-C656 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
-C657 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
-C658 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
-C659 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C660 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
-C661 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C662 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C663 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF
-C664 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF
-C665 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/clk 0.11fF
-C666 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
-C667 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.51fF
-C668 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C669 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
-C670 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
-C671 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
-C672 io_clamp_high[2] io_analog[6] 0.53fF
-C673 divbuf_18/OUT4 divbuf_18/OUT5 20.26fF
-C674 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
-C675 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF
-C676 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
-C677 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C678 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C679 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
-C680 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
-C681 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
-C682 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
-C683 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C684 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
-C685 pll_full_1/pd_0/REF pll_full_1/divbuf_1/OUT5 0.00fF
-C686 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C687 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C688 divbuf_19/a_492_n240# divbuf_19/IN 0.13fF
-C689 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
-C690 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
-C691 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
-C692 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
-C693 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
-C694 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
-C695 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
-C696 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
-C697 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT4 1.11fF
-C698 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
-C699 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
-C700 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
-C701 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
-C702 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF
-C703 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
-C704 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
-C705 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C706 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C707 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/divider_0/clk 1.46fF
-C708 divbuf_5/OUT divbuf_5/OUT4 1.11fF
-C709 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C710 pll_full_1/pd_0/REF pll_full_1/pd_0/R 0.61fF
-C711 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C712 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
-C713 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
-C714 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
-C715 divider_1/nor_0/B divider_1/and_0/A 0.26fF
-C716 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
-C717 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
-C718 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
-C719 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
-C720 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
-C721 divider_2/nor_0/A divider_2/and_0/B 0.08fF
-C722 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
-C723 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
-C724 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
-C725 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
-C726 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C727 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C728 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/clk 0.51fF
-C729 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF
-C730 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
-C731 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
-C732 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
-C733 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
-C734 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/UP 0.03fF
-C735 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
-C736 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
-C737 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Qbar1 0.12fF
-C738 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C739 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C740 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
-C741 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
-C742 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
-C743 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
-C744 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
-C745 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
-C746 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_0/B 0.18fF
-C747 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z4 0.12fF
-C748 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C749 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
-C750 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
-C751 divider_0/mc2 divider_0/and_0/A 0.16fF
-C752 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
-C753 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C754 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF
-C755 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/clk 0.11fF
-C756 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
-C757 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
-C758 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
-C759 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
-C760 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
-C761 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
-C762 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
-C763 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C764 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
-C765 divider_1/and_0/A divider_1/and_0/B 0.18fF
-C766 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
-C767 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
-C768 pd_1/tspc_r_1/Qbar pd_1/UP 0.21fF
-C769 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C770 divider_2/tspc_0/a_630_n680# divider_2/Out 0.04fF
-C771 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
-C772 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
-C773 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
-C774 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C775 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
-C776 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C777 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
-C778 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_0/B 0.02fF
-C779 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z4 0.15fF
-C780 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C781 divbuf_1/OUT divbuf_1/OUT4 1.11fF
-C782 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
-C783 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
-C784 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C785 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
-C786 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
-C787 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF
-C788 divbuf_7/OUT divbuf_7/OUT3 0.26fF
-C789 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
-C790 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
-C791 divider_1/mc2 divider_1/nor_1/B 0.15fF
-C792 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
-C793 filter_0/v divbuf_25/a_492_n240# 0.00fF
-C794 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
-C795 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF
-C796 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF
-C797 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C798 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
-C799 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
-C800 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C801 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
-C802 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
-C803 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF
-C804 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
-C805 divider_0/tspc_2/Q divider_0/nor_0/B 0.22fF
-C806 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
-C807 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
-C808 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF
-C809 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/Z3 0.05fF
-C810 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z2 0.16fF
-C811 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C812 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C813 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/clk 0.14fF
-C814 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.78fF
-C815 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
-C816 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
-C817 divider_1/nor_1/B divider_1/tspc_0/Z1 0.03fF
-C818 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
-C819 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF
-C820 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/UP 0.21fF
-C821 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
-C822 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
-C823 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
-C824 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
-C825 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C826 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
-C827 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
-C828 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
-C829 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
-C830 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
-C831 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
-C832 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/a_492_n240# 0.01fF
-C833 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
-C834 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF
-C835 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
-C836 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
-C837 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
-C838 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C839 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
-C840 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
-C841 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
-C842 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF
-C843 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF
-C844 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
-C845 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C846 divbuf_16/OUT divbuf_16/a_492_n240# 0.00fF
-C847 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
-C848 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
-C849 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z3 0.65fF
-C850 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_0/B 0.02fF
-C851 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
-C852 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C853 filter_0/v divbuf_25/OUT5 43.38fF
-C854 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
-C855 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
-C856 pd_1/tspc_r_1/Z2 pd_1/R 0.21fF
-C857 divbuf_19/OUT divbuf_19/OUT2 0.06fF
-C858 io_clamp_low[1] io_analog[5] 0.53fF
-C859 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C860 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C861 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z4 0.15fF
-C862 pll_full_1/divbuf_0/IN pll_full_1/divider_0/nor_1/B 0.27fF
-C863 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C864 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
-C865 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
-C866 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
-C867 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
-C868 pll_full_1/cp_0/a_1710_0# pll_full_1/cp_0/down 0.32fF
-C869 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C870 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF
-C871 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
-C872 divbuf_19/a_492_n240# divbuf_19/OUT 0.00fF
-C873 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
-C874 divider_1/nor_1/B divider_1/tspc_0/Z3 0.38fF
-C875 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
-C876 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
-C877 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF
-C878 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C879 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z2 0.16fF
-C880 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C881 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C882 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
-C883 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
-C884 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
-C885 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
-C886 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
-C887 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
-C888 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
-C889 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
-C890 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
-C891 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
-C892 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C893 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C894 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
-C895 divider_2/nor_1/B divider_2/mc2 0.15fF
-C896 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
-C897 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
-C898 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
-C899 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
-C900 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/UP 0.03fF
-C901 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C902 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
-C903 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C904 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.21fF
-C905 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
-C906 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
-C907 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
-C908 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
-C909 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
-C910 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C911 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF
-C912 divider_2/nor_1/B divider_2/tspc_0/Z2 0.40fF
-C913 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
-C914 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
-C915 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
-C916 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
-C917 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C918 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
-C919 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
-C920 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
-C921 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C922 divider_2/nor_1/B divider_2/tspc_0/Z4 0.22fF
-C923 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF
-C924 divider_1/tspc_1/Z1 divider_1/nor_0/B 0.03fF
-C925 divider_1/nor_1/B divider_1/tspc_0/Z2 0.40fF
-C926 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
-C927 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C928 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
-C929 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
-C930 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/a_492_n240# 0.00fF
-C931 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
-C932 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
-C933 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
-C934 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
-C935 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
-C936 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
-C937 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C938 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF
-C939 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
-C940 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C941 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C942 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF
-C943 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C944 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
-C945 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
-C946 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
-C947 divbuf_10/IN divbuf_10/OUT5 0.00fF
-C948 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C949 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C950 divider_1/mc2 divider_1/and_0/out1 0.06fF
-C951 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF
-C952 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
-C953 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
-C954 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
-C955 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
-C956 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
-C957 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
-C958 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
-C959 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
-C960 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C961 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF
-C962 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF
-C963 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
-C964 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C965 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
-C966 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C967 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C968 pll_full_1/ro_complete_0/a0 pll_full_1/divider_0/clk 0.11fF
-C969 divbuf_16/OUT5 divbuf_16/OUT2 0.02fF
-C970 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
-C971 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF
-C972 divbuf_3/OUT divbuf_3/OUT3 0.26fF
-C973 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
-C974 divbuf_7/OUT divbuf_7/OUT5 43.38fF
-C975 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
-C976 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
-C977 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
-C978 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
-C979 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
-C980 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
-C981 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
-C982 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
-C983 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C984 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
-C985 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/DIV 0.17fF
-C986 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
-C987 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
-C988 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C989 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
-C990 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
-C991 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C992 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z3 0.20fF
-C993 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.00fF
-C994 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
-C995 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
-C996 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C997 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
-C998 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C999 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
-C1000 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
-C1001 pd_0/R pd_0/and_pd_0/Z1 0.02fF
-C1002 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
-C1003 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C1004 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
-C1005 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
-C1006 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C1007 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
-C1008 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1009 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
-C1010 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
-C1011 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
-C1012 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
-C1013 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
-C1014 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C1015 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
-C1016 divbuf_11/IN divbuf_11/OUT5 0.00fF
-C1017 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
-C1018 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
-C1019 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
-C1020 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
-C1021 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
-C1022 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
-C1023 pll_full_1/ro_complete_0/a3 pll_full_1/divider_0/clk 0.11fF
-C1024 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C1025 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C1026 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
-C1027 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
-C1028 pll_full_1/pd_0/REF pll_full_1/pd_0/DOWN 1.48fF
-C1029 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
-C1030 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT5 0.01fF
-C1031 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C1032 pd_0/DIV pd_0/R 0.51fF
-C1033 divbuf_18/IN divbuf_18/OUT5 0.00fF
-C1034 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1035 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
-C1036 pd_1/R pd_1/and_pd_0/Out1 0.33fF
-C1037 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
-C1038 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
-C1039 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C1040 divbuf_4/OUT divbuf_2/OUT 1.95fF
-C1041 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
-C1042 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C1043 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
-C1044 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF
-C1045 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
-C1046 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF
-C1047 divider_0/nor_1/B divider_0/tspc_0/Z1 0.03fF
-C1048 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
-C1049 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF
-C1050 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF
-C1051 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
-C1052 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
-C1053 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
-C1054 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C1055 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
-C1056 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
-C1057 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
-C1058 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
-C1059 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
-C1060 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
-C1061 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
-C1062 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
-C1063 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
-C1064 pll_full_1/divbuf_0/IN pll_full_1/divider_0/tspc_0/a_630_n680# 0.04fF
-C1065 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
-C1066 divbuf_14/OUT divbuf_14/OUT5 43.38fF
-C1067 divbuf_6/OUT divbuf_6/OUT2 0.06fF
-C1068 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
-C1069 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.29fF
-C1070 divider_2/tspc_1/Q divider_2/tspc_0/Z2 0.14fF
-C1071 divider_2/tspc_1/Q divider_2/tspc_0/Z4 0.15fF
-C1072 divider_1/tspc_1/Z3 divider_1/nor_0/B 0.38fF
-C1073 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
-C1074 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
-C1075 divider_2/mc2 divider_2/nor_0/B 0.06fF
-C1076 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
-C1077 divbuf_23/IN divbuf_23/OUT5 0.00fF
-C1078 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
-C1079 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
-C1080 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF
-C1081 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1082 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C1083 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
-C1084 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DOWN 0.03fF
-C1085 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
-C1086 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF
-C1087 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
-C1088 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF
-C1089 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1090 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
-C1091 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
-C1092 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/nor_0/A 0.03fF
-C1093 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z2 0.40fF
-C1094 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF
-C1095 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C1096 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
-C1097 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
-C1098 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C1099 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
-C1100 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
-C1101 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C1102 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
-C1103 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
-C1104 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
-C1105 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
-C1106 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
-C1107 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/IN 0.13fF
-C1108 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
-C1109 divider_2/nor_0/B divider_2/tspc_0/Z4 0.02fF
-C1110 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
-C1111 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
-C1112 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C1113 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C1114 divbuf_3/OUT divbuf_3/OUT5 43.38fF
-C1115 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
-C1116 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1117 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
-C1118 pll_full_1/divbuf_0/OUT3 pll_full_1/pd_0/DIV 0.26fF
-C1119 pll_full_0/divbuf_0/IN pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF
-C1120 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
-C1121 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
-C1122 pd_0/DOWN pd_0/UP 0.46fF
-C1123 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
-C1124 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
-C1125 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
-C1126 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
-C1127 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
-C1128 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
-C1129 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
-C1130 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
-C1131 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
-C1132 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF
-C1133 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
-C1134 divider_0/Out divider_0/nor_1/B 0.22fF
-C1135 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C1136 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C1137 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/A 0.15fF
-C1138 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z3 0.45fF
-C1139 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
-C1140 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
-C1141 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
-C1142 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
-C1143 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
-C1144 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/R 0.03fF
-C1145 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF
-C1146 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
-C1147 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1148 divider_1/nor_1/B divider_1/nor_0/B 0.47fF
-C1149 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
-C1150 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
-C1151 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
-C1152 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
-C1153 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT5 43.38fF
-C1154 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
-C1155 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z2 0.40fF
-C1156 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
-C1157 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C1158 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
-C1159 pll_full_1/pd_0/DIV pll_full_1/divider_0/and_0/OUT 0.01fF
-C1160 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT5 0.01fF
-C1161 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C1162 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.04fF
-C1163 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
-C1164 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
-C1165 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
-C1166 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
-C1167 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C1168 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
-C1169 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF
-C1170 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
-C1171 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
-C1172 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
-C1173 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
-C1174 filter_0/v divbuf_25/OUT2 0.06fF
-C1175 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF
-C1176 divider_1/mc2 divider_1/nor_0/A 0.04fF
-C1177 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
-C1178 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
-C1179 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
-C1180 divbuf_19/a_492_n240# divbuf_19/OUT2 0.42fF
-C1181 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
-C1182 pd_1/DOWN pd_1/UP 0.46fF
-C1183 pd_1/tspc_r_0/Z3 pd_1/R 0.27fF
-C1184 io_clamp_high[0] io_analog[4] 0.53fF
-C1185 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
-C1186 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.18fF
-C1187 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
-C1188 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1189 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
-C1190 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
-C1191 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1192 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
-C1193 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF
-C1194 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF
-C1195 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z1 0.03fF
-C1196 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
-C1197 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
-C1198 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/a_492_n240# 0.42fF
-C1199 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
-C1200 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
-C1201 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
-C1202 divbuf_16/OUT divbuf_16/OUT3 0.26fF
-C1203 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
-C1204 divider_1/nor_1/B divider_1/and_0/B 0.29fF
-C1205 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
-C1206 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
-C1207 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
-C1208 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
-C1209 divider_2/mc2 divider_2/and_0/out1 0.06fF
-C1210 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
-C1211 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
-C1212 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
-C1213 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
-C1214 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF
-C1215 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1216 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
-C1217 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C1218 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
-C1219 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
-C1220 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C1221 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
-C1222 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
-C1223 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
-C1224 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
-C1225 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1226 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
-C1227 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
-C1228 pd_1/DIV pd_1/R 0.51fF
-C1229 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
-C1230 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
-C1231 divider_2/tspc_1/Z2 divider_2/nor_0/B 0.30fF
-C1232 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1233 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1234 divbuf_2/OUT divbuf_2/OUT4 1.11fF
-C1235 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C1236 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
-C1237 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
-C1238 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
-C1239 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF
-C1240 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C1241 divbuf_15/OUT3 divbuf_15/OUT4 5.16fF
-C1242 divbuf_6/OUT divbuf_6/OUT4 1.11fF
-C1243 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
-C1244 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
-C1245 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_1/Qbar1 0.20fF
-C1246 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
-C1247 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C1248 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1249 divider_1/tspc_0/Z4 divider_1/tspc_1/Q 0.15fF
-C1250 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C1251 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
-C1252 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
-C1253 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
-C1254 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
-C1255 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
-C1256 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C1257 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C1258 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
-C1259 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF
-C1260 pll_full_1/ro_complete_0/a4 pll_full_1/divider_0/clk 0.01fF
-C1261 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
-C1262 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF
-C1263 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
-C1264 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
-C1265 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
-C1266 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1267 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
-C1268 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF
-C1269 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
-C1270 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
-C1271 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
-C1272 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C1273 pd_1/R pd_1/UP 0.45fF
-C1274 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
-C1275 divider_2/nor_0/B divider_2/and_0/A 0.26fF
-C1276 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1277 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1278 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1279 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF
-C1280 divbuf_4/OUT divbuf_4/OUT3 0.26fF
-C1281 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
-C1282 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1283 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
-C1284 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/A 0.01fF
-C1285 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
-C1286 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1287 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF
-C1288 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C1289 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
-C1290 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
-C1291 pd_0/R pd_0/REF 0.61fF
-C1292 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
-C1293 divbuf_17/IN divbuf_17/OUT5 0.00fF
-C1294 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
-C1295 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C1296 divider_0/tspc_1/Z3 divider_0/tspc_1/a_630_n680# 0.05fF
-C1297 divider_0/tspc_1/Z1 divider_0/nor_0/B 0.03fF
-C1298 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
-C1299 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C1300 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C1301 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/nor_0/A 0.01fF
-C1302 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z4 0.12fF
-C1303 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF
-C1304 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
-C1305 divbuf_15/OUT divbuf_15/OUT4 1.11fF
-C1306 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
-C1307 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
-C1308 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C1309 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
-C1310 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.35fF
-C1311 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
-C1312 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
-C1313 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
-C1314 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
-C1315 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
-C1316 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
-C1317 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
-C1318 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C1319 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
-C1320 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
-C1321 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C1322 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C1323 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
-C1324 divbuf_15/IN divbuf_15/OUT5 0.00fF
-C1325 divider_0/mc2 divider_0/and_0/out1 0.06fF
-C1326 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
-C1327 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
-C1328 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C1329 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
-C1330 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
-C1331 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
-C1332 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/nor_0/A 0.02fF
-C1333 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_0/Z2 0.20fF
-C1334 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
-C1335 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1336 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1337 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
-C1338 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
-C1339 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
-C1340 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
-C1341 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
-C1342 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
-C1343 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
-C1344 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
-C1345 pd_1/tspc_r_1/Z1 pd_1/REF 0.17fF
-C1346 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Z4 0.20fF
-C1347 pll_full_1/divbuf_1/OUT5 pll_full_1/divbuf_1/OUT 43.38fF
-C1348 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/IN 0.00fF
-C1349 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C1350 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF
-C1351 divider_0/Out divider_0/tspc_0/a_630_n680# 0.04fF
-C1352 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
-C1353 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
-C1354 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
-C1355 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/B 0.30fF
-C1356 pll_full_1/ro_complete_0/a1 pll_full_1/divider_0/clk 0.11fF
-C1357 divbuf_15/a_492_n240# divbuf_15/OUT 0.00fF
-C1358 divider_0/tspc_1/Q divider_0/tspc_0/Z1 0.01fF
-C1359 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
-C1360 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
-C1361 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF
-C1362 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF
-C1363 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z3 0.38fF
-C1364 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF
-C1365 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
-C1366 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
-C1367 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
-C1368 divider_1/prescaler_0/Out divider_1/clk 0.51fF
-C1369 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
-C1370 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.27fF
-C1371 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
-C1372 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C1373 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF
-C1374 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
-C1375 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
-C1376 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
-C1377 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
-C1378 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
-C1379 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF
-C1380 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
-C1381 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF
-C1382 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.04fF
-C1383 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF
-C1384 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1385 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
-C1386 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/DIV 0.02fF
-C1387 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C1388 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
-C1389 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
-C1390 divider_0/nor_1/B divider_0/and_0/B 0.29fF
-C1391 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF
-C1392 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
-C1393 divider_1/mc2 divider_1/nor_0/B 0.06fF
-C1394 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
-C1395 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C1396 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
-C1397 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
-C1398 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT 0.06fF
-C1399 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT5 0.01fF
-C1400 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
-C1401 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z2 0.20fF
-C1402 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
-C1403 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
-C1404 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
-C1405 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
-C1406 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
-C1407 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF
-C1408 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
-C1409 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
-C1410 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.35fF
-C1411 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
-C1412 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
-C1413 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
-C1414 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z2 0.14fF
-C1415 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF
-C1416 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
-C1417 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
-C1418 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C1419 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
-C1420 divider_0/nor_0/A divider_0/and_0/B 0.08fF
-C1421 divbuf_6/IN divbuf_6/OUT5 0.00fF
-C1422 divbuf_19/OUT5 divbuf_19/IN 0.00fF
-C1423 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
-C1424 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/B 0.30fF
-C1425 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
-C1426 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
-C1427 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
-C1428 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
-C1429 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C1430 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
-C1431 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
-C1432 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
-C1433 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1434 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
-C1435 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
-C1436 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
-C1437 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
-C1438 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
-C1439 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF
-C1440 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/clk 0.06fF
-C1441 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT3 1.37fF
-C1442 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.00fF
-C1443 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
-C1444 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
-C1445 divider_1/mc2 divider_1/and_0/B 0.20fF
-C1446 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF
-C1447 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
-C1448 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
-C1449 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1450 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
-C1451 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
-C1452 divider_2/mc2 divider_2/nor_0/A 0.04fF
-C1453 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
-C1454 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
-C1455 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/IN 5.26fF
-C1456 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
-C1457 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
-C1458 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
-C1459 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF
-C1460 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1461 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF
-C1462 divbuf_15/a_492_n240# divbuf_15/OUT5 0.01fF
-C1463 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
-C1464 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
-C1465 divbuf_4/OUT divbuf_4/OUT5 43.38fF
-C1466 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C1467 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1468 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
-C1469 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.02fF
-C1470 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
-C1471 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z2 0.14fF
-C1472 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C1473 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
-C1474 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
-C1475 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
-C1476 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
-C1477 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
-C1478 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
-C1479 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
-C1480 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
-C1481 divider_0/tspc_1/Z3 divider_0/nor_0/B 0.38fF
-C1482 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C1483 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C1484 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1485 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1486 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF
-C1487 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/REF 0.65fF
-C1488 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
-C1489 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1490 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF
-C1491 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
-C1492 divbuf_7/IN divbuf_7/OUT5 0.00fF
-C1493 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
-C1494 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
-C1495 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
-C1496 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
-C1497 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
-C1498 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
-C1499 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1500 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1501 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
-C1502 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
-C1503 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z1 0.01fF
-C1504 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1505 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C1506 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C1507 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
-C1508 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF
-C1509 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
-C1510 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/A 0.26fF
-C1511 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
-C1512 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
-C1513 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
-C1514 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_740_n680# 0.33fF
-C1515 divider_1/nor_0/B divider_1/tspc_0/Z2 0.20fF
-C1516 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
-C1517 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
-C1518 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
-C1519 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z3 0.25fF
-C1520 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/z5 0.20fF
-C1521 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
-C1522 pll_full_1/pd_0/DIV pll_full_1/divider_0/clk 2.26fF
-C1523 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1524 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF
-C1525 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1526 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1527 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF
-C1528 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
-C1529 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF
-C1530 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z4 0.21fF
-C1531 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
-C1532 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
-C1533 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
-C1534 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
-C1535 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
-C1536 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
-C1537 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
-C1538 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
-C1539 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C1540 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
-C1541 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
-C1542 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
-C1543 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
-C1544 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
-C1545 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF
-C1546 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C1547 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
-C1548 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF
-C1549 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF
-C1550 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C1551 divider_0/mc2 divider_0/nor_1/B 0.15fF
-C1552 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/A 0.55fF
-C1553 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z4 0.21fF
-C1554 divbuf_19/OUT4 divbuf_19/OUT5 20.26fF
-C1555 divbuf_16/OUT5 divbuf_16/a_492_n240# 0.01fF
-C1556 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
-C1557 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
-C1558 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF
-C1559 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1560 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1561 divider_1/tspc_2/Q divider_1/tspc_1/Z1 0.01fF
-C1562 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF
-C1563 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C1564 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
-C1565 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF
-C1566 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1567 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT 1.11fF
-C1568 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
-C1569 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C1570 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
-C1571 divbuf_12/IN divbuf_12/OUT5 0.00fF
-C1572 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
-C1573 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
-C1574 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
-C1575 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF
-C1576 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C1577 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF
-C1578 divider_0/mc2 divider_0/nor_0/A 0.04fF
-C1579 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
-C1580 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF
-C1581 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF
-C1582 divbuf_1/OUT divbuf_1/OUT3 0.26fF
-C1583 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1584 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
-C1585 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
-C1586 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.35fF
-C1587 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
-C1588 pll_full_1/pd_0/REF pll_full_1/divbuf_1/a_492_n240# 0.13fF
-C1589 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1590 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
-C1591 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
-C1592 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
-C1593 divider_1/nor_0/A divider_1/and_0/B 0.08fF
-C1594 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
-C1595 io_clamp_low[2] io_analog[6] 0.53fF
-C1596 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C1597 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
-C1598 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
-C1599 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
-C1600 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1601 pll_full_1/ro_complete_0/a5 pll_full_1/divider_0/clk 0.15fF
-C1602 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF
-C1603 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF
-C1604 divbuf_16/OUT5 divbuf_16/OUT 43.38fF
-C1605 divbuf_14/OUT divbuf_14/OUT3 0.26fF
-C1606 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
-C1607 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
-C1608 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
-C1609 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/clk 0.26fF
-C1610 divider_2/tspc_1/Q divider_2/tspc_1/a_630_n680# 0.04fF
-C1611 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT4 5.16fF
-C1612 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1613 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF
-C1614 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
-C1615 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
-C1616 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
-C1617 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
-C1618 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
-C1619 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
-C1620 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
-C1621 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
-C1622 cp_0/a_1710_0# cp_0/out 0.84fF
-C1623 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
-C1624 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1625 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
-C1626 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C1627 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
-C1628 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
-C1629 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C1630 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
-C1631 divbuf_5/OUT divbuf_5/OUT3 0.26fF
-C1632 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/z5 0.04fF
-C1633 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C1634 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
-C1635 divider_0/nor_0/B divider_0/and_0/B 0.31fF
-C1636 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
-C1637 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
-C1638 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
-C1639 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
-C1640 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
-C1641 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
-C1642 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF
-C1643 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF
-C1644 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C1645 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
-C1646 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
-C1647 divbuf_24/IN divbuf_24/OUT5 0.00fF
-C1648 divider_2/nor_0/A divider_2/and_0/A 0.01fF
-C1649 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF
-C1650 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF
-C1651 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
-C1652 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
-C1653 divider_0/tspc_1/Q divider_0/nor_0/B 0.51fF
-C1654 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C1655 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF
-C1656 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/clk 0.64fF
-C1657 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C1658 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
-C1659 divbuf_17/OUT3 divbuf_17/OUT4 5.16fF
-C1660 divider_1/mc2 divider_1/and_0/OUT 0.05fF
-C1661 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF
-C1662 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
-C1663 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C1664 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1665 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
-C1666 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
-C1667 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
-C1668 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
-C1669 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
-C1670 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
-C1671 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
-C1672 pll_full_1/pd_0/DIV pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C1673 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF
-C1674 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
-C1675 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z3 0.45fF
-C1676 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1677 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1678 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/divider_0/clk 1.46fF
-C1679 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
-C1680 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
-C1681 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C1682 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C1683 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1684 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
-C1685 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_740_n680# 0.08fF
-C1686 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF
-C1687 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
-C1688 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
-C1689 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
-C1690 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DOWN 0.03fF
-C1691 pd_1/tspc_r_1/Qbar pd_1/tspc_r_1/Qbar1 0.01fF
-C1692 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
-C1693 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
-C1694 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
-C1695 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C1696 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/divider_0/clk 1.27fF
-C1697 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF
-C1698 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C1699 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C1700 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
-C1701 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
-C1702 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1703 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
-C1704 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
-C1705 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
-C1706 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF
-C1707 divbuf_7/OUT divbuf_7/OUT2 0.06fF
-C1708 divider_2/tspc_1/Q divider_2/nor_0/B 0.51fF
-C1709 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
-C1710 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
-C1711 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1712 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C1713 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
-C1714 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
-C1715 divider_2/mc2 divider_2/and_0/B 0.20fF
-C1716 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1717 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF
-C1718 divbuf_18/a_492_n240# divbuf_18/OUT 0.00fF
-C1719 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
-C1720 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
-C1721 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
-C1722 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1723 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C1724 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
-C1725 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1726 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
-C1727 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
-C1728 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z1 0.06fF
-C1729 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C1730 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
-C1731 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
-C1732 divider_2/nor_1/B divider_2/nor_1/Z1 0.06fF
-C1733 divbuf_16/IN divbuf_16/a_492_n240# 0.13fF
-C1734 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
-C1735 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
-C1736 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1737 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1738 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
-C1739 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
-C1740 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
-C1741 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
-C1742 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
-C1743 pd_0/R pd_0/and_pd_0/Out1 0.33fF
-C1744 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
-C1745 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
-C1746 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
-C1747 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
-C1748 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
-C1749 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
-C1750 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1751 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1752 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/Out 0.21fF
-C1753 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
-C1754 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1755 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1756 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1757 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/clk 0.45fF
-C1758 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
-C1759 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
-C1760 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
-C1761 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C1762 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
-C1763 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
-C1764 filter_0/v divbuf_25/OUT4 1.11fF
-C1765 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
-C1766 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
-C1767 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
-C1768 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF
-C1769 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
-C1770 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1771 divbuf_0/OUT5 divbuf_0/OUT 43.38fF
-C1772 divbuf_25/OUT2 divbuf_25/OUT3 1.37fF
-C1773 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/B 0.22fF
-C1774 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/nor_1/B 0.38fF
-C1775 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
-C1776 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1777 divider_0/prescaler_0/Out divider_0/clk 0.51fF
-C1778 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
-C1779 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
-C1780 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
-C1781 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1782 pll_full_1/pd_0/DIV pll_full_1/pd_0/R 0.51fF
-C1783 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C1784 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF
-C1785 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C1786 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
-C1787 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
-C1788 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
-C1789 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
-C1790 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
-C1791 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
-C1792 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
-C1793 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
-C1794 cp_0/a_1710_0# cp_0/down 0.32fF
-C1795 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
-C1796 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
-C1797 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
-C1798 divider_2/and_0/OUT divider_2/clk 0.04fF
-C1799 divbuf_5/OUT divbuf_3/OUT 3.09fF
-C1800 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1801 divider_0/mc2 divider_0/nor_0/B 0.06fF
-C1802 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
-C1803 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1804 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF
-C1805 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
-C1806 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
-C1807 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
-C1808 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
-C1809 divbuf_5/OUT divbuf_5/OUT5 43.38fF
-C1810 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
-C1811 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1812 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1813 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF
-C1814 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
-C1815 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
-C1816 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.01fF
-C1817 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1818 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
-C1819 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
-C1820 divider_1/nor_0/B divider_1/and_0/B 0.31fF
-C1821 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
-C1822 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
-C1823 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
-C1824 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
-C1825 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1826 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
-C1827 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
-C1828 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
-C1829 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1830 divider_0/tspc_0/Z4 divider_0/nor_0/B 0.02fF
-C1831 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
-C1832 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C1833 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1834 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/clk 0.12fF
-C1835 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/REF 0.17fF
-C1836 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
-C1837 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
-C1838 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
-C1839 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1840 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
-C1841 divbuf_17/OUT3 divbuf_17/OUT2 1.37fF
-C1842 divider_2/nor_1/B divider_2/Out 0.22fF
-C1843 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
-C1844 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF
-C1845 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
-C1846 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
-C1847 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/B 0.22fF
-C1848 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
-C1849 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
-C1850 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
-C1851 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
-C1852 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
-C1853 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
-C1854 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1855 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
-C1856 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF
-C1857 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1858 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
-C1859 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
-C1860 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1861 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C1862 divider_0/mc2 divider_0/and_0/B 0.20fF
-C1863 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/clk 0.45fF
-C1864 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z3 0.11fF
-C1865 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
-C1866 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
-C1867 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF
-C1868 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
-C1869 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
-C1870 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
-C1871 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z2 0.19fF
-C1872 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1873 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
-C1874 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
-C1875 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
-C1876 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
-C1877 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
-C1878 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
-C1879 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z4 0.12fF
-C1880 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF
-C1881 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1882 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF
-C1883 divbuf_0/OUT5 divbuf_0/IN 0.00fF
-C1884 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1885 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
-C1886 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1887 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF
-C1888 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
-C1889 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
-C1890 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
-C1891 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
-C1892 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1893 divider_2/nor_1/B divider_2/tspc_0/Z3 0.38fF
-C1894 divbuf_7/OUT divbuf_7/OUT4 1.11fF
-C1895 divbuf_4/IN divbuf_4/OUT5 0.00fF
-C1896 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
-C1897 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
-C1898 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
-C1899 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1900 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
-C1901 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
-C1902 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
-C1903 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
-C1904 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
-C1905 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
-C1906 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
-C1907 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
-C1908 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C1909 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
-C1910 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C1911 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_0/A 0.15fF
-C1912 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1913 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1914 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
-C1915 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
-C1916 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
-C1917 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
-C1918 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF
-C1919 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF
-C1920 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1921 divider_1/tspc_0/Z4 divider_1/nor_0/B 0.02fF
-C1922 divbuf_5/IN divbuf_5/OUT5 0.00fF
-C1923 divbuf_19/OUT5 divbuf_19/OUT2 0.02fF
-C1924 divbuf_19/OUT4 divbuf_19/OUT3 5.16fF
-C1925 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
-C1926 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
-C1927 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
-C1928 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
-C1929 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
-C1930 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C1931 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
-C1932 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
-C1933 divider_2/and_0/A divider_2/and_0/B 0.18fF
-C1934 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
-C1935 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1936 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1937 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/divider_0/clk 0.12fF
-C1938 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
-C1939 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
-C1940 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1941 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
-C1942 divbuf_16/OUT5 divbuf_16/OUT3 0.01fF
-C1943 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
-C1944 divbuf_25/IN divbuf_25/OUT5 0.00fF
-C1945 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C1946 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
-C1947 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1948 divider_2/mc2 divider_2/and_0/OUT 0.05fF
-C1949 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
-C1950 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
-C1951 pd_1/tspc_r_1/Qbar pd_1/R 0.03fF
-C1952 io_clamp_high[1] io_analog[5] 0.53fF
-C1953 divbuf_19/OUT divbuf_19/OUT3 0.26fF
-C1954 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
-C1955 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
-C1956 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
-C1957 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
-C1958 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
-C1959 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
-C1960 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
-C1961 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF
-C1962 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1963 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/A 0.35fF
-C1964 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/clk 0.60fF
-C1965 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
-C1966 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1967 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
-C1968 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
-C1969 divider_1/nor_1/B divider_1/Out 0.22fF
-C1970 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
-C1971 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
-C1972 pll_full_1/pd_0/DOWN pll_full_1/pd_0/and_pd_0/Out1 0.12fF
-C1973 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
-C1974 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1975 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1976 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
-C1977 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
-C1978 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
-C1979 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
-C1980 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
-C1981 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF
-C1982 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
-C1983 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1984 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1985 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1986 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF
-C1987 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1988 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
-C1989 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
-C1990 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
-C1991 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
-C1992 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
-C1993 divbuf_21/IN divbuf_21/OUT5 0.00fF
-C1994 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF
-C1995 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
-C1996 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
-C1997 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
-C1998 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
-C1999 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
-C2000 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C2001 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
-C2002 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/a_630_n680# 0.05fF
-C2003 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF
-C2004 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
-C2005 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF
-C2006 divider_1/tspc_1/Z2 divider_1/nor_0/B 0.30fF
-C2007 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
-C2008 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
-C2009 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF
-C2010 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
-C2011 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
-C2012 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
-C2013 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
-C2014 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
-C2015 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF
-C2016 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
-C2017 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF
-C2018 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C2019 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
-C2020 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF
-C2021 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z1 0.03fF
-C2022 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/clk 0.12fF
-C2023 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
-C2024 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
-C2025 divbuf_17/a_492_n240# divbuf_17/IN 0.13fF
-C2026 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
-C2027 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
-C2028 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C2029 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
-C2030 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C2031 divbuf_16/OUT divbuf_16/OUT4 1.11fF
-C2032 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
-C2033 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C2034 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
-C2035 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
-C2036 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
-C2037 pd_1/R pd_1/REF 0.61fF
-C2038 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
+C0 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C2 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
+C3 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
+C4 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
+C5 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
+C6 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
+C7 pd_1/R pd_1/REF 0.61fF
+C8 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C9 divbuf_14/OUT3 divbuf_14/OUT5 0.01fF
+C10 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
+C11 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
+C12 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
+C13 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C14 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C15 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C16 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C17 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF
+C18 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
+C19 divbuf_22/OUT divbuf_22/OUT3 0.26fF
+C20 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
+C21 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C22 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C23 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
+C24 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
+C25 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
+C26 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
+C27 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
+C28 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
+C29 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
+C30 divbuf_17/OUT5 divbuf_17/OUT2 0.02fF
+C31 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C32 cp_0/upbar cp_0/down 0.02fF
+C33 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
+C34 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
+C35 divbuf_20/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
+C36 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
+C37 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C38 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C39 divider_0/mc2 divider_0/and_0/B 0.20fF
+C40 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
+C41 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
+C42 divider_2/tspc_1/Q divider_2/tspc_0/Z4 0.15fF
+C43 divbuf_23/OUT divbuf_23/OUT5 43.38fF
+C44 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C45 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
+C46 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
+C47 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
+C48 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
+C49 divbuf_18/OUT3 divbuf_18/OUT2 1.37fF
+C50 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
+C51 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
+C52 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
+C53 divider_2/nor_0/A divider_2/and_0/B 0.08fF
+C54 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
+C55 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
+C56 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
+C57 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C58 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
+C59 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
+C60 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
+C61 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
+C62 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
+C63 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C64 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
+C65 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
+C66 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
+C67 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
+C68 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
+C69 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
+C70 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
+C71 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
+C72 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
+C73 filter_0/v divbuf_0/a_492_n240# 0.00fF
+C74 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
+C75 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
+C76 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C77 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
+C78 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
+C79 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C80 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
+C81 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
+C82 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
+C83 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
+C84 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
+C85 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
+C86 divbuf_20/IN divbuf_20/OUT5 0.00fF
+C87 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C88 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C89 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
+C90 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
+C91 cp_0/a_1710_n2840# cp_0/out 0.61fF
+C92 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
+C93 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
+C94 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
+C95 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
+C96 divbuf_20/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C97 ro_complete_0/cbank_0/switch_1/vin divbuf_21/OUT 0.09fF
+C98 ro_complete_0/cbank_0/switch_0/vin divbuf_23/OUT 0.09fF
+C99 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
+C100 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C101 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
+C102 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
+C103 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
+C104 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C105 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
+C106 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
+C107 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
+C108 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
+C109 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
+C110 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
+C111 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
+C112 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
+C113 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
+C114 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
+C115 divbuf_21/OUT divbuf_21/OUT2 0.06fF
+C116 divbuf_2/OUT4 divbuf_2/OUT 1.11fF
+C117 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
+C118 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C119 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
+C120 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
+C121 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
+C122 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C123 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
+C124 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C125 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
+C126 pd_0/R pd_0/and_pd_0/Z1 0.02fF
+C127 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
+C128 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
+C129 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
+C130 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
+C131 divbuf_25/a_492_n240# divbuf_25/OUT 0.00fF
+C132 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
+C133 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
+C134 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
+C135 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C136 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
+C137 divbuf_15/a_492_n240# divbuf_15/OUT5 0.01fF
+C138 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
+C139 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
+C140 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
+C141 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C142 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
+C143 divbuf_11/IN divbuf_11/OUT5 0.00fF
+C144 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
+C145 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
+C146 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
+C147 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
+C148 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
+C149 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
+C150 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
+C151 divbuf_14/OUT4 divbuf_14/OUT 1.11fF
+C152 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
+C153 divbuf_18/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C154 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C155 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
+C156 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
+C157 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
+C158 divbuf_22/OUT divbuf_22/OUT5 43.38fF
+C159 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
+C160 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
+C161 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C162 pd_0/DIV pd_0/R 0.51fF
+C163 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C164 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
+C165 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
+C166 divbuf_21/OUT divbuf_23/OUT 1.95fF
+C167 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a2 0.09fF
+C168 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
+C169 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
+C170 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
+C171 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
+C172 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF
+C173 divider_1/Out divider_1/tspc_0/Z3 0.05fF
+C174 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C175 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C176 divbuf_18/OUT divbuf_18/OUT4 1.11fF
+C177 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C178 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
+C179 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
+C180 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
+C181 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
+C182 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
+C183 divbuf_18/OUT5 divbuf_18/OUT2 0.02fF
+C184 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
+C185 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
+C186 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
+C187 filter_0/a_4216_n2998# filter_0/v 0.36fF
+C188 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
+C189 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C190 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
+C191 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a2 0.09fF
+C192 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
+C193 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
+C194 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
+C195 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
+C196 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
+C197 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
+C198 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
+C199 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
+C200 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
+C201 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
+C202 divbuf_12/IN divbuf_12/OUT5 0.00fF
+C203 divbuf_14/a_492_n240# divbuf_14/IN 0.13fF
+C204 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C205 divider_0/mc2 divider_0/and_0/OUT 0.05fF
+C206 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
+C207 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
+C208 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
+C209 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C210 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
+C211 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
+C212 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C213 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
+C214 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C215 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
+C216 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
+C217 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
+C218 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
+C219 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
+C220 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
+C221 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
+C222 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
+C223 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
+C224 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
+C225 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C226 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
+C227 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C228 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
+C229 pd_0/DOWN pd_0/UP 0.46fF
+C230 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
+C231 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
+C232 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
+C233 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
+C234 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
+C235 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
+C236 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C237 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
+C238 divbuf_16/OUT5 divbuf_16/OUT2 0.02fF
+C239 divider_1/tspc_0/Z4 divider_1/nor_0/B 0.02fF
+C240 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
+C241 divbuf_15/IN divbuf_15/OUT5 0.00fF
+C242 divbuf_20/OUT divbuf_20/OUT3 0.26fF
+C243 divbuf_21/OUT divbuf_21/OUT4 1.11fF
+C244 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
+C245 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
+C246 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
+C247 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C248 divider_2/tspc_1/Q divider_2/tspc_0/a_630_n680# 0.01fF
+C249 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
+C250 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
+C251 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
+C252 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C253 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
+C254 divbuf_25/IN divbuf_25/OUT5 0.00fF
+C255 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
+C256 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C257 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
+C258 io_clamp_low[2] io_analog[6] 0.53fF
+C259 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
+C260 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
+C261 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
+C262 divider_1/nor_1/B divider_1/tspc_0/Z1 0.03fF
+C263 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
+C264 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
+C265 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
+C266 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
+C267 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
+C268 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
+C269 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
+C270 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
+C271 divbuf_18/OUT ro_complete_0/cbank_2/v 0.05fF
+C272 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C273 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
+C274 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
+C275 divbuf_15/OUT5 divbuf_15/OUT4 20.26fF
+C276 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
+C277 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
+C278 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C279 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
+C280 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
+C281 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
+C282 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
+C283 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
+C284 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
+C285 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
+C286 ro_complete_0/cbank_1/switch_3/vin divbuf_19/OUT 0.14fF
+C287 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
+C288 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
+C289 divider_1/Out divider_1/tspc_0/a_630_n680# 0.04fF
+C290 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
+C291 divbuf_15/OUT2 divbuf_15/OUT5 0.02fF
+C292 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
+C293 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C294 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
+C295 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
+C296 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
+C297 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
+C298 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
+C299 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
+C300 divider_2/tspc_1/Z1 divider_2/tspc_2/Q 0.01fF
+C301 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
+C302 divider_2/nor_0/B divider_2/tspc_1/a_630_n680# 0.35fF
+C303 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C304 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
+C305 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
+C306 divbuf_21/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C307 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
+C308 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
+C309 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
+C310 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
+C311 divbuf_16/OUT5 divbuf_16/OUT3 0.01fF
+C312 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
+C313 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C314 divbuf_17/OUT5 divbuf_17/OUT3 0.01fF
+C315 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
+C316 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
+C317 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
+C318 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
+C319 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
+C320 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
+C321 divbuf_22/OUT ro_complete_0/cbank_2/v 0.05fF
+C322 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C323 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
+C324 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
+C325 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C326 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
+C327 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
+C328 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
+C329 cp_0/a_10_n50# cp_0/vbias 0.19fF
+C330 pd_1/R pd_1/and_pd_0/Out1 0.33fF
+C331 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
+C332 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
+C333 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
+C334 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_740_n680# 0.21fF
+C335 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF
+C336 divbuf_23/OUT divbuf_23/a_492_n240# 0.00fF
+C337 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
+C338 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C339 divbuf_17/OUT divbuf_17/OUT2 0.06fF
+C340 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
+C341 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C342 pd_0/R pd_0/REF 0.61fF
+C343 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
+C344 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
+C345 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
+C346 divbuf_22/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C347 divbuf_20/OUT divbuf_20/OUT5 43.38fF
+C348 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
+C349 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C350 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
+C351 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
+C352 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
+C353 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
+C354 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
+C355 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
+C356 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
+C357 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
+C358 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
+C359 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
+C360 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
+C361 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
+C362 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
+C363 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
+C364 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
+C365 divbuf_25/OUT2 divbuf_25/OUT 0.06fF
+C366 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
+C367 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C368 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C369 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
+C370 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
+C371 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
+C372 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
+C373 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
+C374 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
+C375 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
+C376 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
+C377 divbuf_18/OUT divbuf_18/OUT2 0.06fF
+C378 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
+C379 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
+C380 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
+C381 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
+C382 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
+C383 divbuf_16/OUT4 divbuf_16/OUT3 5.16fF
+C384 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
+C385 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
+C386 divider_2/nor_1/B divider_2/mc2 0.15fF
+C387 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
+C388 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
+C389 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
+C390 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
+C391 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
+C392 divbuf_19/a_492_n240# divbuf_19/OUT5 0.01fF
+C393 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
+C394 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
+C395 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/a5 0.09fF
+C396 ro_complete_0/cbank_0/switch_3/vin divbuf_19/OUT 0.14fF
+C397 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
+C398 ro_complete_0/cbank_0/switch_2/vin divbuf_22/OUT 0.09fF
+C399 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
+C400 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
+C401 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C402 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
+C403 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
+C404 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C405 divbuf_17/OUT divbuf_17/a_492_n240# 0.00fF
+C406 divider_1/mc2 divider_1/nor_1/B 0.15fF
+C407 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
+C408 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
+C409 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
+C410 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
+C411 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
+C412 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
+C413 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
+C414 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C415 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
+C416 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
+C417 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
+C418 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
+C419 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
+C420 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C421 divbuf_21/IN divbuf_21/OUT5 0.00fF
+C422 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
+C423 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
+C424 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
+C425 divider_2/nor_1/B divider_2/tspc_0/Z2 0.40fF
+C426 divider_1/tspc_0/Z3 divider_1/tspc_0/Z1 0.06fF
+C427 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
+C428 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
+C429 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
+C430 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
+C431 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
+C432 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
+C433 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
+C434 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF
+C435 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
+C436 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
+C437 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
+C438 divbuf_16/OUT2 divbuf_16/OUT3 1.37fF
+C439 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
+C440 divbuf_22/OUT divbuf_22/a_492_n240# 0.00fF
+C441 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
+C442 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
+C443 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
+C444 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C445 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
+C446 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
+C447 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
+C448 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
+C449 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
+C450 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
+C451 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C452 divbuf_1/OUT3 divbuf_1/OUT 0.26fF
+C453 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C454 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C455 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
+C456 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
+C457 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
+C458 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
+C459 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
+C460 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
+C461 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
+C462 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
+C463 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C464 divider_2/nor_1/B divider_2/Out 0.22fF
+C465 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
+C466 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
+C467 divider_1/nor_1/B divider_1/and_0/B 0.29fF
+C468 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
+C469 pd_1/DIV pd_1/R 0.51fF
+C470 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
+C471 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
+C472 divider_2/Out divider_2/tspc_0/Z3 0.05fF
+C473 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
+C474 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
+C475 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
+C476 filter_0/v divbuf_0/OUT5 43.38fF
+C477 divbuf_22/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C478 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C479 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
+C480 divider_0/nor_0/B divider_0/and_0/B 0.31fF
+C481 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
+C482 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
+C483 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
+C484 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C485 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
+C486 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
+C487 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
+C488 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
+C489 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
+C490 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
+C491 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
+C492 divbuf_22/IN divbuf_22/OUT5 0.00fF
+C493 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
+C494 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
+C495 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
+C496 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
+C497 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
+C498 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
+C499 filter_0/v divbuf_0/OUT3 0.26fF
+C500 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
+C501 divbuf_25/OUT4 divbuf_25/OUT 1.11fF
+C502 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C503 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
+C504 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
+C505 divbuf_21/OUT ro_complete_0/cbank_2/v 0.05fF
+C506 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
+C507 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
+C508 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
+C509 divider_0/and_0/OUT divider_0/clk 0.04fF
+C510 io_clamp_high[1] io_analog[5] 0.53fF
+C511 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
+C512 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
+C513 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
+C514 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C515 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
+C516 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
+C517 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
+C518 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
+C519 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
+C520 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
+C521 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
+C522 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
+C523 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
+C524 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
+C525 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
+C526 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
+C527 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
+C528 divider_0/nor_0/A divider_0/and_0/A 0.01fF
+C529 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
+C530 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
+C531 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
+C532 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
+C533 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
+C534 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
+C535 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C536 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
+C537 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
+C538 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
+C539 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
+C540 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
+C541 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
+C542 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C543 divbuf_19/OUT divbuf_19/OUT4 1.11fF
+C544 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
+C545 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
+C546 ro_complete_0/cbank_1/switch_1/vin divbuf_22/OUT 0.14fF
+C547 ro_complete_0/cbank_2/switch_3/vin divbuf_19/OUT 0.14fF
+C548 divbuf_0/OUT5 divbuf_0/IN 0.00fF
+C549 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C550 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C551 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
+C552 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
+C553 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
+C554 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
+C555 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C556 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
+C557 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF
+C558 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/Z3 0.16fF
+C559 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
+C560 divbuf_8/IN divbuf_8/OUT5 0.00fF
+C561 divider_2/mc2 divider_2/nor_0/A 0.04fF
+C562 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
+C563 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
+C564 filter_0/a_4216_n5230# filter_0/v 0.91fF
+C565 ro_complete_0/cbank_1/switch_4/vin divbuf_18/OUT 0.13fF
+C566 divbuf_1/IN divbuf_1/OUT5 0.00fF
+C567 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF
+C568 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
+C569 divbuf_23/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C570 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
+C571 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C572 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
+C573 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
+C574 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C575 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C576 divider_1/nor_1/B divider_1/tspc_1/Q 0.22fF
+C577 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
+C578 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C579 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C580 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
+C581 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
+C582 divbuf_19/OUT3 divbuf_19/OUT5 0.01fF
+C583 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
+C584 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
+C585 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
+C586 filter_0/v divbuf_0/OUT4 1.11fF
+C587 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
+C588 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
+C589 divbuf_19/OUT ro_complete_0/cbank_2/v 0.05fF
+C590 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C591 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C592 divbuf_3/OUT3 divbuf_3/OUT 0.26fF
+C593 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
+C594 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C595 divbuf_17/OUT divbuf_17/OUT4 1.11fF
+C596 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
+C597 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
+C598 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
+C599 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
+C600 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C601 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
+C602 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
+C603 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
+C604 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
+C605 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
+C606 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF
+C607 divbuf_18/OUT divbuf_18/OUT3 0.26fF
+C608 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
+C609 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
+C610 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C611 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
+C612 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C613 divider_0/mc2 divider_0/and_0/out1 0.06fF
+C614 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
+C615 divbuf_23/OUT divbuf_23/OUT2 0.06fF
+C616 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
+C617 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
+C618 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
+C619 divider_1/tspc_2/Q divider_1/nor_0/B 0.22fF
+C620 divider_0/and_0/A divider_0/and_0/B 0.18fF
+C621 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
+C622 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
+C623 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
+C624 divider_1/nor_0/B divider_1/and_0/A 0.26fF
+C625 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C626 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
+C627 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
+C628 divbuf_9/IN divbuf_9/OUT5 0.00fF
+C629 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
+C630 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
+C631 divider_0/mc2 divider_0/nor_0/B 0.06fF
+C632 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
+C633 divbuf_20/OUT ro_complete_0/cbank_1/v 0.05fF
+C634 ro_complete_0/cbank_0/switch_4/vin divbuf_18/OUT 0.13fF
+C635 divbuf_1/OUT4 divbuf_1/OUT 1.11fF
+C636 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C637 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
+C638 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
+C639 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C640 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
+C641 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
+C642 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
+C643 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
+C644 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
+C645 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
+C646 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
+C647 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
+C648 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
+C649 divider_2/mc2 divider_2/and_0/B 0.20fF
+C650 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
+C651 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
+C652 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C653 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
+C654 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
+C655 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C656 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
+C657 divbuf_15/OUT divbuf_15/OUT4 1.11fF
+C658 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
+C659 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
+C660 io_clamp_low[0] io_analog[4] 0.53fF
+C661 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
+C662 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C663 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
+C664 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
+C665 divbuf_17/OUT divbuf_17/OUT3 0.26fF
+C666 divider_1/tspc_1/Q divider_1/tspc_0/Z1 0.01fF
+C667 divider_1/mc2 divider_1/nor_0/A 0.04fF
+C668 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
+C669 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
+C670 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
+C671 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
+C672 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
+C673 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
+C674 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
+C675 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
+C676 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
+C677 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C678 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C679 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
+C680 divbuf_15/OUT2 divbuf_15/OUT 0.06fF
+C681 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
+C682 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
+C683 divider_0/Out divider_0/nor_1/B 0.22fF
+C684 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
+C685 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C686 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
+C687 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
+C688 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
+C689 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
+C690 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
+C691 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C692 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
+C693 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
+C694 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
+C695 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C696 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
+C697 divbuf_21/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C698 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
+C699 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
+C700 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
+C701 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
+C702 divbuf_20/OUT divbuf_20/a_492_n240# 0.00fF
+C703 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C704 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
+C705 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
+C706 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C707 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C708 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
+C709 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
+C710 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
+C711 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
+C712 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF
+C713 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
+C714 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/Z4 0.36fF
+C715 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
+C716 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
+C717 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
+C718 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
+C719 pd_0/R pd_0/and_pd_0/Out1 0.33fF
+C720 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
+C721 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
+C722 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
+C723 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
+C724 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
+C725 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
+C726 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C727 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C728 divider_2/tspc_1/Q divider_2/tspc_0/Z2 0.14fF
+C729 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
+C730 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
+C731 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
+C732 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF
+C733 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
+C734 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C735 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
+C736 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
+C737 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C738 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
+C739 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
+C740 divider_1/nor_0/A divider_1/and_0/B 0.08fF
+C741 pd_1/DOWN pd_1/UP 0.46fF
+C742 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF
+C743 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
+C744 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
+C745 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
+C746 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
+C747 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
+C748 divbuf_14/OUT3 divbuf_14/OUT4 5.16fF
+C749 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
+C750 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF
+C751 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
+C752 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C753 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF
+C754 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
+C755 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
+C756 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
+C757 divbuf_22/OUT divbuf_22/OUT2 0.06fF
+C758 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
+C759 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C760 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
+C761 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C762 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
+C763 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
+C764 divider_1/mc2 divider_1/and_0/B 0.20fF
+C765 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
+C766 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
+C767 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
+C768 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
+C769 divbuf_18/OUT divbuf_18/OUT5 43.38fF
+C770 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
+C771 divider_2/and_0/OUT divider_2/clk 0.04fF
+C772 divbuf_20/OUT divbuf_22/OUT 3.09fF
+C773 divbuf_21/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C774 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
+C775 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
+C776 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
+C777 divider_0/mc2 divider_0/and_0/A 0.16fF
+C778 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
+C779 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C780 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C781 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C782 divbuf_23/OUT divbuf_23/OUT4 1.11fF
+C783 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
+C784 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
+C785 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
+C786 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C787 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
+C788 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
+C789 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
+C790 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
+C791 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
+C792 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
+C793 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
+C794 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
+C795 divider_2/nor_0/A divider_2/and_0/A 0.01fF
+C796 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C797 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
+C798 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
+C799 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
+C800 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C801 divider_1/tspc_0/Z3 divider_1/tspc_1/Q 0.45fF
+C802 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
+C803 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
+C804 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
+C805 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
+C806 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
+C807 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
+C808 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
+C809 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
+C810 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
+C811 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
+C812 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
+C813 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C814 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
+C815 divbuf_23/OUT ro_complete_0/cbank_2/v 0.08fF
+C816 divbuf_18/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C817 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
+C818 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF
+C819 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
+C820 divbuf_15/OUT divbuf_15/OUT3 0.26fF
+C821 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
+C822 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
+C823 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
+C824 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
+C825 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
+C826 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C827 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
+C828 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
+C829 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
+C830 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
+C831 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
+C832 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
+C833 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
+C834 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
+C835 divider_2/nor_0/B divider_2/and_0/B 0.31fF
+C836 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
+C837 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C838 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
+C839 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
+C840 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C841 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
+C842 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
+C843 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
+C844 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
+C845 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
+C846 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
+C847 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C848 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
+C849 divider_2/mc2 divider_2/and_0/OUT 0.05fF
+C850 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
+C851 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
+C852 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
+C853 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
+C854 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
+C855 divbuf_2/OUT3 divbuf_2/OUT 0.26fF
+C856 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
+C857 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C858 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
+C859 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
+C860 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
+C861 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
+C862 divbuf_5/IN divbuf_5/OUT5 0.00fF
+C863 divbuf_17/OUT divbuf_17/OUT5 43.38fF
+C864 divider_2/tspc_1/Q divider_2/nor_0/B 0.51fF
+C865 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
+C866 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C867 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
+C868 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
+C869 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
+C870 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
+C871 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
+C872 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
+C873 divbuf_18/OUT5 divbuf_18/IN 0.00fF
+C874 divbuf_18/a_492_n240# divbuf_18/OUT2 0.42fF
+C875 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
+C876 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
+C877 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
+C878 divider_2/and_0/A divider_2/and_0/B 0.18fF
+C879 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
+C880 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
+C881 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C882 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
+C883 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
+C884 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
+C885 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C886 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
+C887 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
+C888 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
+C889 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
+C890 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
+C891 divbuf_14/OUT3 divbuf_14/OUT 0.26fF
+C892 divbuf_14/OUT4 divbuf_14/OUT5 20.26fF
+C893 filter_0/v divbuf_0/OUT2 0.06fF
+C894 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
+C895 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF
+C896 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C897 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
+C898 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
+C899 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C900 divbuf_22/OUT divbuf_22/OUT4 1.11fF
+C901 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
+C902 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C903 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF
+C904 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
+C905 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
+C906 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
+C907 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
+C908 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
+C909 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
+C910 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C911 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C912 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C913 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
+C914 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
+C915 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
+C916 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
+C917 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
+C918 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
+C919 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
+C920 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
+C921 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
+C922 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C923 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
+C924 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C925 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C926 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
+C927 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF
+C928 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
+C929 divbuf_6/IN divbuf_6/OUT5 0.00fF
+C930 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
+C931 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
+C932 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
+C933 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
+C934 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
+C935 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
+C936 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
+C937 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
+C938 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
+C939 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C940 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C941 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
+C942 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF
+C943 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
+C944 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
+C945 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
+C946 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
+C947 divider_1/mc2 divider_1/and_0/OUT 0.05fF
+C948 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
+C949 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
+C950 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
+C951 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
+C952 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
+C953 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
+C954 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
+C955 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
+C956 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
+C957 divbuf_18/OUT ro_complete_0/cbank_1/v 0.05fF
+C958 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
+C959 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
+C960 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
+C961 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
+C962 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
+C963 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C964 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
+C965 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C966 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C967 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
+C968 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
+C969 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
+C970 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
+C971 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
+C972 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
+C973 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
+C974 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF
+C975 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
+C976 divbuf_19/OUT divbuf_19/OUT5 43.38fF
+C977 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C978 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
+C979 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
+C980 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
+C981 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
+C982 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
+C983 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
+C984 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
+C985 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C986 divbuf_16/OUT5 divbuf_16/IN 0.00fF
+C987 divbuf_23/IN divbuf_23/OUT5 0.00fF
+C988 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
+C989 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
+C990 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
+C991 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
+C992 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
+C993 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
+C994 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
+C995 divbuf_21/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
+C996 divbuf_20/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C997 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
+C998 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
+C999 divbuf_20/OUT divbuf_20/OUT2 0.06fF
+C1000 divbuf_21/OUT divbuf_21/OUT3 0.26fF
+C1001 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
+C1002 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
+C1003 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
+C1004 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
+C1005 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
+C1006 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.00fF
+C1007 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
+C1008 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
+C1009 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
+C1010 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
+C1011 divbuf_25/OUT2 divbuf_25/OUT3 1.37fF
+C1012 divbuf_22/OUT ro_complete_0/cbank_1/v 0.05fF
+C1013 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
+C1014 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C1015 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
+C1016 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
+C1017 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
+C1018 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1019 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
+C1020 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
+C1021 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
+C1022 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
+C1023 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
+C1024 pd_1/R pd_1/UP 0.45fF
+C1025 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
+C1026 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
+C1027 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C1028 divbuf_14/OUT5 divbuf_14/OUT 43.38fF
+C1029 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
+C1030 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
+C1031 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF
+C1032 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
+C1033 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
+C1034 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
+C1035 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1036 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
+C1037 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
+C1038 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
+C1039 divbuf_13/IN divbuf_13/OUT5 0.00fF
+C1040 cp_0/a_1710_0# cp_0/out 0.84fF
+C1041 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
+C1042 divbuf_20/OUT divbuf_19/OUT 3.23fF
+C1043 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C1044 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
+C1045 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
+C1046 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C1047 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1048 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF
+C1049 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
+C1050 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
+C1051 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1052 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
+C1053 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
+C1054 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1055 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C1056 divbuf_19/OUT divbuf_19/OUT2 0.06fF
+C1057 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
+C1058 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
+C1059 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
+C1060 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
+C1061 divider_2/nor_0/B divider_2/tspc_2/Q 0.22fF
+C1062 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
+C1063 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF
+C1064 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C1065 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1066 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
+C1067 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
+C1068 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C1069 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
+C1070 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
+C1071 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
+C1072 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
+C1073 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
+C1074 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
+C1075 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
+C1076 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
+C1077 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
+C1078 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
+C1079 divbuf_14/a_492_n240# divbuf_14/OUT2 0.42fF
+C1080 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C1081 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
+C1082 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
+C1083 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C1084 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF
+C1085 divbuf_16/OUT5 divbuf_16/OUT 43.38fF
+C1086 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
+C1087 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
+C1088 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
+C1089 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
+C1090 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
+C1091 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C1092 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C1093 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
+C1094 divbuf_17/a_492_n240# divbuf_17/IN 0.13fF
+C1095 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
+C1096 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
+C1097 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
+C1098 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
+C1099 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
+C1100 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_740_n680# 0.33fF
+C1101 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1102 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
+C1103 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
+C1104 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
+C1105 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
+C1106 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
+C1107 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
+C1108 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1109 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
+C1110 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1111 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
+C1112 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
+C1113 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
+C1114 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
+C1115 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
+C1116 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
+C1117 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C1118 divbuf_20/OUT divbuf_20/OUT4 1.11fF
+C1119 divbuf_21/OUT divbuf_21/OUT5 43.38fF
+C1120 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
+C1121 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
+C1122 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1123 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
+C1124 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
+C1125 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
+C1126 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
+C1127 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
+C1128 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
+C1129 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
+C1130 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
+C1131 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
+C1132 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C1133 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
+C1134 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
+C1135 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
+C1136 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
+C1137 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1138 divbuf_1/IN divbuf_1/a_492_n240# 0.13fF
+C1139 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
+C1140 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C1141 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
+C1142 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
+C1143 io_clamp_high[2] io_analog[6] 0.53fF
+C1144 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1145 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
+C1146 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
+C1147 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
+C1148 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
+C1149 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
+C1150 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
+C1151 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
+C1152 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C1153 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
+C1154 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
+C1155 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1156 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
+C1157 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
+C1158 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
+C1159 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1160 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
+C1161 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
+C1162 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1163 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
+C1164 pd_0/DOWN pd_0/R 0.36fF
+C1165 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
+C1166 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
+C1167 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
+C1168 cp_0/a_1710_0# cp_0/down 0.32fF
+C1169 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
+C1170 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
+C1171 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
+C1172 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
+C1173 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C1174 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF
+C1175 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
+C1176 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
+C1177 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
+C1178 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C1179 divbuf_16/OUT4 divbuf_16/OUT 1.11fF
+C1180 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
+C1181 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
+C1182 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C1183 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1184 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
+C1185 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1186 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
+C1187 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
+C1188 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
+C1189 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
+C1190 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
+C1191 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
+C1192 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
+C1193 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
+C1194 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF
+C1195 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
+C1196 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
+C1197 divbuf_19/IN divbuf_19/OUT5 0.00fF
+C1198 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
+C1199 divbuf_21/OUT ro_complete_0/cbank_1/v 0.05fF
+C1200 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C1201 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1202 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C1203 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1204 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
+C1205 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
+C1206 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C1207 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1208 divider_1/nor_1/B divider_1/nor_0/B 0.47fF
+C1209 divider_1/tspc_0/Z2 divider_1/tspc_0/Z1 1.07fF
+C1210 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
+C1211 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
+C1212 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
+C1213 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C1214 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C1215 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
+C1216 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
+C1217 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
+C1218 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
+C1219 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
+C1220 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
+C1221 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
+C1222 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
+C1223 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/switch_1/vin 0.19fF
+C1224 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
+C1225 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
+C1226 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
+C1227 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C1228 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C1229 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
+C1230 divider_1/prescaler_0/Out divider_1/clk 0.51fF
+C1231 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
+C1232 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
+C1233 divbuf_3/IN divbuf_3/OUT5 0.00fF
+C1234 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
+C1235 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
+C1236 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1237 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1238 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C1239 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C1240 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
+C1241 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
+C1242 divbuf_17/a_492_n240# divbuf_17/OUT2 0.42fF
+C1243 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
+C1244 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
+C1245 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF
+C1246 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF
+C1247 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
+C1248 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
+C1249 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1250 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
+C1251 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
+C1252 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
+C1253 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
+C1254 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C1255 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
+C1256 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
+C1257 divbuf_4/IN divbuf_4/OUT5 0.00fF
+C1258 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
+C1259 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1260 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
+C1261 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
+C1262 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
+C1263 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
+C1264 divbuf_23/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1265 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
+C1266 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
+C1267 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
+C1268 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
+C1269 divider_1/tspc_0/Z4 divider_1/tspc_1/Q 0.15fF
+C1270 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
+C1271 divider_0/nor_0/B divider_0/and_0/A 0.26fF
+C1272 divider_2/tspc_1/Q divider_2/tspc_1/a_630_n680# 0.04fF
+C1273 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1274 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
+C1275 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
+C1276 divider_2/nor_1/B divider_2/tspc_0/Z3 0.38fF
+C1277 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
+C1278 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
+C1279 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
+C1280 divider_2/mc2 divider_2/and_0/out1 0.06fF
+C1281 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
+C1282 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
+C1283 divbuf_25/OUT3 divbuf_25/OUT 0.26fF
+C1284 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
+C1285 divbuf_19/OUT ro_complete_0/cbank_1/v 0.05fF
+C1286 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
+C1287 divider_0/nor_1/B divider_0/and_0/B 0.29fF
+C1288 io_clamp_low[1] io_analog[5] 0.53fF
+C1289 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
+C1290 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
+C1291 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
+C1292 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
+C1293 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
+C1294 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
+C1295 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
+C1296 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
+C1297 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
+C1298 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
+C1299 divbuf_20/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1300 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
+C1301 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
+C1302 divbuf_2/IN divbuf_2/OUT5 0.00fF
+C1303 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
+C1304 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
+C1305 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
+C1306 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
+C1307 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
+C1308 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
+C1309 divbuf_10/IN divbuf_10/OUT5 0.00fF
+C1310 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
+C1311 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
+C1312 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
+C1313 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
+C1314 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C1315 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
+C1316 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
+C1317 divbuf_19/OUT divbuf_19/OUT3 0.26fF
+C1318 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
+C1319 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
+C1320 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
+C1321 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
+C1322 divbuf_21/OUT divbuf_22/OUT 2.71fF
+C1323 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C1324 ro_complete_1/a4 ro_complete_1/cbank_0/switch_1/vin 0.09fF
+C1325 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
+C1326 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
+C1327 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1328 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1329 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
+C1330 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
+C1331 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1332 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
+C1333 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
+C1334 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
+C1335 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
+C1336 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1337 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1338 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
+C1339 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
+C1340 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
+C1341 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
+C1342 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
+C1343 divider_2/prescaler_0/Out divider_2/clk 0.51fF
+C1344 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
+C1345 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
+C1346 divbuf_19/OUT divbuf_18/OUT 2.98fF
+C1347 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
+C1348 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1349 divbuf_22/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1350 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C1351 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
+C1352 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
+C1353 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
+C1354 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
+C1355 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
+C1356 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
+C1357 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
+C1358 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C1359 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1360 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
+C1361 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
+C1362 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
+C1363 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
+C1364 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
+C1365 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C1366 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
+C1367 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
+C1368 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
+C1369 divbuf_14/a_492_n240# divbuf_14/OUT 0.00fF
+C1370 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
+C1371 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
+C1372 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C1373 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C1374 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1375 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
+C1376 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1377 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
+C1378 divbuf_3/OUT2 divbuf_3/OUT 0.06fF
+C1379 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
+C1380 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
+C1381 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
+C1382 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1383 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1384 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C1385 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
+C1386 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
+C1387 divider_1/mc2 divider_1/and_0/out1 0.06fF
+C1388 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
+C1389 divider_2/mc2 divider_2/nor_0/B 0.06fF
+C1390 divbuf_7/IN divbuf_7/OUT5 0.00fF
+C1391 pd_1/R pd_1/and_pd_0/Z1 0.02fF
+C1392 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
+C1393 divbuf_19/a_492_n240# divbuf_19/IN 0.13fF
+C1394 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
+C1395 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1396 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C1397 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
+C1398 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
+C1399 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1400 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1401 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
+C1402 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
+C1403 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
+C1404 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
+C1405 divider_2/nor_1/B divider_2/tspc_0/Z4 0.22fF
+C1406 pd_0/R pd_0/UP 0.45fF
+C1407 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
+C1408 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
+C1409 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1410 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF
+C1411 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF
+C1412 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1413 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1414 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
+C1415 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
+C1416 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
+C1417 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
+C1418 pd_1/DOWN pd_1/R 0.36fF
+C1419 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
+C1420 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
+C1421 divider_2/mc2 divider_2/and_0/A 0.16fF
+C1422 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
+C1423 divbuf_25/OUT5 divbuf_25/OUT 43.38fF
+C1424 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1425 divider_0/mc2 divider_0/nor_1/B 0.15fF
+C1426 divbuf_0/OUT2 divbuf_0/OUT5 0.02fF
+C1427 divbuf_18/OUT4 divbuf_18/OUT3 5.16fF
+C1428 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1429 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
+C1430 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
+C1431 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
+C1432 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
+C1433 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
+C1434 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
+C1435 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
+C1436 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
+C1437 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
+C1438 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
+C1439 divbuf_24/IN divbuf_24/OUT5 0.00fF
+C1440 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
+C1441 ro_complete_0/cbank_0/switch_0/vin divbuf_21/OUT 0.12fF
+C1442 divbuf_20/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1443 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
+C1444 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
+C1445 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
+C1446 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
+C1447 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
+C1448 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
+C1449 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1450 divider_0/nor_0/A divider_0/and_0/B 0.08fF
+C1451 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
+C1452 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
+C1453 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
+C1454 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
+C1455 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1456 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1457 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
+C1458 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z3 0.06fF
+C1459 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
+C1460 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
+C1461 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
+C1462 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
+C1463 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
+C1464 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
+C1465 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
+C1466 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
+C1467 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
+C1468 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1469 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
+C1470 divbuf_21/OUT divbuf_21/a_492_n240# 0.00fF
+C1471 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
+C1472 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1473 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
+C1474 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
+C1475 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
+C1476 divider_1/mc2 divider_1/nor_0/B 0.06fF
+C1477 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
+C1478 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
+C1479 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
+C1480 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1481 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1482 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
+C1483 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
+C1484 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1485 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1486 divider_1/and_0/OUT divider_1/clk 0.04fF
+C1487 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
+C1488 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
+C1489 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
+C1490 divbuf_17/OUT3 divbuf_17/OUT2 1.37fF
+C1491 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
+C1492 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
+C1493 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
+C1494 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
+C1495 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
+C1496 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
+C1497 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
+C1498 divbuf_23/OUT ro_complete_0/cbank_1/v 0.10fF
+C1499 ro_complete_0/cbank_0/switch_5/vin divbuf_18/OUT 0.09fF
+C1500 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
+C1501 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
+C1502 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
+C1503 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
+C1504 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1505 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
+C1506 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
+C1507 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
+C1508 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
+C1509 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
+C1510 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
+C1511 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
+C1512 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
+C1513 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1514 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
+C1515 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
+C1516 divider_1/nor_0/A divider_1/and_0/A 0.01fF
+C1517 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
+C1518 divbuf_19/OUT4 divbuf_19/OUT5 20.26fF
+C1519 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
+C1520 divbuf_14/IN divbuf_14/OUT5 0.00fF
+C1521 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
+C1522 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
+C1523 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
+C1524 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1525 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF
+C1526 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z1 1.07fF
+C1527 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
+C1528 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1529 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
+C1530 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
+C1531 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
+C1532 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
+C1533 divider_1/mc2 divider_1/and_0/A 0.16fF
+C1534 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
+C1535 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
+C1536 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
+C1537 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
+C1538 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1539 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1540 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
+C1541 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
+C1542 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
+C1543 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
+C1544 divbuf_17/OUT5 divbuf_17/IN 0.00fF
+C1545 divider_2/nor_1/B divider_2/and_0/B 0.29fF
+C1546 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
+C1547 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
+C1548 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
+C1549 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
+C1550 ro_complete_0/cbank_0/switch_1/vin divbuf_22/OUT 0.13fF
+C1551 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1552 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
+C1553 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
+C1554 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
+C1555 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1556 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1557 divbuf_23/OUT divbuf_23/OUT3 0.26fF
+C1558 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
+C1559 divider_1/tspc_2/Q divider_1/tspc_1/Z1 0.01fF
+C1560 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.35fF
+C1561 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
+C1562 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1563 divider_1/nor_0/B divider_1/and_0/B 0.31fF
+C1564 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
+C1565 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C1566 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
+C1567 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
+C1568 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
+C1569 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
+C1570 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
+C1571 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
+C1572 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
+C1573 divider_2/tspc_1/Q divider_2/nor_1/B 0.22fF
+C1574 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
+C1575 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
+C1576 divider_2/tspc_1/Q divider_2/tspc_0/Z3 0.45fF
+C1577 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
+C1578 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
+C1579 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1580 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1581 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
+C1582 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
+C1583 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
+C1584 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
+C1585 divbuf_18/a_492_n240# divbuf_18/IN 0.13fF
+C1586 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
+C1587 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C1588 divbuf_18/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1589 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
+C1590 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
+C1591 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1592 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1593 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF
+C1594 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
+C1595 divbuf_18/OUT4 divbuf_18/OUT5 20.26fF
+C1596 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
+C1597 io_clamp_high[0] io_analog[4] 0.53fF
+C1598 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
+C1599 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
+C1600 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1601 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
+C1602 divider_1/and_0/A divider_1/and_0/B 0.18fF
+C1603 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
+C1604 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
+C1605 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
+C1606 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
+C1607 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
+C1608 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
+C1609 divider_2/nor_0/B divider_2/and_0/A 0.26fF
+C1610 divbuf_20/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1611 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
+C1612 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
+C1613 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C1614 divider_0/mc2 divider_0/nor_0/A 0.04fF
+C1615 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1616 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
+C1617 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
+C1618 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
+C1619 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
+C1620 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
+C1621 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z4 0.00fF
+C1622 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
+C1623 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
+C1624 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1625 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
+C1626 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
+C1627 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
+C1628 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
+C1629 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
+C1630 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
+C1631 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
+C1632 divider_1/Out divider_1/nor_1/B 0.22fF
+C1633 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1634 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
+C1635 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1636 divider_0/prescaler_0/Out divider_0/clk 0.51fF
+C1637 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
+C1638 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
+C1639 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
+C1640 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
+C1641 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.35fF
+C1642 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
+C1643 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
+C1644 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
+C1645 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
+C1646 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C1647 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
+C1648 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
+C1649 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
+C1650 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
+C1651 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
+C1652 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
+C1653 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF
+C1654 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
+C1655 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
+C1656 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
+C1657 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
+C1658 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
+C1659 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
+C1660 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
+C1661 divbuf_20/OUT ro_complete_0/cbank_2/v 0.05fF
+C1662 divbuf_15/OUT divbuf_15/OUT5 43.38fF
+C1663 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
+C1664 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
 Xpd_0 vdda1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
 Xpd_1 vdda1 vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd
 Xcp_0 cp_0/vbias vdda1 gnd cp_0/out cp_0/down cp_0/upbar cp
 Xfilter_0 vssa1 filter_0/v filter
-Xro_complete_0 divbuf_7/OUT divbuf_6/OUT divbuf_2/OUT divbuf_4/OUT divbuf_3/OUT divbuf_5/OUT
-+ ro_complete
-Xdivbuf_0 vdda1 divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4
-+ divbuf_0/OUT5 gnd divbuf
+Xro_complete_0 divbuf_18/OUT divbuf_19/OUT divbuf_23/OUT divbuf_21/OUT divbuf_22/OUT
++ divbuf_20/OUT ro_complete
 Xro_complete_1 ro_complete_1/a0 ro_complete_1/a1 ro_complete_1/a5 ro_complete_1/a4
 + ro_complete_1/a3 ro_complete_1/a2 ro_complete
+Xdivbuf_0 vdda1 divbuf_0/IN filter_0/v divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 divbuf_0/OUT5
++ vssa1 divbuf
 Xdivbuf_1 vdda1 divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4
-+ divbuf_1/OUT5 gnd divbuf
++ divbuf_1/OUT5 vssa1 divbuf
 Xdivbuf_2 vdda1 divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4
-+ divbuf_2/OUT5 gnd divbuf
++ divbuf_2/OUT5 vssa1 divbuf
 Xdivbuf_3 vdda1 divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4
-+ divbuf_3/OUT5 gnd divbuf
++ divbuf_3/OUT5 vssa1 divbuf
 Xdivbuf_4 vdda1 divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4
-+ divbuf_4/OUT5 gnd divbuf
++ divbuf_4/OUT5 vssa1 divbuf
 Xdivbuf_5 vdda1 divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4
-+ divbuf_5/OUT5 gnd divbuf
-Xdivbuf_6 vdda1 divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4
-+ divbuf_6/OUT5 gnd divbuf
++ divbuf_5/OUT5 vssa1 divbuf
+Xdivbuf_21 vdda1 divbuf_21/IN divbuf_21/OUT divbuf_21/OUT2 divbuf_21/OUT3 divbuf_21/OUT4
++ divbuf_21/OUT5 gnd divbuf
+Xdivbuf_20 vdda1 divbuf_20/IN divbuf_20/OUT divbuf_20/OUT2 divbuf_20/OUT3 divbuf_20/OUT4
++ divbuf_20/OUT5 gnd divbuf
 Xdivbuf_10 vdda1 divbuf_10/IN divbuf_10/OUT divbuf_10/OUT2 divbuf_10/OUT3 divbuf_10/OUT4
 + divbuf_10/OUT5 gnd divbuf
-Xdivbuf_20 vdda1 divbuf_20/IN divbuf_20/OUT divbuf_20/OUT2 divbuf_20/OUT3 divbuf_20/OUT4
-+ divbuf_20/OUT5 vssa1 divbuf
-Xdivbuf_21 vdda1 divbuf_21/IN divbuf_21/OUT divbuf_21/OUT2 divbuf_21/OUT3 divbuf_21/OUT4
-+ divbuf_21/OUT5 vssa1 divbuf
-Xdivbuf_7 vdda1 divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4
-+ divbuf_7/OUT5 gnd divbuf
+Xdivbuf_6 vdda1 divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4
++ divbuf_6/OUT5 vssa1 divbuf
+Xdivbuf_22 vdda1 divbuf_22/IN divbuf_22/OUT divbuf_22/OUT2 divbuf_22/OUT3 divbuf_22/OUT4
++ divbuf_22/OUT5 gnd divbuf
 Xdivbuf_11 vdda1 divbuf_11/IN divbuf_11/OUT divbuf_11/OUT2 divbuf_11/OUT3 divbuf_11/OUT4
 + divbuf_11/OUT5 gnd divbuf
-Xdivbuf_22 vdda1 divbuf_22/IN divbuf_22/OUT divbuf_22/OUT2 divbuf_22/OUT3 divbuf_22/OUT4
-+ divbuf_22/OUT5 vssa1 divbuf
+Xdivbuf_7 vdda1 divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4
++ divbuf_7/OUT5 vssa1 divbuf
+Xdivbuf_23 vdda1 divbuf_23/IN divbuf_23/OUT divbuf_23/OUT2 divbuf_23/OUT3 divbuf_23/OUT4
++ divbuf_23/OUT5 gnd divbuf
 Xdivbuf_8 vdda1 divbuf_8/IN divbuf_8/OUT divbuf_8/OUT2 divbuf_8/OUT3 divbuf_8/OUT4
-+ divbuf_8/OUT5 gnd divbuf
++ divbuf_8/OUT5 vssa1 divbuf
 Xdivbuf_12 vdda1 divbuf_12/IN divbuf_12/OUT divbuf_12/OUT2 divbuf_12/OUT3 divbuf_12/OUT4
 + divbuf_12/OUT5 gnd divbuf
-Xdivbuf_23 vdda1 divbuf_23/IN divbuf_23/OUT divbuf_23/OUT2 divbuf_23/OUT3 divbuf_23/OUT4
-+ divbuf_23/OUT5 vssa1 divbuf
-Xdivbuf_9 vdda1 divbuf_9/IN divbuf_9/OUT divbuf_9/OUT2 divbuf_9/OUT3 divbuf_9/OUT4
-+ divbuf_9/OUT5 gnd divbuf
+Xdivbuf_24 vdda1 divbuf_24/IN divbuf_24/OUT divbuf_24/OUT2 divbuf_24/OUT3 divbuf_24/OUT4
++ divbuf_24/OUT5 gnd divbuf
 Xdivbuf_13 vdda1 divbuf_13/IN divbuf_13/OUT divbuf_13/OUT2 divbuf_13/OUT3 divbuf_13/OUT4
 + divbuf_13/OUT5 gnd divbuf
-Xdivbuf_24 vdda1 divbuf_24/IN divbuf_24/OUT divbuf_24/OUT2 divbuf_24/OUT3 divbuf_24/OUT4
-+ divbuf_24/OUT5 vssa1 divbuf
-Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider
+Xdivbuf_9 vdda1 divbuf_9/IN divbuf_9/OUT divbuf_9/OUT2 divbuf_9/OUT3 divbuf_9/OUT4
++ divbuf_9/OUT5 vssa1 divbuf
+Xdivbuf_25 vdda1 divbuf_25/IN divbuf_25/OUT divbuf_25/OUT2 divbuf_25/OUT3 divbuf_25/OUT4
++ divbuf_25/OUT5 gnd divbuf
 Xdivbuf_14 vdda1 divbuf_14/IN divbuf_14/OUT divbuf_14/OUT2 divbuf_14/OUT3 divbuf_14/OUT4
 + divbuf_14/OUT5 gnd divbuf
-Xdivbuf_25 vdda1 divbuf_25/IN filter_0/v divbuf_25/OUT2 divbuf_25/OUT3 divbuf_25/OUT4
-+ divbuf_25/OUT5 vssa1 divbuf
+Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider
 Xdivbuf_15 vdda1 divbuf_15/IN divbuf_15/OUT divbuf_15/OUT2 divbuf_15/OUT3 divbuf_15/OUT4
 + divbuf_15/OUT5 gnd divbuf
 Xdivider_1 vssa1 vdda1 divider_1/Out divider_1/clk divider_1/mc2 divider
 Xdivbuf_16 vdda1 divbuf_16/IN divbuf_16/OUT divbuf_16/OUT2 divbuf_16/OUT3 divbuf_16/OUT4
-+ divbuf_16/OUT5 vssa1 divbuf
++ divbuf_16/OUT5 gnd divbuf
 Xdivider_2 vssa1 vdda1 divider_2/Out divider_2/clk divider_2/mc2 divider
 Xdivbuf_17 vdda1 divbuf_17/IN divbuf_17/OUT divbuf_17/OUT2 divbuf_17/OUT3 divbuf_17/OUT4
-+ divbuf_17/OUT5 vssa1 divbuf
++ divbuf_17/OUT5 gnd divbuf
 Xdivbuf_18 vdda1 divbuf_18/IN divbuf_18/OUT divbuf_18/OUT2 divbuf_18/OUT3 divbuf_18/OUT4
-+ divbuf_18/OUT5 vssa1 divbuf
++ divbuf_18/OUT5 gnd divbuf
 Xdivbuf_19 vdda1 divbuf_19/IN divbuf_19/OUT divbuf_19/OUT2 divbuf_19/OUT3 divbuf_19/OUT4
-+ divbuf_19/OUT5 vssa1 divbuf
++ divbuf_19/OUT5 gnd divbuf
 Xpll_full_0 vdda1 pll_full
-Xpll_full_1 vdda1 pll_full
-C2039 io_analog[4] vssa1 43.96fF
-C2040 io_analog[5] vssa1 44.13fF
-C2041 io_analog[6] vssa1 43.46fF
-C2042 io_in_3v3[0] vssa1 0.61fF
-C2043 io_oeb[26] vssa1 0.61fF
-C2044 io_in[0] vssa1 0.61fF
-C2045 io_out[26] vssa1 0.61fF
-C2046 io_out[0] vssa1 0.61fF
-C2047 io_in[26] vssa1 0.61fF
-C2048 io_oeb[0] vssa1 0.61fF
-C2049 io_in_3v3[26] vssa1 0.61fF
-C2050 io_in_3v3[1] vssa1 0.61fF
-C2051 io_oeb[25] vssa1 0.61fF
-C2052 io_in[1] vssa1 0.61fF
-C2053 io_out[25] vssa1 0.61fF
-C2054 io_out[1] vssa1 0.61fF
-C2055 io_in[25] vssa1 0.61fF
-C2056 io_oeb[1] vssa1 0.61fF
-C2057 io_in_3v3[25] vssa1 0.61fF
-C2058 io_in_3v3[2] vssa1 0.61fF
-C2059 io_oeb[24] vssa1 0.61fF
-C2060 io_in[2] vssa1 0.61fF
-C2061 io_out[24] vssa1 0.61fF
-C2062 io_out[2] vssa1 0.61fF
-C2063 io_in[24] vssa1 0.61fF
-C2064 io_oeb[2] vssa1 0.61fF
-C2065 io_in_3v3[24] vssa1 0.61fF
-C2066 io_in_3v3[3] vssa1 0.61fF
-C2067 io_in[3] vssa1 0.61fF
-C2068 gpio_noesd[17] vssa1 2.32fF
-C2069 gpio_analog[17] vssa1 2.30fF
-C2070 io_out[3] vssa1 0.61fF
-C2071 io_oeb[3] vssa1 0.61fF
-C2072 io_in_3v3[4] vssa1 0.61fF
-C2073 io_in[4] vssa1 0.61fF
-C2074 io_out[4] vssa1 0.61fF
-C2075 io_oeb[4] vssa1 0.61fF
-C2076 io_oeb[23] vssa1 0.61fF
-C2077 io_out[23] vssa1 0.61fF
-C2078 io_in[23] vssa1 0.61fF
-C2079 io_in_3v3[23] vssa1 0.61fF
-C2080 gpio_noesd[16] vssa1 2.30fF
-C2081 gpio_analog[16] vssa1 2.30fF
-C2082 io_in_3v3[5] vssa1 0.61fF
-C2083 io_in[5] vssa1 0.61fF
-C2084 io_out[5] vssa1 0.61fF
-C2085 io_oeb[5] vssa1 0.61fF
-C2086 io_oeb[22] vssa1 0.61fF
-C2087 io_out[22] vssa1 0.61fF
-C2088 io_in[22] vssa1 0.61fF
-C2089 io_in_3v3[22] vssa1 0.61fF
-C2090 gpio_noesd[15] vssa1 2.31fF
-C2091 gpio_analog[15] vssa1 2.30fF
-C2092 io_in_3v3[6] vssa1 0.61fF
-C2093 io_in[6] vssa1 0.61fF
-C2094 io_out[6] vssa1 0.61fF
-C2095 io_oeb[6] vssa1 0.61fF
-C2096 io_oeb[21] vssa1 0.61fF
-C2097 io_out[21] vssa1 0.61fF
-C2098 io_in[21] vssa1 0.61fF
-C2099 io_in_3v3[21] vssa1 0.61fF
-C2100 gpio_noesd[14] vssa1 2.30fF
-C2101 gpio_analog[14] vssa1 2.29fF
-C2102 vssd2 vssa1 38.54fF
-C2103 vssd1 vssa1 13.04fF
-C2104 vdda2 vssa1 38.30fF
-C2105 io_oeb[20] vssa1 0.61fF
-C2106 io_out[20] vssa1 0.61fF
-C2107 io_in[20] vssa1 0.61fF
-C2108 io_in_3v3[20] vssa1 0.61fF
-C2109 gpio_noesd[13] vssa1 2.31fF
-C2110 gpio_analog[13] vssa1 2.30fF
-C2111 gpio_analog[0] vssa1 0.61fF
-C2112 gpio_noesd[0] vssa1 0.61fF
-C2113 io_in_3v3[7] vssa1 0.61fF
-C2114 io_in[7] vssa1 0.61fF
-C2115 io_out[7] vssa1 0.61fF
-C2116 io_oeb[7] vssa1 0.61fF
-C2117 io_oeb[19] vssa1 0.61fF
-C2118 io_out[19] vssa1 0.61fF
-C2119 io_in[19] vssa1 0.61fF
-C2120 io_in_3v3[19] vssa1 0.61fF
-C2121 gpio_noesd[12] vssa1 2.32fF
-C2122 gpio_analog[12] vssa1 2.30fF
-C2123 gpio_analog[1] vssa1 0.61fF
-C2124 gpio_noesd[1] vssa1 0.61fF
-C2125 io_in_3v3[8] vssa1 0.61fF
-C2126 io_in[8] vssa1 0.61fF
-C2127 io_out[8] vssa1 0.61fF
-C2128 io_oeb[8] vssa1 0.61fF
-C2129 io_oeb[18] vssa1 0.61fF
-C2130 io_out[18] vssa1 0.61fF
-C2131 io_in[18] vssa1 0.61fF
-C2132 io_in_3v3[18] vssa1 0.61fF
-C2133 gpio_noesd[11] vssa1 2.30fF
-C2134 gpio_analog[11] vssa1 2.29fF
-C2135 gpio_analog[2] vssa1 0.61fF
-C2136 gpio_noesd[2] vssa1 0.61fF
-C2137 io_in_3v3[9] vssa1 0.61fF
-C2138 io_in[9] vssa1 0.61fF
-C2139 io_out[9] vssa1 0.61fF
-C2140 io_oeb[9] vssa1 0.61fF
-C2141 io_oeb[17] vssa1 0.61fF
-C2142 io_out[17] vssa1 0.61fF
-C2143 io_in[17] vssa1 0.61fF
-C2144 io_in_3v3[17] vssa1 0.61fF
-C2145 gpio_noesd[10] vssa1 2.31fF
-C2146 gpio_analog[10] vssa1 2.29fF
-C2147 gpio_analog[3] vssa1 0.61fF
-C2148 gpio_noesd[3] vssa1 0.61fF
-C2149 io_in_3v3[10] vssa1 0.61fF
-C2150 io_in[10] vssa1 0.61fF
-C2151 io_out[10] vssa1 0.61fF
-C2152 io_oeb[10] vssa1 0.61fF
-C2153 io_oeb[16] vssa1 0.61fF
-C2154 io_out[16] vssa1 0.61fF
-C2155 io_in[16] vssa1 0.61fF
-C2156 io_in_3v3[16] vssa1 0.61fF
-C2157 gpio_noesd[9] vssa1 2.28fF
-C2158 gpio_analog[9] vssa1 2.28fF
-C2159 gpio_analog[4] vssa1 0.61fF
-C2160 gpio_noesd[4] vssa1 0.61fF
-C2161 io_in_3v3[11] vssa1 0.61fF
-C2162 io_in[11] vssa1 0.61fF
-C2163 io_out[11] vssa1 0.61fF
-C2164 io_oeb[11] vssa1 0.61fF
-C2165 io_oeb[15] vssa1 0.61fF
-C2166 io_out[15] vssa1 0.61fF
-C2167 io_in[15] vssa1 0.61fF
-C2168 io_in_3v3[15] vssa1 0.61fF
-C2169 gpio_noesd[8] vssa1 2.28fF
-C2170 gpio_analog[8] vssa1 2.26fF
-C2171 gpio_analog[5] vssa1 0.61fF
-C2172 gpio_noesd[5] vssa1 0.61fF
-C2173 io_in_3v3[12] vssa1 0.61fF
-C2174 io_in[12] vssa1 0.61fF
-C2175 io_out[12] vssa1 0.61fF
-C2176 io_oeb[12] vssa1 0.61fF
-C2177 io_oeb[14] vssa1 0.61fF
-C2178 io_out[14] vssa1 0.61fF
-C2179 io_in[14] vssa1 0.61fF
-C2180 io_in_3v3[14] vssa1 0.61fF
-C2181 gpio_noesd[7] vssa1 2.30fF
-C2182 gpio_analog[7] vssa1 2.28fF
-C2183 vssa2 vssa1 38.35fF
-C2184 gpio_analog[6] vssa1 5.71fF
-C2185 gpio_noesd[6] vssa1 5.70fF
-C2186 io_in_3v3[13] vssa1 0.61fF
-C2187 io_in[13] vssa1 0.61fF
-C2188 io_out[13] vssa1 0.61fF
-C2189 io_oeb[13] vssa1 0.61fF
-C2190 vccd1 vssa1 39.84fF
-C2191 vccd2 vssa1 38.46fF
-C2192 io_analog[0] vssa1 19.99fF
-C2193 io_analog[10] vssa1 19.36fF
-C2194 io_analog[1] vssa1 13.17fF
-C2195 io_analog[2] vssa1 12.57fF
-C2196 io_analog[3] vssa1 12.83fF
-C2197 io_clamp_high[0] vssa1 3.58fF
-C2198 io_clamp_low[0] vssa1 3.58fF
-C2199 io_clamp_high[1] vssa1 3.58fF
-C2200 io_clamp_low[1] vssa1 3.58fF
-C2201 io_clamp_high[2] vssa1 3.58fF
-C2202 io_clamp_low[2] vssa1 3.58fF
-C2203 io_analog[7] vssa1 12.74fF
-C2204 io_analog[8] vssa1 13.08fF
-C2205 io_analog[9] vssa1 13.08fF
-C2206 user_irq[2] vssa1 0.63fF
-C2207 user_irq[1] vssa1 0.63fF
-C2208 user_irq[0] vssa1 0.63fF
-C2209 user_clock2 vssa1 0.63fF
-C2210 la_oenb[127] vssa1 0.63fF
-C2211 la_data_out[127] vssa1 0.63fF
-C2212 la_data_in[127] vssa1 0.63fF
-C2213 la_oenb[126] vssa1 0.63fF
-C2214 la_data_out[126] vssa1 0.63fF
-C2215 la_data_in[126] vssa1 0.63fF
-C2216 la_oenb[125] vssa1 0.63fF
-C2217 la_data_out[125] vssa1 0.63fF
-C2218 la_data_in[125] vssa1 0.63fF
-C2219 la_oenb[124] vssa1 0.63fF
-C2220 la_data_out[124] vssa1 0.63fF
-C2221 la_data_in[124] vssa1 0.63fF
-C2222 la_oenb[123] vssa1 0.63fF
-C2223 la_data_out[123] vssa1 0.63fF
-C2224 la_data_in[123] vssa1 0.63fF
-C2225 la_oenb[122] vssa1 0.63fF
-C2226 la_data_out[122] vssa1 0.63fF
-C2227 la_data_in[122] vssa1 0.63fF
-C2228 la_oenb[121] vssa1 0.63fF
-C2229 la_data_out[121] vssa1 0.63fF
-C2230 la_data_in[121] vssa1 0.63fF
-C2231 la_oenb[120] vssa1 0.63fF
-C2232 la_data_out[120] vssa1 0.63fF
-C2233 la_data_in[120] vssa1 0.63fF
-C2234 la_oenb[119] vssa1 0.63fF
-C2235 la_data_out[119] vssa1 0.63fF
-C2236 la_data_in[119] vssa1 0.63fF
-C2237 la_oenb[118] vssa1 0.63fF
-C2238 la_data_out[118] vssa1 0.63fF
-C2239 la_data_in[118] vssa1 0.63fF
-C2240 la_oenb[117] vssa1 0.63fF
-C2241 la_data_out[117] vssa1 0.63fF
-C2242 la_data_in[117] vssa1 0.63fF
-C2243 la_oenb[116] vssa1 0.63fF
-C2244 la_data_out[116] vssa1 0.63fF
-C2245 la_data_in[116] vssa1 0.63fF
-C2246 la_oenb[115] vssa1 0.63fF
-C2247 la_data_out[115] vssa1 0.63fF
-C2248 la_data_in[115] vssa1 0.63fF
-C2249 la_oenb[114] vssa1 0.63fF
-C2250 la_data_out[114] vssa1 0.63fF
-C2251 la_data_in[114] vssa1 0.63fF
-C2252 la_oenb[113] vssa1 0.63fF
-C2253 la_data_out[113] vssa1 0.63fF
-C2254 la_data_in[113] vssa1 0.63fF
-C2255 la_oenb[112] vssa1 0.63fF
-C2256 la_data_out[112] vssa1 0.63fF
-C2257 la_data_in[112] vssa1 0.63fF
-C2258 la_oenb[111] vssa1 0.63fF
-C2259 la_data_out[111] vssa1 0.63fF
-C2260 la_data_in[111] vssa1 0.63fF
-C2261 la_oenb[110] vssa1 0.63fF
-C2262 la_data_out[110] vssa1 0.63fF
-C2263 la_data_in[110] vssa1 0.63fF
-C2264 la_oenb[109] vssa1 0.63fF
-C2265 la_data_out[109] vssa1 0.63fF
-C2266 la_data_in[109] vssa1 0.63fF
-C2267 la_oenb[108] vssa1 0.63fF
-C2268 la_data_out[108] vssa1 0.63fF
-C2269 la_data_in[108] vssa1 0.63fF
-C2270 la_oenb[107] vssa1 0.63fF
-C2271 la_data_out[107] vssa1 0.63fF
-C2272 la_data_in[107] vssa1 0.63fF
-C2273 la_oenb[106] vssa1 0.63fF
-C2274 la_data_out[106] vssa1 0.63fF
-C2275 la_data_in[106] vssa1 0.63fF
-C2276 la_oenb[105] vssa1 0.63fF
-C2277 la_data_out[105] vssa1 0.63fF
-C2278 la_data_in[105] vssa1 0.63fF
-C2279 la_oenb[104] vssa1 0.63fF
-C2280 la_data_out[104] vssa1 0.63fF
-C2281 la_data_in[104] vssa1 0.63fF
-C2282 la_oenb[103] vssa1 0.63fF
-C2283 la_data_out[103] vssa1 0.63fF
-C2284 la_data_in[103] vssa1 0.63fF
-C2285 la_oenb[102] vssa1 0.63fF
-C2286 la_data_out[102] vssa1 0.63fF
-C2287 la_data_in[102] vssa1 0.63fF
-C2288 la_oenb[101] vssa1 0.63fF
-C2289 la_data_out[101] vssa1 0.63fF
-C2290 la_data_in[101] vssa1 0.63fF
-C2291 la_oenb[100] vssa1 0.63fF
-C2292 la_data_out[100] vssa1 0.63fF
-C2293 la_data_in[100] vssa1 0.63fF
-C2294 la_oenb[99] vssa1 0.63fF
-C2295 la_data_out[99] vssa1 0.63fF
-C2296 la_data_in[99] vssa1 0.63fF
-C2297 la_oenb[98] vssa1 0.63fF
-C2298 la_data_out[98] vssa1 0.63fF
-C2299 la_data_in[98] vssa1 0.63fF
-C2300 la_oenb[97] vssa1 0.63fF
-C2301 la_data_out[97] vssa1 0.63fF
-C2302 la_data_in[97] vssa1 0.63fF
-C2303 la_oenb[96] vssa1 0.63fF
-C2304 la_data_out[96] vssa1 0.63fF
-C2305 la_data_in[96] vssa1 0.63fF
-C2306 la_oenb[95] vssa1 0.63fF
-C2307 la_data_out[95] vssa1 0.63fF
-C2308 la_data_in[95] vssa1 0.63fF
-C2309 la_oenb[94] vssa1 0.63fF
-C2310 la_data_out[94] vssa1 0.63fF
-C2311 la_data_in[94] vssa1 0.63fF
-C2312 la_oenb[93] vssa1 0.63fF
-C2313 la_data_out[93] vssa1 0.63fF
-C2314 la_data_in[93] vssa1 0.63fF
-C2315 la_oenb[92] vssa1 0.63fF
-C2316 la_data_out[92] vssa1 0.63fF
-C2317 la_data_in[92] vssa1 0.63fF
-C2318 la_oenb[91] vssa1 0.63fF
-C2319 la_data_out[91] vssa1 0.63fF
-C2320 la_data_in[91] vssa1 0.63fF
-C2321 la_oenb[90] vssa1 0.63fF
-C2322 la_data_out[90] vssa1 0.63fF
-C2323 la_data_in[90] vssa1 0.63fF
-C2324 la_oenb[89] vssa1 0.63fF
-C2325 la_data_out[89] vssa1 0.63fF
-C2326 la_data_in[89] vssa1 0.63fF
-C2327 la_oenb[88] vssa1 0.63fF
-C2328 la_data_out[88] vssa1 0.63fF
-C2329 la_data_in[88] vssa1 0.63fF
-C2330 la_oenb[87] vssa1 0.63fF
-C2331 la_data_out[87] vssa1 0.63fF
-C2332 la_data_in[87] vssa1 0.63fF
-C2333 la_oenb[86] vssa1 0.63fF
-C2334 la_data_out[86] vssa1 0.63fF
-C2335 la_data_in[86] vssa1 0.63fF
-C2336 la_oenb[85] vssa1 0.63fF
-C2337 la_data_out[85] vssa1 0.63fF
-C2338 la_data_in[85] vssa1 0.63fF
-C2339 la_oenb[84] vssa1 0.63fF
-C2340 la_data_out[84] vssa1 0.63fF
-C2341 la_data_in[84] vssa1 0.63fF
-C2342 la_oenb[83] vssa1 0.63fF
-C2343 la_data_out[83] vssa1 0.63fF
-C2344 la_data_in[83] vssa1 0.63fF
-C2345 la_oenb[82] vssa1 0.63fF
-C2346 la_data_out[82] vssa1 0.63fF
-C2347 la_data_in[82] vssa1 0.63fF
-C2348 la_oenb[81] vssa1 0.63fF
-C2349 la_data_out[81] vssa1 0.63fF
-C2350 la_data_in[81] vssa1 0.63fF
-C2351 la_oenb[80] vssa1 0.63fF
-C2352 la_data_out[80] vssa1 0.63fF
-C2353 la_data_in[80] vssa1 0.63fF
-C2354 la_oenb[79] vssa1 0.63fF
-C2355 la_data_out[79] vssa1 0.63fF
-C2356 la_data_in[79] vssa1 0.63fF
-C2357 la_oenb[78] vssa1 0.63fF
-C2358 la_data_out[78] vssa1 0.63fF
-C2359 la_data_in[78] vssa1 0.63fF
-C2360 la_oenb[77] vssa1 0.63fF
-C2361 la_data_out[77] vssa1 0.63fF
-C2362 la_data_in[77] vssa1 0.63fF
-C2363 la_oenb[76] vssa1 0.63fF
-C2364 la_data_out[76] vssa1 0.63fF
-C2365 la_data_in[76] vssa1 0.63fF
-C2366 la_oenb[75] vssa1 0.63fF
-C2367 la_data_out[75] vssa1 0.63fF
-C2368 la_data_in[75] vssa1 0.63fF
-C2369 la_oenb[74] vssa1 0.63fF
-C2370 la_data_out[74] vssa1 0.63fF
-C2371 la_data_in[74] vssa1 0.63fF
-C2372 la_oenb[73] vssa1 0.63fF
-C2373 la_data_out[73] vssa1 0.63fF
-C2374 la_data_in[73] vssa1 0.63fF
-C2375 la_oenb[72] vssa1 0.63fF
-C2376 la_data_out[72] vssa1 0.63fF
-C2377 la_data_in[72] vssa1 0.63fF
-C2378 la_oenb[71] vssa1 0.63fF
-C2379 la_data_out[71] vssa1 0.63fF
-C2380 la_data_in[71] vssa1 0.63fF
-C2381 la_oenb[70] vssa1 0.63fF
-C2382 la_data_out[70] vssa1 0.63fF
-C2383 la_data_in[70] vssa1 0.63fF
-C2384 la_oenb[69] vssa1 0.63fF
-C2385 la_data_out[69] vssa1 0.63fF
-C2386 la_data_in[69] vssa1 0.63fF
-C2387 la_oenb[68] vssa1 0.63fF
-C2388 la_data_out[68] vssa1 0.63fF
-C2389 la_data_in[68] vssa1 0.63fF
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-C2395 la_data_in[66] vssa1 0.63fF
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-C2402 la_oenb[63] vssa1 0.63fF
-C2403 la_data_out[63] vssa1 0.63fF
-C2404 la_data_in[63] vssa1 0.63fF
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-C2407 la_data_in[62] vssa1 0.63fF
-C2408 la_oenb[61] vssa1 0.63fF
-C2409 la_data_out[61] vssa1 0.63fF
-C2410 la_data_in[61] vssa1 0.63fF
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-C2418 la_data_out[58] vssa1 0.63fF
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-C2420 la_oenb[57] vssa1 0.63fF
-C2421 la_data_out[57] vssa1 0.63fF
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-C2424 la_data_out[56] vssa1 0.63fF
-C2425 la_data_in[56] vssa1 0.63fF
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-C2493 la_data_out[33] vssa1 0.63fF
-C2494 la_data_in[33] vssa1 0.63fF
-C2495 la_oenb[32] vssa1 0.63fF
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-C2498 la_oenb[31] vssa1 0.63fF
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-C2501 la_oenb[30] vssa1 0.63fF
-C2502 la_data_out[30] vssa1 0.63fF
-C2503 la_data_in[30] vssa1 0.63fF
-C2504 la_oenb[29] vssa1 0.63fF
-C2505 la_data_out[29] vssa1 0.63fF
-C2506 la_data_in[29] vssa1 0.63fF
-C2507 la_oenb[28] vssa1 0.63fF
-C2508 la_data_out[28] vssa1 0.63fF
-C2509 la_data_in[28] vssa1 0.63fF
-C2510 la_oenb[27] vssa1 0.63fF
-C2511 la_data_out[27] vssa1 0.63fF
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-C2513 la_oenb[26] vssa1 0.63fF
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-C2515 la_data_in[26] vssa1 0.63fF
-C2516 la_oenb[25] vssa1 0.63fF
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-C2518 la_data_in[25] vssa1 0.63fF
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-C2521 la_data_in[24] vssa1 0.63fF
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-C2523 la_data_out[23] vssa1 0.63fF
-C2524 la_data_in[23] vssa1 0.63fF
-C2525 la_oenb[22] vssa1 0.63fF
-C2526 la_data_out[22] vssa1 0.63fF
-C2527 la_data_in[22] vssa1 0.63fF
-C2528 la_oenb[21] vssa1 0.63fF
-C2529 la_data_out[21] vssa1 0.63fF
-C2530 la_data_in[21] vssa1 0.63fF
-C2531 la_oenb[20] vssa1 0.63fF
-C2532 la_data_out[20] vssa1 0.63fF
-C2533 la_data_in[20] vssa1 0.63fF
-C2534 la_oenb[19] vssa1 0.63fF
-C2535 la_data_out[19] vssa1 0.63fF
-C2536 la_data_in[19] vssa1 0.63fF
-C2537 la_oenb[18] vssa1 0.63fF
-C2538 la_data_out[18] vssa1 0.63fF
-C2539 la_data_in[18] vssa1 0.63fF
-C2540 la_oenb[17] vssa1 0.63fF
-C2541 la_data_out[17] vssa1 0.63fF
-C2542 la_data_in[17] vssa1 0.63fF
-C2543 la_oenb[16] vssa1 0.63fF
-C2544 la_data_out[16] vssa1 0.63fF
-C2545 la_data_in[16] vssa1 0.63fF
-C2546 la_oenb[15] vssa1 0.63fF
-C2547 la_data_out[15] vssa1 0.63fF
-C2548 la_data_in[15] vssa1 0.63fF
-C2549 la_oenb[14] vssa1 0.63fF
-C2550 la_data_out[14] vssa1 0.63fF
-C2551 la_data_in[14] vssa1 0.63fF
-C2552 la_oenb[13] vssa1 0.63fF
-C2553 la_data_out[13] vssa1 0.63fF
-C2554 la_data_in[13] vssa1 0.63fF
-C2555 la_oenb[12] vssa1 0.63fF
-C2556 la_data_out[12] vssa1 0.63fF
-C2557 la_data_in[12] vssa1 0.63fF
-C2558 la_oenb[11] vssa1 0.63fF
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-C2561 la_oenb[10] vssa1 0.63fF
-C2562 la_data_out[10] vssa1 0.63fF
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-C2564 la_oenb[9] vssa1 0.63fF
-C2565 la_data_out[9] vssa1 0.63fF
-C2566 la_data_in[9] vssa1 0.63fF
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-C2568 la_data_out[8] vssa1 0.63fF
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-C2572 la_data_in[7] vssa1 0.63fF
-C2573 la_oenb[6] vssa1 0.63fF
-C2574 la_data_out[6] vssa1 0.63fF
-C2575 la_data_in[6] vssa1 0.63fF
-C2576 la_oenb[5] vssa1 0.63fF
-C2577 la_data_out[5] vssa1 0.63fF
-C2578 la_data_in[5] vssa1 0.63fF
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-C2580 la_data_out[4] vssa1 0.63fF
-C2581 la_data_in[4] vssa1 0.63fF
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-C2583 la_data_out[3] vssa1 0.63fF
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-C2588 la_oenb[1] vssa1 0.63fF
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-C2594 wbs_dat_o[31] vssa1 0.63fF
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-C2724 pll_full_1/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
-C2725 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF
-C2726 pll_full_1/divider_0/clk vssa1 33.42fF
-C2727 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
-C2728 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
-C2729 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF
-C2730 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
-C2731 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
-C2732 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
-C2733 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF
-C2734 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C2735 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C2736 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF
-C2737 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C2738 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING
-C2739 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C2740 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C2741 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C2742 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C2743 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C2744 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C2745 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C2746 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C2747 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF
-C2748 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C2749 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C2750 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C2751 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C2752 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C2753 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF
-C2754 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF
-C2755 pll_full_1/divbuf_1/OUT vssa1 363.82fF
-C2756 pll_full_1/divbuf_1/OUT5 vssa1 350.37fF
-C2757 pll_full_1/divbuf_1/OUT4 vssa1 133.72fF
-C2758 pll_full_1/divbuf_1/OUT3 vssa1 34.03fF
-C2759 pll_full_1/divbuf_1/OUT2 vssa1 8.71fF
-C2760 pll_full_1/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING
-C2761 pll_full_1/divbuf_0/OUT5 vssa1 350.37fF
-C2762 pll_full_1/divbuf_0/OUT4 vssa1 133.72fF
-C2763 pll_full_1/divbuf_0/OUT3 vssa1 34.03fF
-C2764 pll_full_1/divbuf_0/OUT2 vssa1 8.71fF
-C2765 pll_full_1/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING
-C2766 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF
-C2767 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
-C2768 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
-C2769 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
-C2770 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
-C2771 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
-C2772 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
-C2773 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
-C2774 pll_full_1/ro_complete_0/a0 vssa1 5.35fF
-C2775 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
-C2776 pll_full_1/ro_complete_0/a1 vssa1 6.54fF
-C2777 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
-C2778 pll_full_1/ro_complete_0/a3 vssa1 5.96fF
-C2779 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
-C2780 pll_full_1/ro_complete_0/a2 vssa1 5.21fF
-C2781 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
-C2782 pll_full_1/ro_complete_0/a4 vssa1 5.81fF
-C2783 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
-C2784 pll_full_1/ro_complete_0/a5 vssa1 6.74fF
-C2785 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF
-C2786 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
-C2787 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
-C2788 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
-C2789 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
-C2790 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
-C2791 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
-C2792 pll_full_1/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF
-C2793 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
-C2794 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
-C2795 pll_full_1/cp_0/down vssa1 1.54fF
-C2796 pll_full_1/cp_0/upbar vssa1 1.79fF
-C2797 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
-C2798 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
-C2799 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
-C2800 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
-C2801 pll_full_1/cp_0/a_3060_0# vssa1 2.49fF **FLOATING
-C2802 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
-C2803 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF
-C2804 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF
-C2805 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF
-C2806 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF
-C2807 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.88fF
-C2808 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF
-C2809 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF
-C2810 pll_full_1/pd_0/UP vssa1 6.41fF
-C2811 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
-C2812 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF
-C2813 pll_full_1/pd_0/REF vssa1 6.48fF
-C2814 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF
-C2815 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF
-C2816 pll_full_1/pd_0/R vssa1 3.05fF
-C2817 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.79fF
-C2818 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF
-C2819 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF
-C2820 pll_full_1/pd_0/DOWN vssa1 7.34fF
-C2821 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
-C2822 pll_full_1/pd_0/tspc_r_0/Z3 vssa1 2.12fF
-C2823 pll_full_1/pd_0/DIV vssa1 372.69fF
-C2824 pll_full_0/divider_0/and_0/Z1 vssa1 0.65fF
-C2825 pll_full_0/divider_0/and_0/B vssa1 2.45fF
-C2826 pll_full_0/divider_0/and_0/A vssa1 2.35fF
-C2827 pll_full_0/divider_0/and_0/out1 vssa1 2.99fF
-C2828 pll_full_0/divider_0/tspc_2/Z4 vssa1 0.86fF
-C2829 pll_full_0/divider_0/tspc_2/Z3 vssa1 2.26fF
-C2830 pll_full_0/divider_0/tspc_2/Z2 vssa1 1.46fF
-C2831 pll_full_0/divider_0/tspc_2/Z1 vssa1 0.99fF
-C2832 pll_full_0/divider_0/nor_0/A vssa1 7.08fF
-C2833 pll_full_0/divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
-C2834 pll_full_0/divider_0/tspc_1/Z4 vssa1 0.86fF
-C2835 pll_full_0/divider_0/tspc_1/Z3 vssa1 2.26fF
-C2836 pll_full_0/divider_0/tspc_1/Z2 vssa1 1.46fF
-C2837 pll_full_0/divider_0/tspc_1/Z1 vssa1 0.99fF
-C2838 pll_full_0/divider_0/nor_0/B vssa1 7.12fF
-C2839 pll_full_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C2840 pll_full_0/divider_0/tspc_2/Q vssa1 3.14fF
-C2841 pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF
-C2842 pll_full_0/divbuf_0/IN vssa1 9.89fF
-C2843 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF
-C2844 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF
-C2845 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF
-C2846 pll_full_0/divider_0/nor_1/B vssa1 6.48fF
-C2847 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
-C2848 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF
-C2849 pll_full_0/divider_0/clk vssa1 33.42fF
-C2850 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
-C2851 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
-C2852 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF
-C2853 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
-C2854 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
-C2855 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
-C2856 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF
-C2857 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C2858 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C2859 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF
-C2860 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C2861 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING
-C2862 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C2863 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C2864 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C2865 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C2866 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C2867 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C2868 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C2869 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C2870 pll_full_0/divider_0/prescaler_0/Out vssa1 4.59fF
-C2871 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C2872 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C2873 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C2874 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C2875 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C2876 pll_full_0/divider_0/nor_1/Z1 vssa1 1.34fF
-C2877 pll_full_0/divider_0/nor_0/Z1 vssa1 1.34fF
-C2878 pll_full_0/divbuf_1/OUT vssa1 363.82fF
-C2879 pll_full_0/divbuf_1/OUT5 vssa1 350.37fF
-C2880 pll_full_0/divbuf_1/OUT4 vssa1 133.72fF
-C2881 pll_full_0/divbuf_1/OUT3 vssa1 34.03fF
-C2882 pll_full_0/divbuf_1/OUT2 vssa1 8.71fF
-C2883 pll_full_0/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING
-C2884 pll_full_0/divbuf_0/OUT5 vssa1 350.37fF
-C2885 pll_full_0/divbuf_0/OUT4 vssa1 133.72fF
-C2886 pll_full_0/divbuf_0/OUT3 vssa1 34.03fF
-C2887 pll_full_0/divbuf_0/OUT2 vssa1 8.71fF
-C2888 pll_full_0/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING
-C2889 pll_full_0/ro_complete_0/cbank_2/v vssa1 16.43fF
-C2890 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
-C2891 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
-C2892 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
-C2893 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
-C2894 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
-C2895 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
-C2896 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
-C2897 pll_full_0/ro_complete_0/a0 vssa1 5.35fF
-C2898 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
-C2899 pll_full_0/ro_complete_0/a1 vssa1 6.54fF
-C2900 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
-C2901 pll_full_0/ro_complete_0/a3 vssa1 5.96fF
-C2902 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
-C2903 pll_full_0/ro_complete_0/a2 vssa1 5.21fF
-C2904 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
-C2905 pll_full_0/ro_complete_0/a4 vssa1 5.81fF
-C2906 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
-C2907 pll_full_0/ro_complete_0/a5 vssa1 6.74fF
-C2908 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF
-C2909 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
-C2910 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
-C2911 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
-C2912 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
-C2913 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
-C2914 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
-C2915 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF
-C2916 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
-C2917 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
-C2918 pll_full_0/cp_0/down vssa1 1.54fF
-C2919 pll_full_0/cp_0/upbar vssa1 1.79fF
-C2920 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
-C2921 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
-C2922 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
-C2923 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
-C2924 pll_full_0/cp_0/a_3060_0# vssa1 2.49fF **FLOATING
-C2925 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
-C2926 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
-C2927 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
-C2928 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
-C2929 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
-C2930 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.88fF
-C2931 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
-C2932 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
-C2933 pll_full_0/pd_0/UP vssa1 6.41fF
-C2934 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
-C2935 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
-C2936 pll_full_0/pd_0/REF vssa1 6.48fF
-C2937 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
-C2938 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
-C2939 pll_full_0/pd_0/R vssa1 3.05fF
-C2940 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.79fF
-C2941 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
-C2942 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
-C2943 pll_full_0/pd_0/DOWN vssa1 7.34fF
-C2944 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
-C2945 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
-C2946 pll_full_0/pd_0/DIV vssa1 372.69fF
-C2947 divbuf_19/OUT vssa1 363.82fF
-C2948 divbuf_19/OUT5 vssa1 350.37fF
-C2949 divbuf_19/OUT4 vssa1 133.72fF
-C2950 divbuf_19/OUT3 vssa1 34.03fF
-C2951 divbuf_19/OUT2 vssa1 8.71fF
-C2952 divbuf_19/IN vssa1 0.89fF
-C2953 divbuf_19/a_492_n240# vssa1 2.46fF **FLOATING
-C2954 divbuf_18/OUT vssa1 363.82fF
-C2955 divbuf_18/OUT5 vssa1 350.37fF
-C2956 divbuf_18/OUT4 vssa1 133.72fF
-C2957 divbuf_18/OUT3 vssa1 34.03fF
-C2958 divbuf_18/OUT2 vssa1 8.71fF
-C2959 divbuf_18/IN vssa1 0.89fF
-C2960 divbuf_18/a_492_n240# vssa1 2.46fF **FLOATING
-C2961 divbuf_17/OUT vssa1 363.82fF
-C2962 divbuf_17/OUT5 vssa1 350.37fF
-C2963 divbuf_17/OUT4 vssa1 133.72fF
-C2964 divbuf_17/OUT3 vssa1 34.03fF
-C2965 divbuf_17/OUT2 vssa1 8.71fF
-C2966 divbuf_17/IN vssa1 0.89fF
-C2967 divbuf_17/a_492_n240# vssa1 2.46fF **FLOATING
-C2968 divider_2/and_0/Z1 vssa1 0.74fF
-C2969 divider_2/and_0/B vssa1 2.25fF
-C2970 divider_2/and_0/A vssa1 2.19fF
-C2971 divider_2/and_0/out1 vssa1 2.93fF
-C2972 divider_2/tspc_2/Z4 vssa1 0.86fF
-C2973 divider_2/tspc_2/Z3 vssa1 2.26fF
-C2974 divider_2/tspc_2/Z2 vssa1 1.46fF
-C2975 divider_2/tspc_2/Z1 vssa1 0.99fF
-C2976 divider_2/nor_0/A vssa1 7.04fF
-C2977 divider_2/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
-C2978 divider_2/tspc_1/Z4 vssa1 0.86fF
-C2979 divider_2/tspc_1/Z3 vssa1 2.26fF
-C2980 divider_2/tspc_1/Z2 vssa1 1.46fF
-C2981 divider_2/tspc_1/Z1 vssa1 0.99fF
-C2982 divider_2/nor_0/B vssa1 7.05fF
-C2983 divider_2/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C2984 divider_2/tspc_2/Q vssa1 3.14fF
-C2985 divider_2/tspc_0/Z4 vssa1 0.86fF
-C2986 divider_2/Out vssa1 1.60fF
-C2987 divider_2/tspc_0/Z3 vssa1 2.26fF
-C2988 divider_2/tspc_0/Z2 vssa1 1.46fF
-C2989 divider_2/tspc_0/Z1 vssa1 0.99fF
-C2990 divider_2/nor_1/B vssa1 6.44fF
-C2991 divider_2/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
-C2992 divider_2/tspc_1/Q vssa1 3.12fF
-C2993 divider_2/clk vssa1 5.63fF
-C2994 divider_2/prescaler_0/nand_1/z1 vssa1 0.36fF
-C2995 divider_2/prescaler_0/tspc_0/D vssa1 2.64fF
-C2996 divider_2/prescaler_0/tspc_2/Q vssa1 3.74fF
-C2997 divider_2/prescaler_0/tspc_1/Q vssa1 3.61fF
-C2998 divider_2/prescaler_0/nand_0/z1 vssa1 0.36fF
-C2999 divider_2/prescaler_0/tspc_2/D vssa1 3.12fF
-C3000 divider_2/and_0/OUT vssa1 5.62fF
-C3001 divider_2/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C3002 divider_2/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C3003 divider_2/prescaler_0/tspc_2/Z2 vssa1 1.46fF
-C3004 divider_2/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C3005 divider_2/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C3006 divider_2/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C3007 divider_2/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C3008 divider_2/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C3009 divider_2/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C3010 divider_2/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C3011 divider_2/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C3012 divider_2/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C3013 divider_2/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C3014 divider_2/prescaler_0/Out vssa1 4.59fF
-C3015 divider_2/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C3016 divider_2/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C3017 divider_2/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C3018 divider_2/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C3019 divider_2/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C3020 divider_2/nor_1/Z1 vssa1 1.34fF
-C3021 divider_2/mc2 vssa1 5.29fF
-C3022 divider_2/nor_0/Z1 vssa1 1.34fF
-C3023 divbuf_16/OUT vssa1 363.82fF
-C3024 divbuf_16/OUT5 vssa1 350.37fF
-C3025 divbuf_16/OUT4 vssa1 133.72fF
-C3026 divbuf_16/OUT3 vssa1 34.03fF
-C3027 divbuf_16/OUT2 vssa1 8.71fF
-C3028 divbuf_16/IN vssa1 0.89fF
-C3029 divbuf_16/a_492_n240# vssa1 2.46fF **FLOATING
-C3030 divider_1/and_0/Z1 vssa1 0.74fF
-C3031 divider_1/and_0/B vssa1 2.25fF
-C3032 divider_1/and_0/A vssa1 2.19fF
-C3033 divider_1/and_0/out1 vssa1 2.93fF
-C3034 divider_1/tspc_2/Z4 vssa1 0.86fF
-C3035 divider_1/tspc_2/Z3 vssa1 2.26fF
-C3036 divider_1/tspc_2/Z2 vssa1 1.46fF
-C3037 divider_1/tspc_2/Z1 vssa1 0.99fF
-C3038 divider_1/nor_0/A vssa1 7.04fF
-C3039 divider_1/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
-C3040 divider_1/tspc_1/Z4 vssa1 0.86fF
-C3041 divider_1/tspc_1/Z3 vssa1 2.26fF
-C3042 divider_1/tspc_1/Z2 vssa1 1.46fF
-C3043 divider_1/tspc_1/Z1 vssa1 0.99fF
-C3044 divider_1/nor_0/B vssa1 7.05fF
-C3045 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C3046 divider_1/tspc_2/Q vssa1 3.14fF
-C3047 divider_1/tspc_0/Z4 vssa1 0.86fF
-C3048 divider_1/Out vssa1 1.60fF
-C3049 divider_1/tspc_0/Z3 vssa1 2.26fF
-C3050 divider_1/tspc_0/Z2 vssa1 1.46fF
-C3051 divider_1/tspc_0/Z1 vssa1 0.99fF
-C3052 divider_1/nor_1/B vssa1 6.33fF
-C3053 divider_1/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
-C3054 divider_1/tspc_1/Q vssa1 3.12fF
-C3055 divider_1/clk vssa1 5.63fF
-C3056 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF
-C3057 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF
-C3058 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF
-C3059 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF
-C3060 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF
-C3061 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF
-C3062 divider_1/and_0/OUT vssa1 5.62fF
-C3063 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C3064 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C3065 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF
-C3066 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C3067 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C3068 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C3069 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C3070 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C3071 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C3072 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C3073 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C3074 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C3075 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C3076 divider_1/prescaler_0/Out vssa1 4.59fF
-C3077 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C3078 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C3079 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C3080 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C3081 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C3082 divider_1/nor_1/Z1 vssa1 1.34fF
-C3083 divider_1/mc2 vssa1 5.29fF
-C3084 divider_1/nor_0/Z1 vssa1 1.34fF
-C3085 divbuf_15/OUT vssa1 363.82fF
-C3086 divbuf_15/OUT5 vssa1 350.37fF
-C3087 divbuf_15/OUT4 vssa1 133.72fF
-C3088 divbuf_15/OUT3 vssa1 34.03fF
-C3089 divbuf_15/OUT2 vssa1 8.71fF
-C3090 divbuf_15/IN vssa1 0.89fF
-C3091 divbuf_15/a_492_n240# vssa1 2.46fF **FLOATING
-C3092 divbuf_25/OUT5 vssa1 350.37fF
-C3093 divbuf_25/OUT4 vssa1 133.72fF
-C3094 divbuf_25/OUT3 vssa1 34.03fF
-C3095 divbuf_25/OUT2 vssa1 8.71fF
-C3096 divbuf_25/IN vssa1 0.89fF
-C3097 divbuf_25/a_492_n240# vssa1 2.46fF **FLOATING
-C3098 divbuf_14/OUT vssa1 363.82fF
-C3099 divbuf_14/OUT5 vssa1 350.37fF
-C3100 divbuf_14/OUT4 vssa1 133.72fF
-C3101 divbuf_14/OUT3 vssa1 34.03fF
-C3102 divbuf_14/OUT2 vssa1 8.71fF
-C3103 divbuf_14/IN vssa1 0.89fF
-C3104 divbuf_14/a_492_n240# vssa1 2.46fF **FLOATING
-C3105 divider_0/and_0/Z1 vssa1 0.74fF
-C3106 divider_0/and_0/B vssa1 2.25fF
-C3107 divider_0/and_0/A vssa1 2.19fF
-C3108 divider_0/and_0/out1 vssa1 2.93fF
-C3109 divider_0/tspc_2/Z4 vssa1 0.86fF
-C3110 divider_0/tspc_2/Z3 vssa1 2.26fF
-C3111 divider_0/tspc_2/Z2 vssa1 1.46fF
-C3112 divider_0/tspc_2/Z1 vssa1 0.99fF
-C3113 divider_0/nor_0/A vssa1 7.04fF
-C3114 divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
-C3115 divider_0/tspc_1/Z4 vssa1 0.86fF
-C3116 divider_0/tspc_1/Z3 vssa1 2.26fF
-C3117 divider_0/tspc_1/Z2 vssa1 1.46fF
-C3118 divider_0/tspc_1/Z1 vssa1 0.99fF
-C3119 divider_0/nor_0/B vssa1 7.05fF
-C3120 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
-C3121 divider_0/tspc_2/Q vssa1 3.14fF
-C3122 divider_0/tspc_0/Z4 vssa1 0.86fF
-C3123 divider_0/Out vssa1 1.60fF
-C3124 divider_0/tspc_0/Z3 vssa1 2.26fF
-C3125 divider_0/tspc_0/Z2 vssa1 1.46fF
-C3126 divider_0/tspc_0/Z1 vssa1 0.99fF
-C3127 divider_0/nor_1/B vssa1 6.33fF
-C3128 divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
-C3129 divider_0/tspc_1/Q vssa1 3.12fF
-C3130 divider_0/clk vssa1 5.63fF
-C3131 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
-C3132 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
-C3133 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF
-C3134 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
-C3135 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
-C3136 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
-C3137 divider_0/and_0/OUT vssa1 5.62fF
-C3138 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
-C3139 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
-C3140 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF
-C3141 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
-C3142 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
-C3143 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
-C3144 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
-C3145 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
-C3146 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
-C3147 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
-C3148 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
-C3149 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
-C3150 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
-C3151 divider_0/prescaler_0/Out vssa1 4.59fF
-C3152 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
-C3153 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
-C3154 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
-C3155 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
-C3156 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
-C3157 divider_0/nor_1/Z1 vssa1 1.34fF
-C3158 divider_0/mc2 vssa1 5.29fF
-C3159 divider_0/nor_0/Z1 vssa1 1.34fF
-C3160 divbuf_24/OUT vssa1 363.82fF
-C3161 divbuf_24/OUT5 vssa1 350.37fF
-C3162 divbuf_24/OUT4 vssa1 133.72fF
-C3163 divbuf_24/OUT3 vssa1 34.03fF
-C3164 divbuf_24/OUT2 vssa1 8.71fF
-C3165 divbuf_24/IN vssa1 0.89fF
-C3166 divbuf_24/a_492_n240# vssa1 2.46fF **FLOATING
-C3167 divbuf_13/OUT vssa1 363.82fF
-C3168 divbuf_13/OUT5 vssa1 350.37fF
-C3169 divbuf_13/OUT4 vssa1 133.72fF
-C3170 divbuf_13/OUT3 vssa1 34.03fF
-C3171 divbuf_13/OUT2 vssa1 8.71fF
-C3172 divbuf_13/IN vssa1 0.89fF
-C3173 divbuf_13/a_492_n240# vssa1 2.46fF **FLOATING
-C3174 divbuf_9/OUT vssa1 363.82fF
-C3175 divbuf_9/OUT5 vssa1 350.37fF
-C3176 divbuf_9/OUT4 vssa1 133.72fF
-C3177 divbuf_9/OUT3 vssa1 34.03fF
-C3178 divbuf_9/OUT2 vssa1 8.71fF
-C3179 divbuf_9/IN vssa1 0.89fF
-C3180 divbuf_9/a_492_n240# vssa1 2.46fF **FLOATING
-C3181 divbuf_23/OUT vssa1 363.82fF
-C3182 divbuf_23/OUT5 vssa1 350.37fF
-C3183 divbuf_23/OUT4 vssa1 133.72fF
-C3184 divbuf_23/OUT3 vssa1 34.03fF
-C3185 divbuf_23/OUT2 vssa1 8.71fF
-C3186 divbuf_23/IN vssa1 0.89fF
-C3187 divbuf_23/a_492_n240# vssa1 2.46fF **FLOATING
-C3188 divbuf_12/OUT vssa1 363.82fF
-C3189 divbuf_12/OUT5 vssa1 350.37fF
-C3190 divbuf_12/OUT4 vssa1 133.72fF
-C3191 divbuf_12/OUT3 vssa1 34.03fF
-C3192 divbuf_12/OUT2 vssa1 8.71fF
-C3193 divbuf_12/IN vssa1 0.89fF
-C3194 divbuf_12/a_492_n240# vssa1 2.46fF **FLOATING
-C3195 divbuf_8/OUT vssa1 363.82fF
-C3196 divbuf_8/OUT5 vssa1 350.37fF
-C3197 divbuf_8/OUT4 vssa1 133.72fF
-C3198 divbuf_8/OUT3 vssa1 34.03fF
-C3199 divbuf_8/OUT2 vssa1 8.71fF
-C3200 divbuf_8/IN vssa1 0.89fF
-C3201 divbuf_8/a_492_n240# vssa1 2.46fF **FLOATING
-C3202 divbuf_22/OUT vssa1 363.82fF
-C3203 divbuf_22/OUT5 vssa1 350.37fF
-C3204 divbuf_22/OUT4 vssa1 133.72fF
-C3205 divbuf_22/OUT3 vssa1 34.03fF
-C3206 divbuf_22/OUT2 vssa1 8.71fF
-C3207 divbuf_22/IN vssa1 0.89fF
-C3208 divbuf_22/a_492_n240# vssa1 2.46fF **FLOATING
-C3209 divbuf_11/OUT vssa1 363.82fF
-C3210 divbuf_11/OUT5 vssa1 350.37fF
-C3211 divbuf_11/OUT4 vssa1 133.72fF
-C3212 divbuf_11/OUT3 vssa1 34.03fF
-C3213 divbuf_11/OUT2 vssa1 8.71fF
-C3214 divbuf_11/IN vssa1 0.89fF
-C3215 divbuf_11/a_492_n240# vssa1 2.46fF **FLOATING
-C3216 divbuf_7/OUT5 vssa1 350.37fF
-C3217 divbuf_7/OUT4 vssa1 133.72fF
-C3218 divbuf_7/OUT3 vssa1 34.03fF
-C3219 divbuf_7/OUT2 vssa1 8.71fF
-C3220 divbuf_7/IN vssa1 0.89fF
-C3221 divbuf_7/a_492_n240# vssa1 2.46fF **FLOATING
-C3222 divbuf_21/OUT vssa1 363.82fF
-C3223 divbuf_21/OUT5 vssa1 350.37fF
-C3224 divbuf_21/OUT4 vssa1 133.72fF
-C3225 divbuf_21/OUT3 vssa1 34.03fF
-C3226 divbuf_21/OUT2 vssa1 8.71fF
-C3227 divbuf_21/IN vssa1 0.89fF
-C3228 divbuf_21/a_492_n240# vssa1 2.46fF **FLOATING
-C3229 divbuf_20/OUT vssa1 363.82fF
-C3230 divbuf_20/OUT5 vssa1 350.37fF
-C3231 divbuf_20/OUT4 vssa1 133.72fF
-C3232 divbuf_20/OUT3 vssa1 34.03fF
-C3233 divbuf_20/OUT2 vssa1 8.71fF
-C3234 divbuf_20/IN vssa1 0.89fF
-C3235 divbuf_20/a_492_n240# vssa1 2.46fF **FLOATING
-C3236 divbuf_10/OUT vssa1 363.82fF
-C3237 divbuf_10/OUT5 vssa1 350.37fF
-C3238 divbuf_10/OUT4 vssa1 133.72fF
-C3239 divbuf_10/OUT3 vssa1 34.03fF
-C3240 divbuf_10/OUT2 vssa1 8.71fF
-C3241 divbuf_10/IN vssa1 0.89fF
-C3242 divbuf_10/a_492_n240# vssa1 2.46fF **FLOATING
-C3243 divbuf_6/OUT5 vssa1 350.37fF
-C3244 divbuf_6/OUT4 vssa1 133.72fF
-C3245 divbuf_6/OUT3 vssa1 34.03fF
-C3246 divbuf_6/OUT2 vssa1 8.71fF
-C3247 divbuf_6/IN vssa1 0.89fF
-C3248 divbuf_6/a_492_n240# vssa1 2.46fF **FLOATING
-C3249 divbuf_5/OUT5 vssa1 350.37fF
-C3250 divbuf_5/OUT4 vssa1 133.72fF
-C3251 divbuf_5/OUT3 vssa1 34.03fF
-C3252 divbuf_5/OUT2 vssa1 8.71fF
-C3253 divbuf_5/IN vssa1 0.89fF
-C3254 divbuf_5/a_492_n240# vssa1 2.46fF **FLOATING
-C3255 divbuf_4/OUT5 vssa1 350.37fF
-C3256 divbuf_4/OUT4 vssa1 133.72fF
-C3257 divbuf_4/OUT3 vssa1 34.03fF
-C3258 divbuf_4/OUT2 vssa1 8.71fF
-C3259 divbuf_4/IN vssa1 0.89fF
-C3260 divbuf_4/a_492_n240# vssa1 2.46fF **FLOATING
-C3261 divbuf_3/OUT5 vssa1 350.37fF
-C3262 divbuf_3/OUT4 vssa1 133.72fF
-C3263 divbuf_3/OUT3 vssa1 34.03fF
-C3264 divbuf_3/OUT2 vssa1 8.71fF
-C3265 divbuf_3/IN vssa1 0.89fF
-C3266 divbuf_3/a_492_n240# vssa1 2.46fF **FLOATING
-C3267 divbuf_2/OUT5 vssa1 350.37fF
-C3268 divbuf_2/OUT4 vssa1 133.72fF
-C3269 divbuf_2/OUT3 vssa1 34.03fF
-C3270 divbuf_2/OUT2 vssa1 8.71fF
-C3271 divbuf_2/IN vssa1 0.89fF
-C3272 divbuf_2/a_492_n240# vssa1 2.46fF **FLOATING
-C3273 divbuf_1/OUT vssa1 363.82fF
-C3274 divbuf_1/OUT5 vssa1 350.37fF
-C3275 divbuf_1/OUT4 vssa1 133.72fF
-C3276 divbuf_1/OUT3 vssa1 34.03fF
-C3277 divbuf_1/OUT2 vssa1 8.71fF
-C3278 divbuf_1/IN vssa1 0.89fF
-C3279 divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING
-C3280 ro_complete_1/cbank_2/v vssa1 16.43fF
-C3281 ro_complete_1/cbank_2/switch_5/vin vssa1 0.78fF
-C3282 ro_complete_1/cbank_2/switch_4/vin vssa1 1.50fF
-C3283 ro_complete_1/cbank_2/switch_2/vin vssa1 1.30fF
-C3284 ro_complete_1/cbank_2/switch_3/vin vssa1 0.56fF
-C3285 ro_complete_1/cbank_2/switch_1/vin vssa1 1.14fF
-C3286 ro_complete_1/cbank_2/switch_0/vin vssa1 1.02fF
-C3287 ro_complete_1/cbank_1/v vssa1 16.43fF
-C3288 ro_complete_1/cbank_1/switch_5/vin vssa1 0.78fF
-C3289 ro_complete_1/a0 vssa1 5.35fF
-C3290 ro_complete_1/cbank_1/switch_4/vin vssa1 1.50fF
-C3291 ro_complete_1/a1 vssa1 6.54fF
-C3292 ro_complete_1/cbank_1/switch_2/vin vssa1 1.30fF
-C3293 ro_complete_1/a3 vssa1 5.96fF
-C3294 ro_complete_1/cbank_1/switch_3/vin vssa1 0.56fF
-C3295 ro_complete_1/a2 vssa1 5.21fF
-C3296 ro_complete_1/cbank_1/switch_1/vin vssa1 1.14fF
-C3297 ro_complete_1/a4 vssa1 5.81fF
-C3298 ro_complete_1/cbank_1/switch_0/vin vssa1 1.02fF
-C3299 ro_complete_1/a5 vssa1 6.74fF
-C3300 ro_complete_1/cbank_0/v vssa1 15.12fF
-C3301 ro_complete_1/cbank_0/switch_5/vin vssa1 0.78fF
-C3302 ro_complete_1/cbank_0/switch_4/vin vssa1 1.50fF
-C3303 ro_complete_1/cbank_0/switch_2/vin vssa1 1.30fF
-C3304 ro_complete_1/cbank_0/switch_3/vin vssa1 0.56fF
-C3305 ro_complete_1/cbank_0/switch_1/vin vssa1 1.14fF
-C3306 ro_complete_1/cbank_0/switch_0/vin vssa1 1.02fF
-C3307 ro_complete_1/ro_var_extend_0/vcont vssa1 0.27fF
-C3308 divbuf_0/OUT vssa1 363.82fF
-C3309 divbuf_0/OUT5 vssa1 350.37fF
-C3310 divbuf_0/OUT4 vssa1 133.72fF
-C3311 divbuf_0/OUT3 vssa1 34.03fF
-C3312 divbuf_0/OUT2 vssa1 8.71fF
-C3313 divbuf_0/IN vssa1 0.89fF
-C3314 divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING
-C3315 ro_complete_0/cbank_2/v vssa1 16.43fF
-C3316 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
-C3317 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
-C3318 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
-C3319 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
-C3320 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
-C3321 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
-C3322 ro_complete_0/cbank_1/v vssa1 16.46fF
-C3323 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
-C3324 divbuf_7/OUT vssa1 405.76fF
-C3325 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
-C3326 divbuf_6/OUT vssa1 402.77fF
-C3327 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
-C3328 divbuf_3/OUT vssa1 394.74fF
-C3329 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
-C3330 divbuf_5/OUT vssa1 397.92fF
-C3331 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
-C3332 divbuf_4/OUT vssa1 391.26fF
-C3333 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
-C3334 divbuf_2/OUT vssa1 387.66fF
-C3335 ro_complete_0/cbank_0/v vssa1 15.12fF
-C3336 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
-C3337 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
-C3338 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
-C3339 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
-C3340 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
-C3341 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
-C3342 ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF
-C3343 filter_0/v vssa1 477.90fF
-C3344 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING
-C3345 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING
-C3346 cp_0/down vssa1 1.54fF
-C3347 cp_0/vbias vssa1 2.41fF
-C3348 cp_0/out vssa1 5.34fF
-C3349 cp_0/upbar vssa1 1.50fF
-C3350 cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
-C3351 cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
-C3352 cp_0/a_7110_0# vssa1 0.17fF **FLOATING
-C3353 cp_0/a_6370_0# vssa1 0.40fF **FLOATING
-C3354 cp_0/a_3060_0# vssa1 1.66fF **FLOATING
-C3355 cp_0/a_1710_0# vssa1 5.89fF **FLOATING
-C3356 cp_0/a_1710_n2840# vssa1 4.91fF **FLOATING
-C3357 cp_0/a_10_n50# vssa1 2.96fF **FLOATING
-C3358 pd_1/and_pd_0/Z1 vssa1 0.39fF
-C3359 pd_1/and_pd_0/Out1 vssa1 2.22fF
-C3360 pd_1/tspc_r_1/z5 vssa1 1.10fF
-C3361 pd_1/tspc_r_1/Z4 vssa1 1.07fF
-C3362 pd_1/tspc_r_1/Qbar vssa1 0.88fF
-C3363 pd_1/tspc_r_1/Z2 vssa1 1.22fF
-C3364 pd_1/tspc_r_1/Z1 vssa1 0.67fF
-C3365 pd_1/UP vssa1 2.21fF
-C3366 pd_1/tspc_r_1/Qbar1 vssa1 1.34fF
-C3367 pd_1/tspc_r_1/Z3 vssa1 2.12fF
-C3368 pd_1/REF vssa1 1.80fF
-C3369 pd_1/tspc_r_0/z5 vssa1 1.10fF
-C3370 pd_1/tspc_r_0/Z4 vssa1 1.07fF
-C3371 pd_1/R vssa1 3.05fF
-C3372 pd_1/tspc_r_0/Qbar vssa1 0.79fF
-C3373 pd_1/tspc_r_0/Z2 vssa1 1.22fF
-C3374 pd_1/tspc_r_0/Z1 vssa1 0.67fF
-C3375 pd_1/DOWN vssa1 3.08fF
-C3376 pd_1/tspc_r_0/Qbar1 vssa1 1.34fF
-C3377 pd_1/tspc_r_0/Z3 vssa1 2.12fF
-C3378 pd_1/DIV vssa1 1.82fF
-C3379 pd_0/and_pd_0/Z1 vssa1 0.39fF
-C3380 pd_0/and_pd_0/Out1 vssa1 2.22fF
-C3381 pd_0/tspc_r_1/z5 vssa1 1.10fF
-C3382 pd_0/tspc_r_1/Z4 vssa1 1.07fF
-C3383 pd_0/tspc_r_1/Qbar vssa1 0.88fF
-C3384 pd_0/tspc_r_1/Z2 vssa1 1.22fF
-C3385 pd_0/tspc_r_1/Z1 vssa1 0.67fF
-C3386 pd_0/UP vssa1 2.21fF
-C3387 pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
-C3388 pd_0/tspc_r_1/Z3 vssa1 2.12fF
-C3389 pd_0/REF vssa1 1.80fF
-C3390 pd_0/tspc_r_0/z5 vssa1 1.10fF
-C3391 pd_0/tspc_r_0/Z4 vssa1 1.07fF
-C3392 pd_0/R vssa1 3.05fF
-C3393 pd_0/tspc_r_0/Qbar vssa1 0.79fF
-C3394 pd_0/tspc_r_0/Z2 vssa1 1.22fF
-C3395 pd_0/tspc_r_0/Z1 vssa1 0.67fF
-C3396 pd_0/DOWN vssa1 3.08fF
-C3397 pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
-C3398 pd_0/tspc_r_0/Z3 vssa1 2.12fF
-C3399 pd_0/DIV vssa1 1.82fF
+C1665 io_analog[4] gnd 43.96fF
+C1666 io_analog[5] gnd 44.13fF
+C1667 io_analog[6] gnd 43.46fF
+C1668 io_in_3v3[0] gnd 0.61fF
+C1669 io_oeb[26] gnd 0.61fF
+C1670 io_in[0] gnd 0.61fF
+C1671 io_out[26] gnd 0.61fF
+C1672 io_out[0] gnd 0.61fF
+C1673 io_in[26] gnd 0.61fF
+C1674 io_oeb[0] gnd 0.61fF
+C1675 io_in_3v3[26] gnd 0.61fF
+C1676 io_in_3v3[1] gnd 0.61fF
+C1677 io_oeb[25] gnd 0.61fF
+C1678 io_in[1] gnd 0.61fF
+C1679 io_out[25] gnd 0.61fF
+C1680 io_out[1] gnd 0.61fF
+C1681 io_in[25] gnd 0.61fF
+C1682 io_oeb[1] gnd 0.61fF
+C1683 io_in_3v3[25] gnd 0.61fF
+C1684 io_in_3v3[2] gnd 0.61fF
+C1685 io_oeb[24] gnd 0.61fF
+C1686 io_in[2] gnd 0.61fF
+C1687 io_out[24] gnd 0.61fF
+C1688 io_out[2] gnd 0.61fF
+C1689 io_in[24] gnd 0.61fF
+C1690 io_oeb[2] gnd 0.61fF
+C1691 io_in_3v3[24] gnd 0.61fF
+C1692 io_in_3v3[3] gnd 0.61fF
+C1693 io_in[3] gnd 0.61fF
+C1694 gpio_noesd[17] gnd 2.32fF
+C1695 gpio_analog[17] gnd 2.30fF
+C1696 io_out[3] gnd 0.61fF
+C1697 io_oeb[3] gnd 0.61fF
+C1698 io_in_3v3[4] gnd 0.61fF
+C1699 io_in[4] gnd 0.61fF
+C1700 io_out[4] gnd 0.61fF
+C1701 io_oeb[4] gnd 0.61fF
+C1702 io_oeb[23] gnd 0.61fF
+C1703 io_out[23] gnd 0.61fF
+C1704 io_in[23] gnd 0.61fF
+C1705 io_in_3v3[23] gnd 0.61fF
+C1706 gpio_noesd[16] gnd 2.30fF
+C1707 gpio_analog[16] gnd 2.30fF
+C1708 io_in_3v3[5] gnd 0.61fF
+C1709 io_in[5] gnd 0.61fF
+C1710 io_out[5] gnd 0.61fF
+C1711 io_oeb[5] gnd 0.61fF
+C1712 io_oeb[22] gnd 0.61fF
+C1713 io_out[22] gnd 0.61fF
+C1714 io_in[22] gnd 0.61fF
+C1715 io_in_3v3[22] gnd 0.61fF
+C1716 gpio_noesd[15] gnd 2.31fF
+C1717 gpio_analog[15] gnd 2.30fF
+C1718 io_in_3v3[6] gnd 0.61fF
+C1719 io_in[6] gnd 0.61fF
+C1720 io_out[6] gnd 0.61fF
+C1721 io_oeb[6] gnd 0.61fF
+C1722 io_oeb[21] gnd 0.61fF
+C1723 io_out[21] gnd 0.61fF
+C1724 io_in[21] gnd 0.61fF
+C1725 io_in_3v3[21] gnd 0.61fF
+C1726 gpio_noesd[14] gnd 2.30fF
+C1727 gpio_analog[14] gnd 2.29fF
+C1728 vssd2 gnd 38.54fF
+C1729 vssd1 gnd 13.04fF
+C1730 vdda2 gnd 38.30fF
+C1731 io_oeb[20] gnd 0.61fF
+C1732 io_out[20] gnd 0.61fF
+C1733 io_in[20] gnd 0.61fF
+C1734 io_in_3v3[20] gnd 0.61fF
+C1735 gpio_noesd[13] gnd 2.31fF
+C1736 gpio_analog[13] gnd 2.30fF
+C1737 gpio_analog[0] gnd 0.61fF
+C1738 gpio_noesd[0] gnd 0.61fF
+C1739 io_in_3v3[7] gnd 0.61fF
+C1740 io_in[7] gnd 0.61fF
+C1741 io_out[7] gnd 0.61fF
+C1742 io_oeb[7] gnd 0.61fF
+C1743 io_oeb[19] gnd 0.61fF
+C1744 io_out[19] gnd 0.61fF
+C1745 io_in[19] gnd 0.61fF
+C1746 io_in_3v3[19] gnd 0.61fF
+C1747 gpio_noesd[12] gnd 2.32fF
+C1748 gpio_analog[12] gnd 2.30fF
+C1749 gpio_analog[1] gnd 0.61fF
+C1750 gpio_noesd[1] gnd 0.61fF
+C1751 io_in_3v3[8] gnd 0.61fF
+C1752 io_in[8] gnd 0.61fF
+C1753 io_out[8] gnd 0.61fF
+C1754 io_oeb[8] gnd 0.61fF
+C1755 io_oeb[18] gnd 0.61fF
+C1756 io_out[18] gnd 0.61fF
+C1757 io_in[18] gnd 0.61fF
+C1758 io_in_3v3[18] gnd 0.61fF
+C1759 gpio_noesd[11] gnd 2.30fF
+C1760 gpio_analog[11] gnd 2.29fF
+C1761 gpio_analog[2] gnd 0.61fF
+C1762 gpio_noesd[2] gnd 0.61fF
+C1763 io_in_3v3[9] gnd 0.61fF
+C1764 io_in[9] gnd 0.61fF
+C1765 io_out[9] gnd 0.61fF
+C1766 io_oeb[9] gnd 0.61fF
+C1767 io_oeb[17] gnd 0.61fF
+C1768 io_out[17] gnd 0.61fF
+C1769 io_in[17] gnd 0.61fF
+C1770 io_in_3v3[17] gnd 0.61fF
+C1771 gpio_noesd[10] gnd 2.31fF
+C1772 gpio_analog[10] gnd 2.29fF
+C1773 gpio_analog[3] gnd 0.61fF
+C1774 gpio_noesd[3] gnd 0.61fF
+C1775 io_in_3v3[10] gnd 0.61fF
+C1776 io_in[10] gnd 0.61fF
+C1777 io_out[10] gnd 0.61fF
+C1778 io_oeb[10] gnd 0.61fF
+C1779 io_oeb[16] gnd 0.61fF
+C1780 io_out[16] gnd 0.61fF
+C1781 io_in[16] gnd 0.61fF
+C1782 io_in_3v3[16] gnd 0.61fF
+C1783 gpio_noesd[9] gnd 2.28fF
+C1784 gpio_analog[9] gnd 2.28fF
+C1785 gpio_analog[4] gnd 0.61fF
+C1786 gpio_noesd[4] gnd 0.61fF
+C1787 io_in_3v3[11] gnd 0.61fF
+C1788 io_in[11] gnd 0.61fF
+C1789 io_out[11] gnd 0.61fF
+C1790 io_oeb[11] gnd 0.61fF
+C1791 io_oeb[15] gnd 0.61fF
+C1792 io_out[15] gnd 0.61fF
+C1793 io_in[15] gnd 0.61fF
+C1794 io_in_3v3[15] gnd 0.61fF
+C1795 gpio_noesd[8] gnd 2.28fF
+C1796 gpio_analog[8] gnd 2.26fF
+C1797 gpio_analog[5] gnd 0.61fF
+C1798 gpio_noesd[5] gnd 0.61fF
+C1799 io_in_3v3[12] gnd 0.61fF
+C1800 io_in[12] gnd 0.61fF
+C1801 io_out[12] gnd 0.61fF
+C1802 io_oeb[12] gnd 0.61fF
+C1803 io_oeb[14] gnd 0.61fF
+C1804 io_out[14] gnd 0.61fF
+C1805 io_in[14] gnd 0.61fF
+C1806 io_in_3v3[14] gnd 0.61fF
+C1807 gpio_noesd[7] gnd 2.30fF
+C1808 gpio_analog[7] gnd 2.28fF
+C1809 vssa2 gnd 38.35fF
+C1810 gpio_analog[6] gnd 5.71fF
+C1811 gpio_noesd[6] gnd 5.70fF
+C1812 io_in_3v3[13] gnd 0.61fF
+C1813 io_in[13] gnd 0.61fF
+C1814 io_out[13] gnd 0.61fF
+C1815 io_oeb[13] gnd 0.61fF
+C1816 vccd1 gnd 39.84fF
+C1817 vccd2 gnd 38.46fF
+C1818 io_analog[0] gnd 19.99fF
+C1819 io_analog[10] gnd 19.36fF
+C1820 io_analog[1] gnd 13.17fF
+C1821 io_analog[2] gnd 12.57fF
+C1822 io_analog[3] gnd 12.83fF
+C1823 io_clamp_high[0] gnd 3.58fF
+C1824 io_clamp_low[0] gnd 3.58fF
+C1825 io_clamp_high[1] gnd 3.58fF
+C1826 io_clamp_low[1] gnd 3.58fF
+C1827 io_clamp_high[2] gnd 3.58fF
+C1828 io_clamp_low[2] gnd 3.58fF
+C1829 io_analog[7] gnd 12.74fF
+C1830 io_analog[8] gnd 13.08fF
+C1831 io_analog[9] gnd 13.08fF
+C1832 user_irq[2] gnd 0.63fF
+C1833 user_irq[1] gnd 0.63fF
+C1834 user_irq[0] gnd 0.63fF
+C1835 user_clock2 gnd 0.63fF
+C1836 la_oenb[127] gnd 0.63fF
+C1837 la_data_out[127] gnd 0.63fF
+C1838 la_data_in[127] gnd 0.63fF
+C1839 la_oenb[126] gnd 0.63fF
+C1840 la_data_out[126] gnd 0.63fF
+C1841 la_data_in[126] gnd 0.63fF
+C1842 la_oenb[125] gnd 0.63fF
+C1843 la_data_out[125] gnd 0.63fF
+C1844 la_data_in[125] gnd 0.63fF
+C1845 la_oenb[124] gnd 0.63fF
+C1846 la_data_out[124] gnd 0.63fF
+C1847 la_data_in[124] gnd 0.63fF
+C1848 la_oenb[123] gnd 0.63fF
+C1849 la_data_out[123] gnd 0.63fF
+C1850 la_data_in[123] gnd 0.63fF
+C1851 la_oenb[122] gnd 0.63fF
+C1852 la_data_out[122] gnd 0.63fF
+C1853 la_data_in[122] gnd 0.63fF
+C1854 la_oenb[121] gnd 0.63fF
+C1855 la_data_out[121] gnd 0.63fF
+C1856 la_data_in[121] gnd 0.63fF
+C1857 la_oenb[120] gnd 0.63fF
+C1858 la_data_out[120] gnd 0.63fF
+C1859 la_data_in[120] gnd 0.63fF
+C1860 la_oenb[119] gnd 0.63fF
+C1861 la_data_out[119] gnd 0.63fF
+C1862 la_data_in[119] gnd 0.63fF
+C1863 la_oenb[118] gnd 0.63fF
+C1864 la_data_out[118] gnd 0.63fF
+C1865 la_data_in[118] gnd 0.63fF
+C1866 la_oenb[117] gnd 0.63fF
+C1867 la_data_out[117] gnd 0.63fF
+C1868 la_data_in[117] gnd 0.63fF
+C1869 la_oenb[116] gnd 0.63fF
+C1870 la_data_out[116] gnd 0.63fF
+C1871 la_data_in[116] gnd 0.63fF
+C1872 la_oenb[115] gnd 0.63fF
+C1873 la_data_out[115] gnd 0.63fF
+C1874 la_data_in[115] gnd 0.63fF
+C1875 la_oenb[114] gnd 0.63fF
+C1876 la_data_out[114] gnd 0.63fF
+C1877 la_data_in[114] gnd 0.63fF
+C1878 la_oenb[113] gnd 0.63fF
+C1879 la_data_out[113] gnd 0.63fF
+C1880 la_data_in[113] gnd 0.63fF
+C1881 la_oenb[112] gnd 0.63fF
+C1882 la_data_out[112] gnd 0.63fF
+C1883 la_data_in[112] gnd 0.63fF
+C1884 la_oenb[111] gnd 0.63fF
+C1885 la_data_out[111] gnd 0.63fF
+C1886 la_data_in[111] gnd 0.63fF
+C1887 la_oenb[110] gnd 0.63fF
+C1888 la_data_out[110] gnd 0.63fF
+C1889 la_data_in[110] gnd 0.63fF
+C1890 la_oenb[109] gnd 0.63fF
+C1891 la_data_out[109] gnd 0.63fF
+C1892 la_data_in[109] gnd 0.63fF
+C1893 la_oenb[108] gnd 0.63fF
+C1894 la_data_out[108] gnd 0.63fF
+C1895 la_data_in[108] gnd 0.63fF
+C1896 la_oenb[107] gnd 0.63fF
+C1897 la_data_out[107] gnd 0.63fF
+C1898 la_data_in[107] gnd 0.63fF
+C1899 la_oenb[106] gnd 0.63fF
+C1900 la_data_out[106] gnd 0.63fF
+C1901 la_data_in[106] gnd 0.63fF
+C1902 la_oenb[105] gnd 0.63fF
+C1903 la_data_out[105] gnd 0.63fF
+C1904 la_data_in[105] gnd 0.63fF
+C1905 la_oenb[104] gnd 0.63fF
+C1906 la_data_out[104] gnd 0.63fF
+C1907 la_data_in[104] gnd 0.63fF
+C1908 la_oenb[103] gnd 0.63fF
+C1909 la_data_out[103] gnd 0.63fF
+C1910 la_data_in[103] gnd 0.63fF
+C1911 la_oenb[102] gnd 0.63fF
+C1912 la_data_out[102] gnd 0.63fF
+C1913 la_data_in[102] gnd 0.63fF
+C1914 la_oenb[101] gnd 0.63fF
+C1915 la_data_out[101] gnd 0.63fF
+C1916 la_data_in[101] gnd 0.63fF
+C1917 la_oenb[100] gnd 0.63fF
+C1918 la_data_out[100] gnd 0.63fF
+C1919 la_data_in[100] gnd 0.63fF
+C1920 la_oenb[99] gnd 0.63fF
+C1921 la_data_out[99] gnd 0.63fF
+C1922 la_data_in[99] gnd 0.63fF
+C1923 la_oenb[98] gnd 0.63fF
+C1924 la_data_out[98] gnd 0.63fF
+C1925 la_data_in[98] gnd 0.63fF
+C1926 la_oenb[97] gnd 0.63fF
+C1927 la_data_out[97] gnd 0.63fF
+C1928 la_data_in[97] gnd 0.63fF
+C1929 la_oenb[96] gnd 0.63fF
+C1930 la_data_out[96] gnd 0.63fF
+C1931 la_data_in[96] gnd 0.63fF
+C1932 la_oenb[95] gnd 0.63fF
+C1933 la_data_out[95] gnd 0.63fF
+C1934 la_data_in[95] gnd 0.63fF
+C1935 la_oenb[94] gnd 0.63fF
+C1936 la_data_out[94] gnd 0.63fF
+C1937 la_data_in[94] gnd 0.63fF
+C1938 la_oenb[93] gnd 0.63fF
+C1939 la_data_out[93] gnd 0.63fF
+C1940 la_data_in[93] gnd 0.63fF
+C1941 la_oenb[92] gnd 0.63fF
+C1942 la_data_out[92] gnd 0.63fF
+C1943 la_data_in[92] gnd 0.63fF
+C1944 la_oenb[91] gnd 0.63fF
+C1945 la_data_out[91] gnd 0.63fF
+C1946 la_data_in[91] gnd 0.63fF
+C1947 la_oenb[90] gnd 0.63fF
+C1948 la_data_out[90] gnd 0.63fF
+C1949 la_data_in[90] gnd 0.63fF
+C1950 la_oenb[89] gnd 0.63fF
+C1951 la_data_out[89] gnd 0.63fF
+C1952 la_data_in[89] gnd 0.63fF
+C1953 la_oenb[88] gnd 0.63fF
+C1954 la_data_out[88] gnd 0.63fF
+C1955 la_data_in[88] gnd 0.63fF
+C1956 la_oenb[87] gnd 0.63fF
+C1957 la_data_out[87] gnd 0.63fF
+C1958 la_data_in[87] gnd 0.63fF
+C1959 la_oenb[86] gnd 0.63fF
+C1960 la_data_out[86] gnd 0.63fF
+C1961 la_data_in[86] gnd 0.63fF
+C1962 la_oenb[85] gnd 0.63fF
+C1963 la_data_out[85] gnd 0.63fF
+C1964 la_data_in[85] gnd 0.63fF
+C1965 la_oenb[84] gnd 0.63fF
+C1966 la_data_out[84] gnd 0.63fF
+C1967 la_data_in[84] gnd 0.63fF
+C1968 la_oenb[83] gnd 0.63fF
+C1969 la_data_out[83] gnd 0.63fF
+C1970 la_data_in[83] gnd 0.63fF
+C1971 la_oenb[82] gnd 0.63fF
+C1972 la_data_out[82] gnd 0.63fF
+C1973 la_data_in[82] gnd 0.63fF
+C1974 la_oenb[81] gnd 0.63fF
+C1975 la_data_out[81] gnd 0.63fF
+C1976 la_data_in[81] gnd 0.63fF
+C1977 la_oenb[80] gnd 0.63fF
+C1978 la_data_out[80] gnd 0.63fF
+C1979 la_data_in[80] gnd 0.63fF
+C1980 la_oenb[79] gnd 0.63fF
+C1981 la_data_out[79] gnd 0.63fF
+C1982 la_data_in[79] gnd 0.63fF
+C1983 la_oenb[78] gnd 0.63fF
+C1984 la_data_out[78] gnd 0.63fF
+C1985 la_data_in[78] gnd 0.63fF
+C1986 la_oenb[77] gnd 0.63fF
+C1987 la_data_out[77] gnd 0.63fF
+C1988 la_data_in[77] gnd 0.63fF
+C1989 la_oenb[76] gnd 0.63fF
+C1990 la_data_out[76] gnd 0.63fF
+C1991 la_data_in[76] gnd 0.63fF
+C1992 la_oenb[75] gnd 0.63fF
+C1993 la_data_out[75] gnd 0.63fF
+C1994 la_data_in[75] gnd 0.63fF
+C1995 la_oenb[74] gnd 0.63fF
+C1996 la_data_out[74] gnd 0.63fF
+C1997 la_data_in[74] gnd 0.63fF
+C1998 la_oenb[73] gnd 0.63fF
+C1999 la_data_out[73] gnd 0.63fF
+C2000 la_data_in[73] gnd 0.63fF
+C2001 la_oenb[72] gnd 0.63fF
+C2002 la_data_out[72] gnd 0.63fF
+C2003 la_data_in[72] gnd 0.63fF
+C2004 la_oenb[71] gnd 0.63fF
+C2005 la_data_out[71] gnd 0.63fF
+C2006 la_data_in[71] gnd 0.63fF
+C2007 la_oenb[70] gnd 0.63fF
+C2008 la_data_out[70] gnd 0.63fF
+C2009 la_data_in[70] gnd 0.63fF
+C2010 la_oenb[69] gnd 0.63fF
+C2011 la_data_out[69] gnd 0.63fF
+C2012 la_data_in[69] gnd 0.63fF
+C2013 la_oenb[68] gnd 0.63fF
+C2014 la_data_out[68] gnd 0.63fF
+C2015 la_data_in[68] gnd 0.63fF
+C2016 la_oenb[67] gnd 0.63fF
+C2017 la_data_out[67] gnd 0.63fF
+C2018 la_data_in[67] gnd 0.63fF
+C2019 la_oenb[66] gnd 0.63fF
+C2020 la_data_out[66] gnd 0.63fF
+C2021 la_data_in[66] gnd 0.63fF
+C2022 la_oenb[65] gnd 0.63fF
+C2023 la_data_out[65] gnd 0.63fF
+C2024 la_data_in[65] gnd 0.63fF
+C2025 la_oenb[64] gnd 0.63fF
+C2026 la_data_out[64] gnd 0.63fF
+C2027 la_data_in[64] gnd 0.63fF
+C2028 la_oenb[63] gnd 0.63fF
+C2029 la_data_out[63] gnd 0.63fF
+C2030 la_data_in[63] gnd 0.63fF
+C2031 la_oenb[62] gnd 0.63fF
+C2032 la_data_out[62] gnd 0.63fF
+C2033 la_data_in[62] gnd 0.63fF
+C2034 la_oenb[61] gnd 0.63fF
+C2035 la_data_out[61] gnd 0.63fF
+C2036 la_data_in[61] gnd 0.63fF
+C2037 la_oenb[60] gnd 0.63fF
+C2038 la_data_out[60] gnd 0.63fF
+C2039 la_data_in[60] gnd 0.63fF
+C2040 la_oenb[59] gnd 0.63fF
+C2041 la_data_out[59] gnd 0.63fF
+C2042 la_data_in[59] gnd 0.63fF
+C2043 la_oenb[58] gnd 0.63fF
+C2044 la_data_out[58] gnd 0.63fF
+C2045 la_data_in[58] gnd 0.63fF
+C2046 la_oenb[57] gnd 0.63fF
+C2047 la_data_out[57] gnd 0.63fF
+C2048 la_data_in[57] gnd 0.63fF
+C2049 la_oenb[56] gnd 0.63fF
+C2050 la_data_out[56] gnd 0.63fF
+C2051 la_data_in[56] gnd 0.63fF
+C2052 la_oenb[55] gnd 0.63fF
+C2053 la_data_out[55] gnd 0.63fF
+C2054 la_data_in[55] gnd 0.63fF
+C2055 la_oenb[54] gnd 0.63fF
+C2056 la_data_out[54] gnd 0.63fF
+C2057 la_data_in[54] gnd 0.63fF
+C2058 la_oenb[53] gnd 0.63fF
+C2059 la_data_out[53] gnd 0.63fF
+C2060 la_data_in[53] gnd 0.63fF
+C2061 la_oenb[52] gnd 0.63fF
+C2062 la_data_out[52] gnd 0.63fF
+C2063 la_data_in[52] gnd 0.63fF
+C2064 la_oenb[51] gnd 0.63fF
+C2065 la_data_out[51] gnd 0.63fF
+C2066 la_data_in[51] gnd 0.63fF
+C2067 la_oenb[50] gnd 0.63fF
+C2068 la_data_out[50] gnd 0.63fF
+C2069 la_data_in[50] gnd 0.63fF
+C2070 la_oenb[49] gnd 0.63fF
+C2071 la_data_out[49] gnd 0.63fF
+C2072 la_data_in[49] gnd 0.63fF
+C2073 la_oenb[48] gnd 0.63fF
+C2074 la_data_out[48] gnd 0.63fF
+C2075 la_data_in[48] gnd 0.63fF
+C2076 la_oenb[47] gnd 0.63fF
+C2077 la_data_out[47] gnd 0.63fF
+C2078 la_data_in[47] gnd 0.63fF
+C2079 la_oenb[46] gnd 0.63fF
+C2080 la_data_out[46] gnd 0.63fF
+C2081 la_data_in[46] gnd 0.63fF
+C2082 la_oenb[45] gnd 0.63fF
+C2083 la_data_out[45] gnd 0.63fF
+C2084 la_data_in[45] gnd 0.63fF
+C2085 la_oenb[44] gnd 0.63fF
+C2086 la_data_out[44] gnd 0.63fF
+C2087 la_data_in[44] gnd 0.63fF
+C2088 la_oenb[43] gnd 0.63fF
+C2089 la_data_out[43] gnd 0.63fF
+C2090 la_data_in[43] gnd 0.63fF
+C2091 la_oenb[42] gnd 0.63fF
+C2092 la_data_out[42] gnd 0.63fF
+C2093 la_data_in[42] gnd 0.63fF
+C2094 la_oenb[41] gnd 0.63fF
+C2095 la_data_out[41] gnd 0.63fF
+C2096 la_data_in[41] gnd 0.63fF
+C2097 la_oenb[40] gnd 0.63fF
+C2098 la_data_out[40] gnd 0.63fF
+C2099 la_data_in[40] gnd 0.63fF
+C2100 la_oenb[39] gnd 0.63fF
+C2101 la_data_out[39] gnd 0.63fF
+C2102 la_data_in[39] gnd 0.63fF
+C2103 la_oenb[38] gnd 0.63fF
+C2104 la_data_out[38] gnd 0.63fF
+C2105 la_data_in[38] gnd 0.63fF
+C2106 la_oenb[37] gnd 0.63fF
+C2107 la_data_out[37] gnd 0.63fF
+C2108 la_data_in[37] gnd 0.63fF
+C2109 la_oenb[36] gnd 0.63fF
+C2110 la_data_out[36] gnd 0.63fF
+C2111 la_data_in[36] gnd 0.63fF
+C2112 la_oenb[35] gnd 0.63fF
+C2113 la_data_out[35] gnd 0.63fF
+C2114 la_data_in[35] gnd 0.63fF
+C2115 la_oenb[34] gnd 0.63fF
+C2116 la_data_out[34] gnd 0.63fF
+C2117 la_data_in[34] gnd 0.63fF
+C2118 la_oenb[33] gnd 0.63fF
+C2119 la_data_out[33] gnd 0.63fF
+C2120 la_data_in[33] gnd 0.63fF
+C2121 la_oenb[32] gnd 0.63fF
+C2122 la_data_out[32] gnd 0.63fF
+C2123 la_data_in[32] gnd 0.63fF
+C2124 la_oenb[31] gnd 0.63fF
+C2125 la_data_out[31] gnd 0.63fF
+C2126 la_data_in[31] gnd 0.63fF
+C2127 la_oenb[30] gnd 0.63fF
+C2128 la_data_out[30] gnd 0.63fF
+C2129 la_data_in[30] gnd 0.63fF
+C2130 la_oenb[29] gnd 0.63fF
+C2131 la_data_out[29] gnd 0.63fF
+C2132 la_data_in[29] gnd 0.63fF
+C2133 la_oenb[28] gnd 0.63fF
+C2134 la_data_out[28] gnd 0.63fF
+C2135 la_data_in[28] gnd 0.63fF
+C2136 la_oenb[27] gnd 0.63fF
+C2137 la_data_out[27] gnd 0.63fF
+C2138 la_data_in[27] gnd 0.63fF
+C2139 la_oenb[26] gnd 0.63fF
+C2140 la_data_out[26] gnd 0.63fF
+C2141 la_data_in[26] gnd 0.63fF
+C2142 la_oenb[25] gnd 0.63fF
+C2143 la_data_out[25] gnd 0.63fF
+C2144 la_data_in[25] gnd 0.63fF
+C2145 la_oenb[24] gnd 0.63fF
+C2146 la_data_out[24] gnd 0.63fF
+C2147 la_data_in[24] gnd 0.63fF
+C2148 la_oenb[23] gnd 0.63fF
+C2149 la_data_out[23] gnd 0.63fF
+C2150 la_data_in[23] gnd 0.63fF
+C2151 la_oenb[22] gnd 0.63fF
+C2152 la_data_out[22] gnd 0.63fF
+C2153 la_data_in[22] gnd 0.63fF
+C2154 la_oenb[21] gnd 0.63fF
+C2155 la_data_out[21] gnd 0.63fF
+C2156 la_data_in[21] gnd 0.63fF
+C2157 la_oenb[20] gnd 0.63fF
+C2158 la_data_out[20] gnd 0.63fF
+C2159 la_data_in[20] gnd 0.63fF
+C2160 la_oenb[19] gnd 0.63fF
+C2161 la_data_out[19] gnd 0.63fF
+C2162 la_data_in[19] gnd 0.63fF
+C2163 la_oenb[18] gnd 0.63fF
+C2164 la_data_out[18] gnd 0.63fF
+C2165 la_data_in[18] gnd 0.63fF
+C2166 la_oenb[17] gnd 0.63fF
+C2167 la_data_out[17] gnd 0.63fF
+C2168 la_data_in[17] gnd 0.63fF
+C2169 la_oenb[16] gnd 0.63fF
+C2170 la_data_out[16] gnd 0.63fF
+C2171 la_data_in[16] gnd 0.63fF
+C2172 la_oenb[15] gnd 0.63fF
+C2173 la_data_out[15] gnd 0.63fF
+C2174 la_data_in[15] gnd 0.63fF
+C2175 la_oenb[14] gnd 0.63fF
+C2176 la_data_out[14] gnd 0.63fF
+C2177 la_data_in[14] gnd 0.63fF
+C2178 la_oenb[13] gnd 0.63fF
+C2179 la_data_out[13] gnd 0.63fF
+C2180 la_data_in[13] gnd 0.63fF
+C2181 la_oenb[12] gnd 0.63fF
+C2182 la_data_out[12] gnd 0.63fF
+C2183 la_data_in[12] gnd 0.63fF
+C2184 la_oenb[11] gnd 0.63fF
+C2185 la_data_out[11] gnd 0.63fF
+C2186 la_data_in[11] gnd 0.63fF
+C2187 la_oenb[10] gnd 0.63fF
+C2188 la_data_out[10] gnd 0.63fF
+C2189 la_data_in[10] gnd 0.63fF
+C2190 la_oenb[9] gnd 0.63fF
+C2191 la_data_out[9] gnd 0.63fF
+C2192 la_data_in[9] gnd 0.63fF
+C2193 la_oenb[8] gnd 0.63fF
+C2194 la_data_out[8] gnd 0.63fF
+C2195 la_data_in[8] gnd 0.63fF
+C2196 la_oenb[7] gnd 0.63fF
+C2197 la_data_out[7] gnd 0.63fF
+C2198 la_data_in[7] gnd 0.63fF
+C2199 la_oenb[6] gnd 0.63fF
+C2200 la_data_out[6] gnd 0.63fF
+C2201 la_data_in[6] gnd 0.63fF
+C2202 la_oenb[5] gnd 0.63fF
+C2203 la_data_out[5] gnd 0.63fF
+C2204 la_data_in[5] gnd 0.63fF
+C2205 la_oenb[4] gnd 0.63fF
+C2206 la_data_out[4] gnd 0.63fF
+C2207 la_data_in[4] gnd 0.63fF
+C2208 la_oenb[3] gnd 0.63fF
+C2209 la_data_out[3] gnd 0.63fF
+C2210 la_data_in[3] gnd 0.63fF
+C2211 la_oenb[2] gnd 0.63fF
+C2212 la_data_out[2] gnd 0.63fF
+C2213 la_data_in[2] gnd 0.63fF
+C2214 la_oenb[1] gnd 0.63fF
+C2215 la_data_out[1] gnd 0.63fF
+C2216 la_data_in[1] gnd 0.63fF
+C2217 la_oenb[0] gnd 0.63fF
+C2218 la_data_out[0] gnd 0.63fF
+C2219 la_data_in[0] gnd 0.63fF
+C2220 wbs_dat_o[31] gnd 0.63fF
+C2221 wbs_dat_i[31] gnd 0.63fF
+C2222 wbs_adr_i[31] gnd 0.63fF
+C2223 wbs_dat_o[30] gnd 0.63fF
+C2224 wbs_dat_i[30] gnd 0.63fF
+C2225 wbs_adr_i[30] gnd 0.63fF
+C2226 wbs_dat_o[29] gnd 0.63fF
+C2227 wbs_dat_i[29] gnd 0.63fF
+C2228 wbs_adr_i[29] gnd 0.63fF
+C2229 wbs_dat_o[28] gnd 0.63fF
+C2230 wbs_dat_i[28] gnd 0.63fF
+C2231 wbs_adr_i[28] gnd 0.63fF
+C2232 wbs_dat_o[27] gnd 0.63fF
+C2233 wbs_dat_i[27] gnd 0.63fF
+C2234 wbs_adr_i[27] gnd 0.63fF
+C2235 wbs_dat_o[26] gnd 0.63fF
+C2236 wbs_dat_i[26] gnd 0.63fF
+C2237 wbs_adr_i[26] gnd 0.63fF
+C2238 wbs_dat_o[25] gnd 0.63fF
+C2239 wbs_dat_i[25] gnd 0.63fF
+C2240 wbs_adr_i[25] gnd 0.63fF
+C2241 wbs_dat_o[24] gnd 0.63fF
+C2242 wbs_dat_i[24] gnd 0.63fF
+C2243 wbs_adr_i[24] gnd 0.63fF
+C2244 wbs_dat_o[23] gnd 0.63fF
+C2245 wbs_dat_i[23] gnd 0.63fF
+C2246 wbs_adr_i[23] gnd 0.63fF
+C2247 wbs_dat_o[22] gnd 0.63fF
+C2248 wbs_dat_i[22] gnd 0.63fF
+C2249 wbs_adr_i[22] gnd 0.63fF
+C2250 wbs_dat_o[21] gnd 0.63fF
+C2251 wbs_dat_i[21] gnd 0.63fF
+C2252 wbs_adr_i[21] gnd 0.63fF
+C2253 wbs_dat_o[20] gnd 0.63fF
+C2254 wbs_dat_i[20] gnd 0.63fF
+C2255 wbs_adr_i[20] gnd 0.63fF
+C2256 wbs_dat_o[19] gnd 0.63fF
+C2257 wbs_dat_i[19] gnd 0.63fF
+C2258 wbs_adr_i[19] gnd 0.63fF
+C2259 wbs_dat_o[18] gnd 0.63fF
+C2260 wbs_dat_i[18] gnd 0.63fF
+C2261 wbs_adr_i[18] gnd 0.63fF
+C2262 wbs_dat_o[17] gnd 0.63fF
+C2263 wbs_dat_i[17] gnd 0.63fF
+C2264 wbs_adr_i[17] gnd 0.63fF
+C2265 wbs_dat_o[16] gnd 0.63fF
+C2266 wbs_dat_i[16] gnd 0.63fF
+C2267 wbs_adr_i[16] gnd 0.63fF
+C2268 wbs_dat_o[15] gnd 0.63fF
+C2269 wbs_dat_i[15] gnd 0.63fF
+C2270 wbs_adr_i[15] gnd 0.63fF
+C2271 wbs_dat_o[14] gnd 0.63fF
+C2272 wbs_dat_i[14] gnd 0.63fF
+C2273 wbs_adr_i[14] gnd 0.63fF
+C2274 wbs_dat_o[13] gnd 0.63fF
+C2275 wbs_dat_i[13] gnd 0.63fF
+C2276 wbs_adr_i[13] gnd 0.63fF
+C2277 wbs_dat_o[12] gnd 0.63fF
+C2278 wbs_dat_i[12] gnd 0.63fF
+C2279 wbs_adr_i[12] gnd 0.63fF
+C2280 wbs_dat_o[11] gnd 0.63fF
+C2281 wbs_dat_i[11] gnd 0.63fF
+C2282 wbs_adr_i[11] gnd 0.63fF
+C2283 wbs_dat_o[10] gnd 0.63fF
+C2284 wbs_dat_i[10] gnd 0.63fF
+C2285 wbs_adr_i[10] gnd 0.63fF
+C2286 wbs_dat_o[9] gnd 0.63fF
+C2287 wbs_dat_i[9] gnd 0.63fF
+C2288 wbs_adr_i[9] gnd 0.63fF
+C2289 wbs_dat_o[8] gnd 0.63fF
+C2290 wbs_dat_i[8] gnd 0.63fF
+C2291 wbs_adr_i[8] gnd 0.63fF
+C2292 wbs_dat_o[7] gnd 0.63fF
+C2293 wbs_dat_i[7] gnd 0.63fF
+C2294 wbs_adr_i[7] gnd 0.63fF
+C2295 wbs_dat_o[6] gnd 0.63fF
+C2296 wbs_dat_i[6] gnd 0.63fF
+C2297 wbs_adr_i[6] gnd 0.63fF
+C2298 wbs_dat_o[5] gnd 0.63fF
+C2299 wbs_dat_i[5] gnd 0.63fF
+C2300 wbs_adr_i[5] gnd 0.63fF
+C2301 wbs_dat_o[4] gnd 0.63fF
+C2302 wbs_dat_i[4] gnd 0.63fF
+C2303 wbs_adr_i[4] gnd 0.63fF
+C2304 wbs_sel_i[3] gnd 0.63fF
+C2305 wbs_dat_o[3] gnd 0.63fF
+C2306 wbs_dat_i[3] gnd 0.63fF
+C2307 wbs_adr_i[3] gnd 0.63fF
+C2308 wbs_sel_i[2] gnd 0.63fF
+C2309 wbs_dat_o[2] gnd 0.63fF
+C2310 wbs_dat_i[2] gnd 0.63fF
+C2311 wbs_adr_i[2] gnd 0.63fF
+C2312 wbs_sel_i[1] gnd 0.63fF
+C2313 wbs_dat_o[1] gnd 0.63fF
+C2314 wbs_dat_i[1] gnd 0.63fF
+C2315 wbs_adr_i[1] gnd 0.63fF
+C2316 wbs_sel_i[0] gnd 0.63fF
+C2317 wbs_dat_o[0] gnd 0.63fF
+C2318 wbs_dat_i[0] gnd 0.63fF
+C2319 wbs_adr_i[0] gnd 0.63fF
+C2320 wbs_we_i gnd 0.63fF
+C2321 wbs_stb_i gnd 0.63fF
+C2322 wbs_cyc_i gnd 0.63fF
+C2323 wbs_ack_o gnd 0.63fF
+C2324 wb_rst_i gnd 0.63fF
+C2325 wb_clk_i gnd 0.63fF
+C2326 m2_494098_659718# gnd 0.80fF **FLOATING
+C2327 pll_full_0/divider_0/and_0/Z1 gnd 0.65fF
+C2328 pll_full_0/divider_0/and_0/B gnd 2.45fF
+C2329 pll_full_0/divider_0/and_0/A gnd 2.35fF
+C2330 pll_full_0/divider_0/and_0/out1 gnd 2.99fF
+C2331 pll_full_0/divider_0/tspc_2/Z4 gnd 0.86fF
+C2332 pll_full_0/divider_0/tspc_2/Z3 gnd 2.26fF
+C2333 pll_full_0/divider_0/tspc_2/Z2 gnd 1.46fF
+C2334 pll_full_0/divider_0/tspc_2/Z1 gnd 0.99fF
+C2335 pll_full_0/divider_0/nor_0/A gnd 7.08fF
+C2336 pll_full_0/divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2337 pll_full_0/divider_0/tspc_1/Z4 gnd 0.86fF
+C2338 pll_full_0/divider_0/tspc_1/Z3 gnd 2.26fF
+C2339 pll_full_0/divider_0/tspc_1/Z2 gnd 1.46fF
+C2340 pll_full_0/divider_0/tspc_1/Z1 gnd 0.99fF
+C2341 pll_full_0/divider_0/nor_0/B gnd 7.12fF
+C2342 pll_full_0/divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2343 pll_full_0/divider_0/tspc_2/Q gnd 3.14fF
+C2344 pll_full_0/divider_0/tspc_0/Z4 gnd 0.86fF
+C2345 pll_full_0/divbuf_0/IN gnd 9.89fF
+C2346 pll_full_0/divider_0/tspc_0/Z3 gnd 2.26fF
+C2347 pll_full_0/divider_0/tspc_0/Z2 gnd 1.46fF
+C2348 pll_full_0/divider_0/tspc_0/Z1 gnd 0.99fF
+C2349 pll_full_0/divider_0/nor_1/B gnd 6.48fF
+C2350 pll_full_0/divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2351 pll_full_0/divider_0/tspc_1/Q gnd 3.12fF
+C2352 pll_full_0/divider_0/clk gnd 33.42fF
+C2353 pll_full_0/divider_0/prescaler_0/nand_1/z1 gnd 0.36fF
+C2354 pll_full_0/divider_0/prescaler_0/tspc_0/D gnd 2.64fF
+C2355 pll_full_0/divider_0/prescaler_0/tspc_2/Q gnd 3.72fF
+C2356 pll_full_0/divider_0/prescaler_0/tspc_1/Q gnd 3.61fF
+C2357 pll_full_0/divider_0/prescaler_0/nand_0/z1 gnd 0.36fF
+C2358 pll_full_0/divider_0/prescaler_0/tspc_2/D gnd 3.12fF
+C2359 pll_full_0/divider_0/and_0/OUT gnd 5.67fF
+C2360 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2361 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2362 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 gnd 1.19fF
+C2363 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2364 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.47fF **FLOATING
+C2365 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2366 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2367 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2368 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2369 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2370 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2371 pll_full_0/divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2372 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2373 pll_full_0/divider_0/prescaler_0/Out gnd 4.59fF
+C2374 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2375 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2376 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2377 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2378 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2379 pll_full_0/divider_0/nor_1/Z1 gnd 1.34fF
+C2380 pll_full_0/divider_0/nor_0/Z1 gnd 1.34fF
+C2381 pll_full_0/divbuf_1/OUT gnd 363.82fF
+C2382 pll_full_0/divbuf_1/OUT5 gnd 350.37fF
+C2383 pll_full_0/divbuf_1/OUT4 gnd 133.72fF
+C2384 pll_full_0/divbuf_1/OUT3 gnd 34.03fF
+C2385 pll_full_0/divbuf_1/OUT2 gnd 8.71fF
+C2386 pll_full_0/divbuf_1/a_492_n240# gnd 2.46fF **FLOATING
+C2387 pll_full_0/divbuf_0/OUT5 gnd 350.37fF
+C2388 pll_full_0/divbuf_0/OUT4 gnd 133.72fF
+C2389 pll_full_0/divbuf_0/OUT3 gnd 34.03fF
+C2390 pll_full_0/divbuf_0/OUT2 gnd 8.71fF
+C2391 pll_full_0/divbuf_0/a_492_n240# gnd 2.46fF **FLOATING
+C2392 pll_full_0/ro_complete_0/cbank_2/v gnd 16.43fF
+C2393 pll_full_0/ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF
+C2394 pll_full_0/ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF
+C2395 pll_full_0/ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF
+C2396 pll_full_0/ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF
+C2397 pll_full_0/ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF
+C2398 pll_full_0/ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF
+C2399 pll_full_0/ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF
+C2400 pll_full_0/ro_complete_0/a0 gnd 5.35fF
+C2401 pll_full_0/ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF
+C2402 pll_full_0/ro_complete_0/a1 gnd 6.54fF
+C2403 pll_full_0/ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF
+C2404 pll_full_0/ro_complete_0/a3 gnd 5.96fF
+C2405 pll_full_0/ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF
+C2406 pll_full_0/ro_complete_0/a2 gnd 5.21fF
+C2407 pll_full_0/ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF
+C2408 pll_full_0/ro_complete_0/a4 gnd 5.81fF
+C2409 pll_full_0/ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF
+C2410 pll_full_0/ro_complete_0/a5 gnd 6.74fF
+C2411 pll_full_0/ro_complete_0/cbank_0/v gnd 15.12fF
+C2412 pll_full_0/ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF
+C2413 pll_full_0/ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF
+C2414 pll_full_0/ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF
+C2415 pll_full_0/ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF
+C2416 pll_full_0/ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF
+C2417 pll_full_0/ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF
+C2418 pll_full_0/ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF
+C2419 pll_full_0/filter_0/a_4216_n5230# gnd 418.90fF **FLOATING
+C2420 pll_full_0/filter_0/a_4216_n2998# gnd 1.39fF **FLOATING
+C2421 pll_full_0/cp_0/down gnd 1.54fF
+C2422 pll_full_0/cp_0/upbar gnd 1.79fF
+C2423 pll_full_0/cp_0/a_7110_n2840# gnd 0.17fF **FLOATING
+C2424 pll_full_0/cp_0/a_3060_n2840# gnd 1.71fF **FLOATING
+C2425 pll_full_0/cp_0/a_7110_0# gnd 0.17fF **FLOATING
+C2426 pll_full_0/cp_0/a_6370_0# gnd 0.40fF **FLOATING
+C2427 pll_full_0/cp_0/a_3060_0# gnd 2.49fF **FLOATING
+C2428 pll_full_0/cp_0/a_1710_0# gnd 7.47fF **FLOATING
+C2429 pll_full_0/pd_0/and_pd_0/Z1 gnd 0.39fF
+C2430 pll_full_0/pd_0/and_pd_0/Out1 gnd 2.22fF
+C2431 pll_full_0/pd_0/tspc_r_1/z5 gnd 1.10fF
+C2432 pll_full_0/pd_0/tspc_r_1/Z4 gnd 1.07fF
+C2433 pll_full_0/pd_0/tspc_r_1/Qbar gnd 0.88fF
+C2434 pll_full_0/pd_0/tspc_r_1/Z2 gnd 1.22fF
+C2435 pll_full_0/pd_0/tspc_r_1/Z1 gnd 0.67fF
+C2436 pll_full_0/pd_0/UP gnd 6.41fF
+C2437 pll_full_0/pd_0/tspc_r_1/Qbar1 gnd 1.34fF
+C2438 pll_full_0/pd_0/tspc_r_1/Z3 gnd 2.12fF
+C2439 pll_full_0/pd_0/REF gnd 6.48fF
+C2440 pll_full_0/pd_0/tspc_r_0/z5 gnd 1.10fF
+C2441 pll_full_0/pd_0/tspc_r_0/Z4 gnd 1.07fF
+C2442 pll_full_0/pd_0/R gnd 3.05fF
+C2443 pll_full_0/pd_0/tspc_r_0/Qbar gnd 0.79fF
+C2444 pll_full_0/pd_0/tspc_r_0/Z2 gnd 1.22fF
+C2445 pll_full_0/pd_0/tspc_r_0/Z1 gnd 0.67fF
+C2446 pll_full_0/pd_0/DOWN gnd 7.34fF
+C2447 pll_full_0/pd_0/tspc_r_0/Qbar1 gnd 1.34fF
+C2448 pll_full_0/pd_0/tspc_r_0/Z3 gnd 2.12fF
+C2449 pll_full_0/pd_0/DIV gnd 372.69fF
+C2450 divbuf_19/OUT5 gnd 350.37fF
+C2451 divbuf_19/OUT4 gnd 133.72fF
+C2452 divbuf_19/OUT3 gnd 34.03fF
+C2453 divbuf_19/OUT2 gnd 8.71fF
+C2454 divbuf_19/IN gnd 0.89fF
+C2455 divbuf_19/a_492_n240# gnd 2.46fF **FLOATING
+C2456 divbuf_18/OUT5 gnd 350.37fF
+C2457 divbuf_18/OUT4 gnd 133.72fF
+C2458 divbuf_18/OUT3 gnd 34.03fF
+C2459 divbuf_18/OUT2 gnd 8.71fF
+C2460 divbuf_18/IN gnd 0.89fF
+C2461 divbuf_18/a_492_n240# gnd 2.46fF **FLOATING
+C2462 divbuf_17/OUT gnd 363.82fF
+C2463 divbuf_17/OUT5 gnd 350.37fF
+C2464 divbuf_17/OUT4 gnd 133.72fF
+C2465 divbuf_17/OUT3 gnd 34.03fF
+C2466 divbuf_17/OUT2 gnd 8.71fF
+C2467 divbuf_17/IN gnd 0.89fF
+C2468 divbuf_17/a_492_n240# gnd 2.46fF **FLOATING
+C2469 divider_2/and_0/Z1 gnd 0.74fF
+C2470 divider_2/and_0/B gnd 2.25fF
+C2471 divider_2/and_0/A gnd 2.19fF
+C2472 divider_2/and_0/out1 gnd 2.93fF
+C2473 divider_2/tspc_2/Z4 gnd 0.86fF
+C2474 divider_2/tspc_2/Z3 gnd 2.26fF
+C2475 divider_2/tspc_2/Z2 gnd 1.46fF
+C2476 divider_2/tspc_2/Z1 gnd 0.99fF
+C2477 divider_2/nor_0/A gnd 7.04fF
+C2478 divider_2/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2479 divider_2/tspc_1/Z4 gnd 0.86fF
+C2480 divider_2/tspc_1/Z3 gnd 2.26fF
+C2481 divider_2/tspc_1/Z2 gnd 1.46fF
+C2482 divider_2/tspc_1/Z1 gnd 0.99fF
+C2483 divider_2/nor_0/B gnd 7.05fF
+C2484 divider_2/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2485 divider_2/tspc_2/Q gnd 3.14fF
+C2486 divider_2/tspc_0/Z4 gnd 0.86fF
+C2487 divider_2/Out gnd 1.60fF
+C2488 divider_2/tspc_0/Z3 gnd 2.26fF
+C2489 divider_2/tspc_0/Z2 gnd 1.46fF
+C2490 divider_2/tspc_0/Z1 gnd 0.99fF
+C2491 divider_2/nor_1/B gnd 6.44fF
+C2492 divider_2/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2493 divider_2/tspc_1/Q gnd 3.12fF
+C2494 divider_2/clk gnd 5.63fF
+C2495 divider_2/prescaler_0/nand_1/z1 gnd 0.36fF
+C2496 divider_2/prescaler_0/tspc_0/D gnd 2.64fF
+C2497 divider_2/prescaler_0/tspc_2/Q gnd 3.74fF
+C2498 divider_2/prescaler_0/tspc_1/Q gnd 3.61fF
+C2499 divider_2/prescaler_0/nand_0/z1 gnd 0.36fF
+C2500 divider_2/prescaler_0/tspc_2/D gnd 3.12fF
+C2501 divider_2/and_0/OUT gnd 5.62fF
+C2502 divider_2/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2503 divider_2/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2504 divider_2/prescaler_0/tspc_2/Z2 gnd 1.46fF
+C2505 divider_2/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2506 divider_2/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING
+C2507 divider_2/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2508 divider_2/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2509 divider_2/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2510 divider_2/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2511 divider_2/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2512 divider_2/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2513 divider_2/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2514 divider_2/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2515 divider_2/prescaler_0/Out gnd 4.59fF
+C2516 divider_2/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2517 divider_2/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2518 divider_2/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2519 divider_2/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2520 divider_2/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2521 divider_2/nor_1/Z1 gnd 1.34fF
+C2522 divider_2/mc2 gnd 5.29fF
+C2523 divider_2/nor_0/Z1 gnd 1.34fF
+C2524 divbuf_16/OUT gnd 363.82fF
+C2525 divbuf_16/OUT5 gnd 350.37fF
+C2526 divbuf_16/OUT4 gnd 133.72fF
+C2527 divbuf_16/OUT3 gnd 34.03fF
+C2528 divbuf_16/OUT2 gnd 8.71fF
+C2529 divbuf_16/IN gnd 0.89fF
+C2530 divbuf_16/a_492_n240# gnd 2.46fF **FLOATING
+C2531 divider_1/and_0/Z1 gnd 0.74fF
+C2532 divider_1/and_0/B gnd 2.25fF
+C2533 divider_1/and_0/A gnd 2.19fF
+C2534 divider_1/and_0/out1 gnd 2.93fF
+C2535 divider_1/tspc_2/Z4 gnd 0.86fF
+C2536 divider_1/tspc_2/Z3 gnd 2.26fF
+C2537 divider_1/tspc_2/Z2 gnd 1.46fF
+C2538 divider_1/tspc_2/Z1 gnd 0.99fF
+C2539 divider_1/nor_0/A gnd 7.04fF
+C2540 divider_1/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2541 divider_1/tspc_1/Z4 gnd 0.86fF
+C2542 divider_1/tspc_1/Z3 gnd 2.26fF
+C2543 divider_1/tspc_1/Z2 gnd 1.46fF
+C2544 divider_1/tspc_1/Z1 gnd 0.99fF
+C2545 divider_1/nor_0/B gnd 7.05fF
+C2546 divider_1/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2547 divider_1/tspc_2/Q gnd 3.14fF
+C2548 divider_1/tspc_0/Z4 gnd 0.86fF
+C2549 divider_1/Out gnd 1.60fF
+C2550 divider_1/tspc_0/Z3 gnd 2.26fF
+C2551 divider_1/tspc_0/Z2 gnd 1.46fF
+C2552 divider_1/tspc_0/Z1 gnd 0.99fF
+C2553 divider_1/nor_1/B gnd 6.33fF
+C2554 divider_1/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2555 divider_1/tspc_1/Q gnd 3.12fF
+C2556 divider_1/clk gnd 5.63fF
+C2557 divider_1/prescaler_0/nand_1/z1 gnd 0.36fF
+C2558 divider_1/prescaler_0/tspc_0/D gnd 2.64fF
+C2559 divider_1/prescaler_0/tspc_2/Q gnd 3.74fF
+C2560 divider_1/prescaler_0/tspc_1/Q gnd 3.61fF
+C2561 divider_1/prescaler_0/nand_0/z1 gnd 0.36fF
+C2562 divider_1/prescaler_0/tspc_2/D gnd 3.12fF
+C2563 divider_1/and_0/OUT gnd 5.62fF
+C2564 divider_1/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2565 divider_1/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2566 divider_1/prescaler_0/tspc_2/Z2 gnd 1.46fF
+C2567 divider_1/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2568 divider_1/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING
+C2569 divider_1/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2570 divider_1/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2571 divider_1/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2572 divider_1/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2573 divider_1/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2574 divider_1/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2575 divider_1/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2576 divider_1/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2577 divider_1/prescaler_0/Out gnd 4.59fF
+C2578 divider_1/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2579 divider_1/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2580 divider_1/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2581 divider_1/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2582 divider_1/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2583 divider_1/nor_1/Z1 gnd 1.34fF
+C2584 divider_1/mc2 gnd 5.29fF
+C2585 divider_1/nor_0/Z1 gnd 1.34fF
+C2586 divbuf_15/OUT gnd 363.82fF
+C2587 divbuf_15/OUT5 gnd 350.37fF
+C2588 divbuf_15/OUT4 gnd 133.72fF
+C2589 divbuf_15/OUT3 gnd 34.03fF
+C2590 divbuf_15/OUT2 gnd 8.71fF
+C2591 divbuf_15/IN gnd 0.89fF
+C2592 divbuf_15/a_492_n240# gnd 2.46fF **FLOATING
+C2593 divider_0/and_0/Z1 gnd 0.74fF
+C2594 divider_0/and_0/B gnd 2.25fF
+C2595 divider_0/and_0/A gnd 2.19fF
+C2596 divider_0/and_0/out1 gnd 2.93fF
+C2597 divider_0/tspc_2/Z4 gnd 0.86fF
+C2598 divider_0/tspc_2/Z3 gnd 2.26fF
+C2599 divider_0/tspc_2/Z2 gnd 1.46fF
+C2600 divider_0/tspc_2/Z1 gnd 0.99fF
+C2601 divider_0/nor_0/A gnd 7.04fF
+C2602 divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING
+C2603 divider_0/tspc_1/Z4 gnd 0.86fF
+C2604 divider_0/tspc_1/Z3 gnd 2.26fF
+C2605 divider_0/tspc_1/Z2 gnd 1.46fF
+C2606 divider_0/tspc_1/Z1 gnd 0.99fF
+C2607 divider_0/nor_0/B gnd 7.05fF
+C2608 divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING
+C2609 divider_0/tspc_2/Q gnd 3.14fF
+C2610 divider_0/tspc_0/Z4 gnd 0.86fF
+C2611 divider_0/Out gnd 1.60fF
+C2612 divider_0/tspc_0/Z3 gnd 2.26fF
+C2613 divider_0/tspc_0/Z2 gnd 1.46fF
+C2614 divider_0/tspc_0/Z1 gnd 0.99fF
+C2615 divider_0/nor_1/B gnd 6.33fF
+C2616 divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING
+C2617 divider_0/tspc_1/Q gnd 3.12fF
+C2618 divider_0/clk gnd 5.63fF
+C2619 divider_0/prescaler_0/nand_1/z1 gnd 0.36fF
+C2620 divider_0/prescaler_0/tspc_0/D gnd 2.64fF
+C2621 divider_0/prescaler_0/tspc_2/Q gnd 3.64fF
+C2622 divider_0/prescaler_0/tspc_1/Q gnd 3.61fF
+C2623 divider_0/prescaler_0/nand_0/z1 gnd 0.36fF
+C2624 divider_0/prescaler_0/tspc_2/D gnd 3.12fF
+C2625 divider_0/and_0/OUT gnd 5.62fF
+C2626 divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF
+C2627 divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF
+C2628 divider_0/prescaler_0/tspc_2/Z2 gnd 1.46fF
+C2629 divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF
+C2630 divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING
+C2631 divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING
+C2632 divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF
+C2633 divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF
+C2634 divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF
+C2635 divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF
+C2636 divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING
+C2637 divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING
+C2638 divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF
+C2639 divider_0/prescaler_0/Out gnd 4.59fF
+C2640 divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF
+C2641 divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF
+C2642 divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF
+C2643 divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING
+C2644 divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING
+C2645 divider_0/nor_1/Z1 gnd 1.34fF
+C2646 divider_0/mc2 gnd 5.29fF
+C2647 divider_0/nor_0/Z1 gnd 1.34fF
+C2648 divbuf_14/OUT gnd 363.82fF
+C2649 divbuf_14/OUT5 gnd 350.37fF
+C2650 divbuf_14/OUT4 gnd 133.72fF
+C2651 divbuf_14/OUT3 gnd 34.03fF
+C2652 divbuf_14/OUT2 gnd 8.71fF
+C2653 divbuf_14/IN gnd 0.89fF
+C2654 divbuf_14/a_492_n240# gnd 2.46fF **FLOATING
+C2655 divbuf_25/OUT gnd 363.82fF
+C2656 divbuf_25/OUT5 gnd 350.37fF
+C2657 divbuf_25/OUT4 gnd 133.72fF
+C2658 divbuf_25/OUT3 gnd 34.03fF
+C2659 divbuf_25/OUT2 gnd 8.71fF
+C2660 divbuf_25/IN gnd 0.89fF
+C2661 divbuf_25/a_492_n240# gnd 2.46fF **FLOATING
+C2662 divbuf_9/OUT gnd 363.82fF
+C2663 divbuf_9/OUT5 gnd 350.37fF
+C2664 divbuf_9/OUT4 gnd 133.72fF
+C2665 divbuf_9/OUT3 gnd 34.03fF
+C2666 divbuf_9/OUT2 gnd 8.71fF
+C2667 divbuf_9/IN gnd 0.89fF
+C2668 divbuf_9/a_492_n240# gnd 2.46fF **FLOATING
+C2669 divbuf_13/OUT gnd 363.82fF
+C2670 divbuf_13/OUT5 gnd 350.37fF
+C2671 divbuf_13/OUT4 gnd 133.72fF
+C2672 divbuf_13/OUT3 gnd 34.03fF
+C2673 divbuf_13/OUT2 gnd 8.71fF
+C2674 divbuf_13/IN gnd 0.89fF
+C2675 divbuf_13/a_492_n240# gnd 2.46fF **FLOATING
+C2676 divbuf_24/OUT gnd 363.82fF
+C2677 divbuf_24/OUT5 gnd 350.37fF
+C2678 divbuf_24/OUT4 gnd 133.72fF
+C2679 divbuf_24/OUT3 gnd 34.03fF
+C2680 divbuf_24/OUT2 gnd 8.71fF
+C2681 divbuf_24/IN gnd 0.89fF
+C2682 divbuf_24/a_492_n240# gnd 2.46fF **FLOATING
+C2683 divbuf_12/OUT gnd 363.82fF
+C2684 divbuf_12/OUT5 gnd 350.37fF
+C2685 divbuf_12/OUT4 gnd 133.72fF
+C2686 divbuf_12/OUT3 gnd 34.03fF
+C2687 divbuf_12/OUT2 gnd 8.71fF
+C2688 divbuf_12/IN gnd 0.89fF
+C2689 divbuf_12/a_492_n240# gnd 2.46fF **FLOATING
+C2690 divbuf_8/OUT gnd 363.82fF
+C2691 divbuf_8/OUT5 gnd 350.37fF
+C2692 divbuf_8/OUT4 gnd 133.72fF
+C2693 divbuf_8/OUT3 gnd 34.03fF
+C2694 divbuf_8/OUT2 gnd 8.71fF
+C2695 divbuf_8/IN gnd 0.89fF
+C2696 divbuf_8/a_492_n240# gnd 2.46fF **FLOATING
+C2697 divbuf_23/OUT5 gnd 350.37fF
+C2698 divbuf_23/OUT4 gnd 133.72fF
+C2699 divbuf_23/OUT3 gnd 34.03fF
+C2700 divbuf_23/OUT2 gnd 8.71fF
+C2701 divbuf_23/IN gnd 0.89fF
+C2702 divbuf_23/a_492_n240# gnd 2.46fF **FLOATING
+C2703 divbuf_7/OUT gnd 363.82fF
+C2704 divbuf_7/OUT5 gnd 350.37fF
+C2705 divbuf_7/OUT4 gnd 133.72fF
+C2706 divbuf_7/OUT3 gnd 34.03fF
+C2707 divbuf_7/OUT2 gnd 8.71fF
+C2708 divbuf_7/IN gnd 0.89fF
+C2709 divbuf_7/a_492_n240# gnd 2.46fF **FLOATING
+C2710 divbuf_11/OUT gnd 363.82fF
+C2711 divbuf_11/OUT5 gnd 350.37fF
+C2712 divbuf_11/OUT4 gnd 133.72fF
+C2713 divbuf_11/OUT3 gnd 34.03fF
+C2714 divbuf_11/OUT2 gnd 8.71fF
+C2715 divbuf_11/IN gnd 0.89fF
+C2716 divbuf_11/a_492_n240# gnd 2.46fF **FLOATING
+C2717 divbuf_22/OUT5 gnd 350.37fF
+C2718 divbuf_22/OUT4 gnd 133.72fF
+C2719 divbuf_22/OUT3 gnd 34.03fF
+C2720 divbuf_22/OUT2 gnd 8.71fF
+C2721 divbuf_22/IN gnd 0.89fF
+C2722 divbuf_22/a_492_n240# gnd 2.46fF **FLOATING
+C2723 divbuf_6/OUT gnd 363.82fF
+C2724 divbuf_6/OUT5 gnd 350.37fF
+C2725 divbuf_6/OUT4 gnd 133.72fF
+C2726 divbuf_6/OUT3 gnd 34.03fF
+C2727 divbuf_6/OUT2 gnd 8.71fF
+C2728 divbuf_6/IN gnd 0.89fF
+C2729 divbuf_6/a_492_n240# gnd 2.46fF **FLOATING
+C2730 divbuf_10/OUT gnd 363.82fF
+C2731 divbuf_10/OUT5 gnd 350.37fF
+C2732 divbuf_10/OUT4 gnd 133.72fF
+C2733 divbuf_10/OUT3 gnd 34.03fF
+C2734 divbuf_10/OUT2 gnd 8.71fF
+C2735 divbuf_10/IN gnd 0.89fF
+C2736 divbuf_10/a_492_n240# gnd 2.46fF **FLOATING
+C2737 divbuf_20/OUT5 gnd 350.37fF
+C2738 divbuf_20/OUT4 gnd 133.72fF
+C2739 divbuf_20/OUT3 gnd 34.03fF
+C2740 divbuf_20/OUT2 gnd 8.71fF
+C2741 divbuf_20/IN gnd 0.89fF
+C2742 divbuf_20/a_492_n240# gnd 2.46fF **FLOATING
+C2743 divbuf_21/OUT5 gnd 350.37fF
+C2744 divbuf_21/OUT4 gnd 133.72fF
+C2745 divbuf_21/OUT3 gnd 34.03fF
+C2746 divbuf_21/OUT2 gnd 8.71fF
+C2747 divbuf_21/IN gnd 0.89fF
+C2748 divbuf_21/a_492_n240# gnd 2.46fF **FLOATING
+C2749 divbuf_5/OUT gnd 363.82fF
+C2750 divbuf_5/OUT5 gnd 350.37fF
+C2751 divbuf_5/OUT4 gnd 133.72fF
+C2752 divbuf_5/OUT3 gnd 34.03fF
+C2753 divbuf_5/OUT2 gnd 8.71fF
+C2754 divbuf_5/IN gnd 0.89fF
+C2755 divbuf_5/a_492_n240# gnd 2.46fF **FLOATING
+C2756 divbuf_4/OUT gnd 363.82fF
+C2757 divbuf_4/OUT5 gnd 350.37fF
+C2758 divbuf_4/OUT4 gnd 133.72fF
+C2759 divbuf_4/OUT3 gnd 34.03fF
+C2760 divbuf_4/OUT2 gnd 8.71fF
+C2761 divbuf_4/IN gnd 0.89fF
+C2762 divbuf_4/a_492_n240# gnd 2.46fF **FLOATING
+C2763 divbuf_3/OUT gnd 363.82fF
+C2764 divbuf_3/OUT5 gnd 350.37fF
+C2765 divbuf_3/OUT4 gnd 133.72fF
+C2766 divbuf_3/OUT3 gnd 34.03fF
+C2767 divbuf_3/OUT2 gnd 8.71fF
+C2768 divbuf_3/IN gnd 0.89fF
+C2769 divbuf_3/a_492_n240# gnd 2.46fF **FLOATING
+C2770 divbuf_2/OUT gnd 363.82fF
+C2771 divbuf_2/OUT5 gnd 350.37fF
+C2772 divbuf_2/OUT4 gnd 133.72fF
+C2773 divbuf_2/OUT3 gnd 34.03fF
+C2774 divbuf_2/OUT2 gnd 8.71fF
+C2775 divbuf_2/IN gnd 0.89fF
+C2776 divbuf_2/a_492_n240# gnd 2.46fF **FLOATING
+C2777 divbuf_1/OUT gnd 363.82fF
+C2778 divbuf_1/OUT5 gnd 350.37fF
+C2779 divbuf_1/OUT4 gnd 133.72fF
+C2780 divbuf_1/OUT3 gnd 34.03fF
+C2781 divbuf_1/OUT2 gnd 8.71fF
+C2782 divbuf_1/IN gnd 0.89fF
+C2783 divbuf_1/a_492_n240# gnd 2.46fF **FLOATING
+C2784 divbuf_0/OUT5 gnd 350.37fF
+C2785 divbuf_0/OUT4 gnd 133.72fF
+C2786 divbuf_0/OUT3 gnd 34.03fF
+C2787 divbuf_0/OUT2 gnd 8.71fF
+C2788 divbuf_0/IN gnd 0.89fF
+C2789 divbuf_0/a_492_n240# gnd 2.46fF **FLOATING
+C2790 ro_complete_1/cbank_2/v gnd 16.43fF
+C2791 ro_complete_1/cbank_2/switch_5/vin gnd 0.78fF
+C2792 ro_complete_1/cbank_2/switch_4/vin gnd 1.50fF
+C2793 ro_complete_1/cbank_2/switch_2/vin gnd 1.30fF
+C2794 ro_complete_1/cbank_2/switch_3/vin gnd 0.56fF
+C2795 ro_complete_1/cbank_2/switch_1/vin gnd 1.14fF
+C2796 ro_complete_1/cbank_2/switch_0/vin gnd 1.02fF
+C2797 ro_complete_1/cbank_1/v gnd 16.43fF
+C2798 ro_complete_1/cbank_1/switch_5/vin gnd 0.78fF
+C2799 ro_complete_1/a0 gnd 5.35fF
+C2800 ro_complete_1/cbank_1/switch_4/vin gnd 1.50fF
+C2801 ro_complete_1/a1 gnd 6.54fF
+C2802 ro_complete_1/cbank_1/switch_2/vin gnd 1.30fF
+C2803 ro_complete_1/a3 gnd 5.96fF
+C2804 ro_complete_1/cbank_1/switch_3/vin gnd 0.56fF
+C2805 ro_complete_1/a2 gnd 5.21fF
+C2806 ro_complete_1/cbank_1/switch_1/vin gnd 1.14fF
+C2807 ro_complete_1/a4 gnd 5.81fF
+C2808 ro_complete_1/cbank_1/switch_0/vin gnd 1.02fF
+C2809 ro_complete_1/a5 gnd 6.74fF
+C2810 ro_complete_1/cbank_0/v gnd 15.12fF
+C2811 ro_complete_1/cbank_0/switch_5/vin gnd 0.78fF
+C2812 ro_complete_1/cbank_0/switch_4/vin gnd 1.50fF
+C2813 ro_complete_1/cbank_0/switch_2/vin gnd 1.30fF
+C2814 ro_complete_1/cbank_0/switch_3/vin gnd 0.56fF
+C2815 ro_complete_1/cbank_0/switch_1/vin gnd 1.14fF
+C2816 ro_complete_1/cbank_0/switch_0/vin gnd 1.02fF
+C2817 ro_complete_1/ro_var_extend_0/vcont gnd 0.27fF
+C2818 ro_complete_0/cbank_2/v gnd 16.43fF
+C2819 ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF
+C2820 ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF
+C2821 ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF
+C2822 ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF
+C2823 ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF
+C2824 ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF
+C2825 ro_complete_0/cbank_1/v gnd 16.46fF
+C2826 ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF
+C2827 divbuf_18/OUT gnd 405.76fF
+C2828 ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF
+C2829 divbuf_19/OUT gnd 402.77fF
+C2830 ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF
+C2831 divbuf_22/OUT gnd 394.74fF
+C2832 ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF
+C2833 divbuf_20/OUT gnd 397.92fF
+C2834 ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF
+C2835 divbuf_21/OUT gnd 391.26fF
+C2836 ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF
+C2837 divbuf_23/OUT gnd 387.66fF
+C2838 ro_complete_0/cbank_0/v gnd 15.12fF
+C2839 ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF
+C2840 ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF
+C2841 ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF
+C2842 ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF
+C2843 ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF
+C2844 ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF
+C2845 ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF
+C2846 filter_0/v gnd 477.90fF
+C2847 filter_0/a_4216_n5230# gnd 418.47fF **FLOATING
+C2848 filter_0/a_4216_n2998# gnd 1.03fF **FLOATING
+C2849 cp_0/down gnd 1.54fF
+C2850 cp_0/vbias gnd 2.41fF
+C2851 cp_0/out gnd 5.34fF
+C2852 cp_0/upbar gnd 1.50fF
+C2853 cp_0/a_7110_n2840# gnd 0.17fF **FLOATING
+C2854 cp_0/a_3060_n2840# gnd 1.71fF **FLOATING
+C2855 cp_0/a_7110_0# gnd 0.17fF **FLOATING
+C2856 cp_0/a_6370_0# gnd 0.40fF **FLOATING
+C2857 cp_0/a_3060_0# gnd 1.66fF **FLOATING
+C2858 cp_0/a_1710_0# gnd 5.89fF **FLOATING
+C2859 cp_0/a_1710_n2840# gnd 4.91fF **FLOATING
+C2860 cp_0/a_10_n50# gnd 2.96fF **FLOATING
+C2861 pd_1/and_pd_0/Z1 gnd 0.39fF
+C2862 pd_1/and_pd_0/Out1 gnd 2.22fF
+C2863 pd_1/tspc_r_1/z5 gnd 1.10fF
+C2864 pd_1/tspc_r_1/Z4 gnd 1.07fF
+C2865 pd_1/tspc_r_1/Qbar gnd 0.88fF
+C2866 pd_1/tspc_r_1/Z2 gnd 1.22fF
+C2867 pd_1/tspc_r_1/Z1 gnd 0.67fF
+C2868 pd_1/UP gnd 2.21fF
+C2869 pd_1/tspc_r_1/Qbar1 gnd 1.34fF
+C2870 pd_1/tspc_r_1/Z3 gnd 2.12fF
+C2871 pd_1/REF gnd 1.80fF
+C2872 pd_1/tspc_r_0/z5 gnd 1.10fF
+C2873 pd_1/tspc_r_0/Z4 gnd 1.07fF
+C2874 pd_1/R gnd 3.05fF
+C2875 pd_1/tspc_r_0/Qbar gnd 0.79fF
+C2876 pd_1/tspc_r_0/Z2 gnd 1.22fF
+C2877 pd_1/tspc_r_0/Z1 gnd 0.67fF
+C2878 pd_1/DOWN gnd 3.08fF
+C2879 pd_1/tspc_r_0/Qbar1 gnd 1.34fF
+C2880 pd_1/tspc_r_0/Z3 gnd 2.12fF
+C2881 pd_1/DIV gnd 1.82fF
+C2882 pd_0/and_pd_0/Z1 gnd 0.39fF
+C2883 pd_0/and_pd_0/Out1 gnd 2.22fF
+C2884 pd_0/tspc_r_1/z5 gnd 1.10fF
+C2885 pd_0/tspc_r_1/Z4 gnd 1.07fF
+C2886 pd_0/tspc_r_1/Qbar gnd 0.88fF
+C2887 pd_0/tspc_r_1/Z2 gnd 1.22fF
+C2888 pd_0/tspc_r_1/Z1 gnd 0.67fF
+C2889 pd_0/UP gnd 2.21fF
+C2890 pd_0/tspc_r_1/Qbar1 gnd 1.34fF
+C2891 pd_0/tspc_r_1/Z3 gnd 2.12fF
+C2892 pd_0/REF gnd 1.80fF
+C2893 pd_0/tspc_r_0/z5 gnd 1.10fF
+C2894 pd_0/tspc_r_0/Z4 gnd 1.07fF
+C2895 pd_0/R gnd 3.05fF
+C2896 pd_0/tspc_r_0/Qbar gnd 0.79fF
+C2897 pd_0/tspc_r_0/Z2 gnd 1.22fF
+C2898 pd_0/tspc_r_0/Z1 gnd 0.67fF
+C2899 pd_0/DOWN gnd 3.08fF
+C2900 pd_0/tspc_r_0/Qbar1 gnd 1.34fF
+C2901 pd_0/tspc_r_0/Z3 gnd 2.12fF
+C2902 pd_0/DIV gnd 1.82fF
 .ends