* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A

.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+ wbs_stb_i wbs_we_i
C0 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C1 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/vco 0.14fF
C5 cp_buffered_0/tapered_buf_2/in3 cp_buffered_0/tapered_buf_2/in4 4.78fF
C6 cp_buffered_0/tapered_buf_2/in2 cp_buffered_0/tapered_buf_2/in5 0.84fF
C7 pd_buffered_0/tapered_buf_0/in3 pd_buffered_0/tapered_buf_0/in4 4.78fF
C8 pd_buffered_0/tapered_buf_0/in2 pd_buffered_0/tapered_buf_0/in5 0.84fF
C9 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C10 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.01fF
C11 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
C12 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF
C13 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C14 pll_full_buffered2_0/tapered_buf_3/in1 pll_full_buffered2_0/tapered_buf_3/in2 0.37fF
C15 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C16 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C17 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF
C18 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
C19 gpio_analog[5] ro_divider_buffered_0/ro_complete_0/a2 1.38fF
C20 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z2 0.30fF
C21 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Q 0.04fF
C22 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF
C23 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_0/Z1 0.18fF
C24 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C25 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF
C26 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_2/Z2 0.20fF
C27 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 0.15fF
C28 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C29 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF
C30 io_analog[6] ro_complete_buffered_0/ro_complete_0/a0 0.23fF
C31 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
C32 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF
C33 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF
C34 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C35 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF
C36 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/DIV 0.17fF
C37 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v pll_full_buffered1_0/pll_full_0/vco 1.36fF
C38 gpio_noesd[7] io_analog[10] 5.73fF
C39 io_analog[4] ro_divider_buffered_0/ro_complete_0/a2 0.24fF
C40 pll_full_buffered2_0/tapered_buf_1/in1 pll_full_buffered2_0/tapered_buf_1/in5 0.22fF
C41 ro_divider_buffered_0/tapered_buf_7/in1 ro_divider_buffered_0/tapered_buf_7/in2 0.37fF
C42 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/tspc_2/Z2 0.01fF
C43 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C44 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z2 0.30fF
C45 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.20fF
C46 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF
C47 div_pd_buffered_0/tapered_buf_3/in5 div_pd_buffered_0/divider_0/clk 26.29fF
C48 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/clk 0.26fF
C49 divider_buffered_0/tapered_buf_1/in3 divider_buffered_0/tapered_buf_1/in2 1.27fF
C50 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.30fF
C51 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF
C52 gpio_noesd[14] gpio_noesd[10] 2.89fF
C53 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF
C54 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.04fF
C55 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.01fF
C56 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/vco 0.05fF
C57 pll_full_buffered2_0/tapered_buf_3/in2 pll_full_buffered2_0/tapered_buf_3/in3 1.27fF
C58 cp_buffered_0/tapered_buf_1/in1 cp_buffered_0/tapered_buf_1/in2 0.37fF
C59 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF
C60 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
C61 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C62 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.06fF
C63 ro_complete_buffered_0/tapered_buf_4/in1 ro_complete_buffered_0/tapered_buf_4/in2 0.37fF
C64 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/and_0/B 0.29fF
C65 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF
C66 ro_divider_buffered_0/tapered_buf_8/in4 ro_divider_buffered_0/tapered_buf_8/in5 29.21fF
C67 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/Z1 0.36fF
C68 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.18fF
C69 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF
C70 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF
C71 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered1_0/pll_full_0/pd_0/R 0.21fF
C72 ro_complete_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_2/in5 0.84fF
C73 divider_buffered_0/tapered_buf_2/in1 gpio_analog[4] 0.19fF
C74 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C75 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C76 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF
C77 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF
C78 ro_divider_buffered_0/tapered_buf_2/in4 ro_divider_buffered_0/tapered_buf_2/in5 29.21fF
C79 filter_buffered_0/tapered_buf_1/in1 gpio_analog[17] 0.19fF
C80 cp_buffered_0/tapered_buf_0/in4 cp_buffered_0/tapered_buf_0/in5 29.21fF
C81 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C82 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C83 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
C84 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF
C85 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF
C86 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C87 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_divider_buffered_0/ro_complete_0/a3 0.09fF
C88 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/nor_1/B 0.22fF
C89 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.05fF
C90 gpio_noesd[8] pll_full_buffered2_0/pll_full_0/div 0.25fF
C91 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/Out 0.11fF
C92 divider_buffered_0/tapered_buf_2/in5 divider_buffered_0/tapered_buf_2/in3 2.89fF
C93 ro_complete_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_1/in5 29.21fF
C94 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
C95 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C96 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF
C97 ro_complete_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_2/in2 1.27fF
C98 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C99 pll_full_buffered2_0/tapered_buf_4/in5 pll_full_buffered2_0/tapered_buf_4/in3 2.89fF
C100 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
C101 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF
C102 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.07fF
C103 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.00fF
C104 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
C105 pll_full_buffered2_0/tapered_buf_3/in3 pll_full_buffered2_0/tapered_buf_3/in4 4.78fF
C106 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C107 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF
C108 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF
C109 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF
C110 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C111 ro_divider_buffered_0/tapered_buf_2/in1 ro_divider_buffered_0/tapered_buf_2/in5 0.22fF
C112 filter_buffered_0/tapered_buf_0/in2 filter_buffered_0/tapered_buf_0/in3 1.27fF
C113 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C114 pll_full_buffered1_0/pll_full_0/vco io_analog[10] 0.56fF
C115 ro_complete_buffered_0/tapered_buf_6/in3 ro_complete_buffered_0/tapered_buf_6/in4 4.78fF
C116 ro_complete_buffered_0/tapered_buf_6/in2 ro_complete_buffered_0/tapered_buf_6/in5 0.84fF
C117 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_2/Z2 0.20fF
C118 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF
C119 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF
C120 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF
C121 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.30fF
C122 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C123 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
C124 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF
C125 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C126 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 0.09fF
C127 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 0.09fF
C128 io_analog[6] ro_complete_buffered_0/tapered_buf_4/in1 0.19fF
C129 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF
C130 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C131 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C132 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/and_0/B 0.31fF
C133 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C134 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 0.03fF
C135 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C136 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C137 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF
C138 pll_full_buffered1_0/tapered_buf_1/in3 pll_full_buffered1_0/tapered_buf_1/in4 4.78fF
C139 pll_full_buffered1_0/tapered_buf_1/in2 pll_full_buffered1_0/tapered_buf_1/in5 0.84fF
C140 io_analog[6] io_clamp_high[2] 0.53fF
C141 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n5230# pll_full_buffered1_0/pll_full_0/vco 1.58fF
C142 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.16fF
C143 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C144 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF
C145 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF
C146 io_analog[6] ro_divider_buffered_0/ro_complete_0/a0 0.21fF
C147 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z3 0.06fF
C148 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/Out 0.44fF
C149 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C150 ro_divider_buffered_0/tapered_buf_3/in2 ro_divider_buffered_0/tapered_buf_3/in3 1.27fF
C151 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C152 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C153 io_analog[9] pll_full_buffered2_0/pll_full_0/cp_0/upbar 0.53fF
C154 io_analog[10] pll_full_buffered2_0/tapered_buf_0/in1 0.19fF
C155 ro_divider_buffered_0/tapered_buf_4/in5 ro_divider_buffered_0/ro_complete_0/a4 26.29fF
C156 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in5 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in1 0.22fF
C157 ro_divider_buffered_0/tapered_buf_0/in4 ro_divider_buffered_0/tapered_buf_0/in5 29.21fF
C158 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.04fF
C159 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF
C160 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C161 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out 0.05fF
C162 io_analog[4] ro_complete_buffered_0/ro_complete_0/a2 0.37fF
C163 pd_buffered_0/tapered_buf_1/in1 pd_buffered_0/tapered_buf_1/in2 0.37fF
C164 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 0.14fF
C165 gpio_noesd[8] gpio_noesd[12] 0.46fF
C166 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF
C167 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF
C168 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF
C169 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/nor_0/B 0.22fF
C170 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C171 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.65fF
C172 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C173 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/vco 0.15fF
C174 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF
C175 div_pd_buffered_0/tapered_buf_2/in1 div_pd_buffered_0/tapered_buf_2/in5 0.22fF
C176 ro_divider_buffered_0/tapered_buf_2/in2 ro_divider_buffered_0/tapered_buf_2/in1 0.37fF
C177 filter_buffered_0/tapered_buf_1/in2 filter_buffered_0/tapered_buf_1/in3 1.27fF
C178 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF
C179 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.00fF
C180 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C181 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C182 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.65fF
C183 io_analog[7] io_analog[9] 1.28fF
C184 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/out1 0.31fF
C185 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.33fF
C186 gpio_analog[9] gpio_noesd[8] 1.10fF
C187 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C188 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C189 pd_buffered_0/tapered_buf_0/in4 pd_buffered_0/tapered_buf_0/in5 29.21fF
C190 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
C191 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C192 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C193 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.11fF
C194 gpio_analog[8] gpio_noesd[14] 2.77fF
C195 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C196 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.38fF
C197 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
C198 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in1 pll_full_buffered1_0/pll_full_0/vco 0.19fF
C199 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C200 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C201 gpio_analog[3] ashish_0/a 0.27fF
C202 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C203 ro_divider_buffered_0/tapered_buf_1/in5 ro_divider_buffered_0/tapered_buf_1/in1 0.22fF
C204 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z3 0.06fF
C205 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Q 0.51fF
C206 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C207 pll_full_buffered2_0/pll_full_0/cp_0/vbias pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# 0.19fF
C208 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF
C209 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C210 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C211 div_pd_buffered_0/pd_0/DOWN gpio_noesd[12] 0.33fF
C212 div_pd_buffered_0/tapered_buf_1/in5 div_pd_buffered_0/tapered_buf_1/in3 2.89fF
C213 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF
C214 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF
C215 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C216 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF
C217 io_analog[6] gpio_analog[6] 0.64fF
C218 io_analog[7] ro_complete_buffered_0/ro_complete_0/a1 0.23fF
C219 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C220 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C221 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF
C222 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.22fF
C223 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
C224 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF
C225 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
C226 div_pd_buffered_0/tapered_buf_4/in1 div_pd_buffered_0/tapered_buf_4/in2 0.37fF
C227 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C228 pll_full_buffered2_0/tapered_buf_1/in3 pll_full_buffered2_0/tapered_buf_1/in5 2.89fF
C229 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z2 0.40fF
C230 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/Out 0.04fF
C231 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C232 ro_divider_buffered_0/tapered_buf_7/in2 ro_divider_buffered_0/tapered_buf_7/in3 1.27fF
C233 ro_complete_buffered_0/tapered_buf_3/in4 ro_complete_buffered_0/tapered_buf_3/in5 29.21fF
C234 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z3 0.06fF
C235 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Q 0.51fF
C236 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.11fF
C237 pll_full_buffered2_0/tapered_buf_2/in1 pll_full_buffered2_0/pll_full_0/div 0.19fF
C238 gpio_analog[6] ro_complete_buffered_0/tapered_buf_0/in1 0.19fF
C239 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C240 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.30fF
C241 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C242 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF
C243 div_pd_buffered_0/tapered_buf_0/in3 div_pd_buffered_0/tapered_buf_0/in2 1.27fF
C244 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF
C245 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF
C246 io_analog[3] ro_complete_buffered_0/tapered_buf_1/in1 0.19fF
C247 divider_buffered_0/tapered_buf_1/in3 divider_buffered_0/tapered_buf_1/in4 4.78fF
C248 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.23fF
C249 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C250 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF
C251 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF
C252 cp_buffered_0/tapered_buf_1/in2 cp_buffered_0/tapered_buf_1/in3 1.27fF
C253 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C254 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C255 gpio_analog[4] gpio_noesd[4] 0.91fF
C256 gpio_noesd[11] gpio_noesd[7] 0.79fF
C257 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/and_0/B 0.78fF
C258 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.40fF
C259 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/div 0.04fF
C260 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered2_0/pll_full_0/vco 0.29fF
C261 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF
C262 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C263 io_analog[3] io_analog[5] 0.93fF
C264 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/and_0/OUT 0.14fF
C265 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/clk 0.51fF
C266 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.01fF
C267 div_pd_buffered_0/tapered_buf_4/in2 div_pd_buffered_0/tapered_buf_4/in3 1.27fF
C268 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C269 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.11fF
C270 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.01fF
C271 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF
C272 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C273 io_clamp_low[1] io_clamp_high[1] 0.53fF
C274 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
C275 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF
C276 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 0.13fF
C277 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C278 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.04fF
C279 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C280 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered2_0/pll_full_0/vco 1.27fF
C281 gpio_noesd[8] io_analog[10] 3.39fF
C282 cp_buffered_0/tapered_buf_0/in5 cp_buffered_0/cp_0/down 26.29fF
C283 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/Z3 0.20fF
C284 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/REF 0.04fF
C285 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C286 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C287 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C288 ro_complete_buffered_0/tapered_buf_5/in1 ro_complete_buffered_0/tapered_buf_5/in2 0.37fF
C289 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/a3 0.13fF
C290 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z2 0.14fF
C291 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
C292 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C293 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF
C294 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF
C295 ro_divider_buffered_0/tapered_buf_5/in1 ro_divider_buffered_0/tapered_buf_5/in5 0.22fF
C296 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF
C297 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
C298 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/Out 0.15fF
C299 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
C300 io_analog[7] ro_complete_buffered_0/tapered_buf_3/in1 0.19fF
C301 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_0/Z3 0.05fF
C302 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C303 div_pd_buffered_0/tapered_buf_4/in3 div_pd_buffered_0/tapered_buf_4/in4 4.78fF
C304 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 0.00fF
C305 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 pll_full_buffered2_0/pll_full_0/div 0.04fF
C306 gpio_noesd[13] gpio_noesd[12] 0.45fF
C307 io_analog[5] ro_complete_buffered_0/ro_complete_0/a0 0.23fF
C308 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF
C309 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF
C310 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.18fF
C311 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF
C312 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
C313 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/div 0.19fF
C314 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in1 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in3 0.38fF
C315 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF
C316 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.47fF
C317 filter_buffered_0/tapered_buf_0/in3 filter_buffered_0/tapered_buf_0/in4 4.78fF
C318 filter_buffered_0/tapered_buf_0/in2 filter_buffered_0/tapered_buf_0/in5 0.84fF
C319 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.14fF
C320 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/vco 0.01fF
C321 gpio_noesd[4] divider_buffered_0/tapered_buf_1/in5 26.29fF
C322 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/nor_0/B 0.00fF
C323 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C324 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF
C325 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/clk 0.45fF
C326 gpio_noesd[7] io_analog[9] 1.42fF
C327 io_analog[3] ro_divider_buffered_0/ro_complete_0/a2 0.24fF
C328 ro_complete_buffered_0/tapered_buf_6/in4 ro_complete_buffered_0/tapered_buf_6/in5 29.21fF
C329 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/nor_0/B 0.22fF
C330 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C331 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF
C332 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF
C333 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C334 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/tapered_buf_3/in 0.03fF
C335 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C336 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF
C337 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF
C338 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF
C339 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C340 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C341 pll_full_buffered1_0/tapered_buf_1/in4 pll_full_buffered1_0/tapered_buf_1/in5 29.21fF
C342 pll_full_buffered2_0/tapered_buf_5/in3 pll_full_buffered2_0/tapered_buf_5/in4 4.78fF
C343 pll_full_buffered2_0/tapered_buf_5/in2 pll_full_buffered2_0/tapered_buf_5/in5 0.84fF
C344 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C345 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF
C346 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C347 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 0.31fF
C348 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.15fF
C349 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/tspc_0/Q 0.04fF
C350 ro_divider_buffered_0/tapered_buf_3/in3 ro_divider_buffered_0/tapered_buf_3/in4 4.78fF
C351 ro_divider_buffered_0/tapered_buf_3/in2 ro_divider_buffered_0/tapered_buf_3/in5 0.84fF
C352 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/div 0.01fF
C353 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C354 io_analog[7] ro_divider_buffered_0/ro_complete_0/a1 0.33fF
C355 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z4 0.00fF
C356 divider_buffered_0/tapered_buf_2/in5 divider_buffered_0/tapered_buf_2/in4 29.21fF
C357 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/out1 0.06fF
C358 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in5 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in3 3.73fF
C359 io_analog[9] divider_buffered_0/tapered_buf_0/in1 0.19fF
C360 pll_full_buffered2_0/tapered_buf_0/in1 pll_full_buffered2_0/tapered_buf_0/in2 0.37fF
C361 ro_divider_buffered_0/tapered_buf_0/in5 gpio_noesd[5] 26.29fF
C362 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C363 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C364 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C365 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
C366 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 0.16fF
C367 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C368 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C369 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z2 0.14fF
C370 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.35fF
C371 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C372 pd_buffered_0/tapered_buf_1/in2 pd_buffered_0/tapered_buf_1/in3 1.27fF
C373 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
C374 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C375 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C376 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C377 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C378 filter_buffered_0/tapered_buf_1/in2 filter_buffered_0/tapered_buf_1/in5 0.84fF
C379 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.78fF
C380 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF
C381 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/clk 0.01fF
C382 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.29fF
C383 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C384 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.65fF
C385 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C386 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C387 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF
C388 div_pd_buffered_0/tapered_buf_4/in1 div_pd_buffered_0/pd_0/DOWN 0.19fF
C389 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/Out 0.08fF
C390 gpio_analog[3] gpio_noesd[4] 1.38fF
C391 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.35fF
C392 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.06fF
C393 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.03fF
C394 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.03fF
C395 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.05fF
C396 pd_buffered_0/tapered_buf_0/in5 gpio_noesd[11] 26.29fF
C397 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C398 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF
C399 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C400 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF
C401 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
C402 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
C403 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF
C404 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C405 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C406 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/nor_1/A 0.04fF
C407 io_analog[6] ro_divider_buffered_0/tapered_buf_6/in1 0.19fF
C408 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.00fF
C409 ro_divider_buffered_0/ro_complete_0/cbank_2/v ro_divider_buffered_0/divider_0/clk 1.36fF
C410 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/nor_1/B 0.18fF
C411 div_pd_buffered_0/tapered_buf_2/in2 div_pd_buffered_0/tapered_buf_2/in3 1.27fF
C412 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.05fF
C413 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF
C414 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/R 0.61fF
C415 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C416 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/and_0/A 0.01fF
C417 divider_buffered_0/tapered_buf_2/in2 divider_buffered_0/tapered_buf_2/in1 0.37fF
C418 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C419 io_analog[10] gpio_noesd[13] 1.85fF
C420 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.14fF
C421 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.05fF
C422 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
C423 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF
C424 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.11fF
C425 io_analog[5] ro_divider_buffered_0/ro_complete_0/a0 0.31fF
C426 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
C427 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C428 ro_divider_buffered_0/tapered_buf_7/in3 ro_divider_buffered_0/tapered_buf_7/in4 4.78fF
C429 ro_divider_buffered_0/tapered_buf_7/in2 ro_divider_buffered_0/tapered_buf_7/in5 0.84fF
C430 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in5 io_analog[2] 26.29fF
C431 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z3 0.06fF
C432 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/Out 0.42fF
C433 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.43fF
C434 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/OUT 0.05fF
C435 div_pd_buffered_0/tapered_buf_1/in5 div_pd_buffered_0/tapered_buf_1/in1 0.22fF
C436 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF
C437 io_analog[3] ro_complete_buffered_0/ro_complete_0/a2 0.22fF
C438 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C439 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/A 0.16fF
C440 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF
C441 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C442 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF
C443 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF
C444 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF
C445 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.06fF
C446 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/div 0.27fF
C447 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C448 cp_buffered_0/tapered_buf_1/in3 cp_buffered_0/tapered_buf_1/in4 4.78fF
C449 cp_buffered_0/tapered_buf_1/in2 cp_buffered_0/tapered_buf_1/in5 0.84fF
C450 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF
C451 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.03fF
C452 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C453 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C454 io_analog[6] io_analog[9] 1.28fF
C455 ro_complete_buffered_0/tapered_buf_4/in2 ro_complete_buffered_0/tapered_buf_4/in3 1.27fF
C456 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C457 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF
C458 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_divider_buffered_0/divider_0/clk 1.30fF
C459 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/nor_1/A 0.23fF
C460 div_pd_buffered_0/tapered_buf_4/in2 div_pd_buffered_0/tapered_buf_4/in5 0.84fF
C461 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF
C462 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C463 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/UP 0.45fF
C464 div_pd_buffered_0/tapered_buf_1/in5 div_pd_buffered_0/tapered_buf_1/in4 29.21fF
C465 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
C466 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
C467 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C468 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C469 gpio_noesd[7] gpio_analog[10] 0.77fF
C470 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/clk 0.45fF
C471 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.51fF
C472 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.01fF
C473 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C474 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C475 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C476 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
C477 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C478 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.06fF
C479 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C480 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C481 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF
C482 gpio_noesd[9] gpio_noesd[7] 3.28fF
C483 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C484 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C485 ro_divider_buffered_0/tapered_buf_5/in3 ro_divider_buffered_0/tapered_buf_5/in5 2.89fF
C486 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.01fF
C487 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.05fF
C488 ro_complete_buffered_0/tapered_buf_5/in2 ro_complete_buffered_0/tapered_buf_5/in3 1.27fF
C489 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C490 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.11fF
C491 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C492 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C493 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/divider_0/clk 1.30fF
C494 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/REF 0.04fF
C495 div_pd_buffered_0/tapered_buf_4/in4 div_pd_buffered_0/tapered_buf_4/in5 29.21fF
C496 gpio_analog[3] gpio_analog[6] 1.30fF
C497 gpio_noesd[11] gpio_noesd[8] 0.55fF
C498 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C499 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C500 io_analog[5] gpio_analog[6] 0.64fF
C501 io_analog[6] ro_complete_buffered_0/ro_complete_0/a1 0.22fF
C502 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
C503 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.08fF
C504 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C505 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/div 0.51fF
C506 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in3 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in4 4.79fF
C507 gpio_noesd[14] gpio_noesd[12] 2.57fF
C508 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.20fF
C509 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF
C510 io_analog[5] ro_divider_buffered_0/ro_complete_0/a3 0.27fF
C511 divider_buffered_0/tapered_buf_1/in2 divider_buffered_0/tapered_buf_1/in5 0.84fF
C512 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C513 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/clk 0.12fF
C514 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C515 filter_buffered_0/tapered_buf_0/in4 filter_buffered_0/tapered_buf_0/in5 29.21fF
C516 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF
C517 gpio_analog[5] ro_divider_buffered_0/divider_0/Out 0.75fF
C518 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/nor_1/B 0.06fF
C519 ro_divider_buffered_0/tapered_buf_1/in1 ro_divider_buffered_0/tapered_buf_1/in2 0.37fF
C520 ro_divider_buffered_0/tapered_buf_1/in1 io_analog[9] 0.19fF
C521 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z2 0.14fF
C522 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C523 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF
C524 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/nor_0/B 0.06fF
C525 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
C526 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C527 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF
C528 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF
C529 io_analog[4] ro_complete_buffered_0/tapered_buf_6/in1 0.19fF
C530 io_analog[5] ro_complete_buffered_0/tapered_buf_5/in1 0.19fF
C531 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C532 gpio_analog[9] gpio_noesd[14] 2.63fF
C533 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C534 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C535 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF
C536 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C537 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 1.21fF
C538 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C539 div_pd_buffered_0/tapered_buf_3/in2 div_pd_buffered_0/tapered_buf_3/in3 1.27fF
C540 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C541 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C542 io_analog[3] io_analog[4] 0.88fF
C543 divider_buffered_0/divider_0/tspc_2/Z3 divider_buffered_0/divider_0/tspc_2/Z4 0.65fF
C544 ro_divider_buffered_0/tapered_buf_3/in4 ro_divider_buffered_0/tapered_buf_3/in5 29.21fF
C545 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z1 0.71fF
C546 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/A 0.16fF
C547 pll_full_buffered2_0/tapered_buf_0/in2 pll_full_buffered2_0/tapered_buf_0/in3 1.27fF
C548 ro_divider_buffered_0/tapered_buf_0/in5 ro_divider_buffered_0/tapered_buf_0/in1 0.22fF
C549 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in5 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in4 29.21fF
C550 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.30fF
C551 divider_buffered_0/tapered_buf_0/in1 divider_buffered_0/tapered_buf_0/in5 0.22fF
C552 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
C553 pll_full_buffered2_0/tapered_buf_5/in pll_full_buffered2_0/tapered_buf_5/in1 0.19fF
C554 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 0.33fF
C555 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C556 pd_buffered_0/tapered_buf_1/in3 pd_buffered_0/tapered_buf_1/in4 4.78fF
C557 pd_buffered_0/tapered_buf_1/in2 pd_buffered_0/tapered_buf_1/in5 0.84fF
C558 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C559 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C560 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/Z1 0.04fF
C561 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.14fF
C562 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/vco 0.51fF
C563 gpio_noesd[8] io_analog[9] 0.91fF
C564 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.36fF
C565 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.05fF
C566 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/ro_complete_0/a0 0.13fF
C567 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
C568 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C569 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF
C570 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/a3 3.17fF
C571 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C572 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
C573 div_pd_buffered_0/tapered_buf_2/in4 div_pd_buffered_0/tapered_buf_2/in3 4.78fF
C574 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF
C575 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C576 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 0.00fF
C577 io_analog[9] divider_buffered_0/divider_0/clk 0.40fF
C578 divider_buffered_0/tapered_buf_1/in1 divider_buffered_0/divider_0/Out 0.20fF
C579 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C580 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C581 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/div 0.12fF
C582 pll_full_buffered2_0/tapered_buf_4/in5 pll_full_buffered2_0/tapered_buf_4/out 26.29fF
C583 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF
C584 io_analog[4] ro_complete_buffered_0/ro_complete_0/a0 0.33fF
C585 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C586 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF
C587 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
C588 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/and_0/A 0.80fF
C589 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.08fF
C590 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
C591 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C592 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF
C593 pll_full_buffered2_0/tapered_buf_3/in1 pll_full_buffered2_0/tapered_buf_3/in5 0.22fF
C594 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.20fF
C595 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C596 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C597 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.65fF
C598 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C599 ro_divider_buffered_0/tapered_buf_6/in1 ro_divider_buffered_0/tapered_buf_6/in2 0.37fF
C600 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/tapered_buf_3/in 0.02fF
C601 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/R 0.30fF
C602 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in1 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.19fF
C603 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C604 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/clk 0.14fF
C605 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
C606 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 1.07fF
C607 div_pd_buffered_0/tapered_buf_0/in4 div_pd_buffered_0/tapered_buf_0/in5 29.21fF
C608 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF
C609 io_analog[5] io_clamp_high[1] 0.53fF
C610 pll_full_buffered2_0/tapered_buf_2/in3 pll_full_buffered2_0/tapered_buf_2/in2 1.27fF
C611 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF
C612 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.04fF
C613 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF
C614 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF
C615 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF
C616 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.31fF
C617 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C618 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
C619 gpio_noesd[14] io_analog[10] 2.21fF
C620 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.01fF
C621 io_analog[6] ro_divider_buffered_0/ro_complete_0/a1 0.20fF
C622 div_pd_buffered_0/tapered_buf_3/in3 div_pd_buffered_0/tapered_buf_3/in4 4.78fF
C623 div_pd_buffered_0/tapered_buf_3/in2 div_pd_buffered_0/tapered_buf_3/in5 0.84fF
C624 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C625 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C626 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/nor_0/B 0.15fF
C627 io_analog[7] io_analog[8] 1.38fF
C628 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.00fF
C629 ro_divider_buffered_0/tapered_buf_7/in4 ro_divider_buffered_0/tapered_buf_7/in5 29.21fF
C630 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF
C631 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C632 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C633 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 0.14fF
C634 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C635 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 0.09fF
C636 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/pd_0/R 0.21fF
C637 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C638 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF
C639 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C640 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF
C641 pll_full_buffered2_0/tapered_buf_3/in3 pll_full_buffered2_0/tapered_buf_3/in5 2.89fF
C642 cp_buffered_0/tapered_buf_1/in4 cp_buffered_0/tapered_buf_1/in5 29.21fF
C643 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/down 0.02fF
C644 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.38fF
C645 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 0.00fF
C646 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C647 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C648 pll_full_buffered1_0/tapered_buf_0/in1 pll_full_buffered1_0/tapered_buf_0/in5 0.22fF
C649 io_analog[10] div_pd_buffered_0/divider_0/mc2 0.64fF
C650 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C651 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.00fF
C652 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/a0 0.13fF
C653 gpio_noesd[10] io_analog[10] 1.21fF
C654 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z3 0.45fF
C655 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF
C656 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.05fF
C657 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 0.03fF
C658 gpio_noesd[5] gpio_analog[3] 0.96fF
C659 ro_complete_buffered_0/tapered_buf_4/in2 ro_complete_buffered_0/tapered_buf_4/in5 0.84fF
C660 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C661 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C662 div_pd_buffered_0/tapered_buf_2/in5 div_pd_buffered_0/tapered_buf_2/in2 0.84fF
C663 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in1 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in3 0.38fF
C664 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C665 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
C666 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF
C667 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF
C668 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C669 io_clamp_low[0] io_clamp_high[0] 0.53fF
C670 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C671 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
C672 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF
C673 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C674 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C675 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF
C676 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
C677 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
C678 gpio_analog[5] ro_divider_buffered_0/ro_complete_0/a0 0.47fF
C679 pll_full_buffered2_0/tapered_buf_2/in5 pll_full_buffered2_0/tapered_buf_2/in4 29.21fF
C680 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C681 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_buffered1_0/pll_full_0/vco 1.58fF
C682 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
C683 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
C684 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF
C685 ro_complete_buffered_0/tapered_buf_5/in3 ro_complete_buffered_0/tapered_buf_5/in4 4.78fF
C686 ro_complete_buffered_0/tapered_buf_5/in2 ro_complete_buffered_0/tapered_buf_5/in5 0.84fF
C687 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/clk 0.01fF
C688 ro_complete_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/in5 2.89fF
C689 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/mc2 0.04fF
C690 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/tapered_buf_3/in 5.03fF
C691 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF
C692 div_pd_buffered_0/tapered_buf_4/in5 gpio_noesd[13] 26.29fF
C693 divider_buffered_0/tapered_buf_2/in2 divider_buffered_0/tapered_buf_2/in3 1.27fF
C694 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C695 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF
C696 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF
C697 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C698 pd_buffered_0/tapered_buf_3/in3 pd_buffered_0/tapered_buf_3/in4 4.78fF
C699 pd_buffered_0/tapered_buf_3/in2 pd_buffered_0/tapered_buf_3/in5 0.84fF
C700 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in3 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in5 3.73fF
C701 io_analog[9] gpio_noesd[13] 2.15fF
C702 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v pll_full_buffered2_0/pll_full_0/vco 1.36fF
C703 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered1_0/pll_full_0/div 0.02fF
C704 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF
C705 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF
C706 io_analog[4] ro_divider_buffered_0/ro_complete_0/a0 0.22fF
C707 gpio_analog[5] ro_divider_buffered_0/divider_0/mc2 0.49fF
C708 filter_buffered_0/tapered_buf_0/in5 gpio_analog[17] 26.29fF
C709 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.65fF
C710 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C711 divider_buffered_0/tapered_buf_1/in4 divider_buffered_0/tapered_buf_1/in5 29.21fF
C712 divider_buffered_0/divider_0/prescaler_0/tspc_0/D divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C713 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C714 io_analog[9] pll_full_buffered2_0/tapered_buf_1/in1 0.19fF
C715 div_pd_buffered_0/tapered_buf_3/in4 div_pd_buffered_0/tapered_buf_3/in5 29.21fF
C716 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C717 gpio_noesd[8] gpio_analog[10] 0.48fF
C718 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF
C719 ro_complete_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_2/in5 29.21fF
C720 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.04fF
C721 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/clk 0.64fF
C722 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF
C723 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
C724 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C725 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.06fF
C726 gpio_noesd[9] gpio_noesd[8] 1.97fF
C727 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF
C728 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
C729 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C730 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF
C731 io_analog[0] gpio_analog[3] 3.87fF
C732 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.45fF
C733 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/div 0.65fF
C734 io_analog[5] io_analog[9] 1.28fF
C735 ro_complete_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_2/in3 4.78fF
C736 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z1 0.01fF
C737 pll_full_buffered2_0/tapered_buf_0/in3 pll_full_buffered2_0/tapered_buf_0/in4 4.78fF
C738 pll_full_buffered2_0/tapered_buf_0/in2 pll_full_buffered2_0/tapered_buf_0/in5 0.84fF
C739 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF
C740 pll_full_buffered2_0/tapered_buf_5/in1 pll_full_buffered2_0/tapered_buf_5/in2 0.37fF
C741 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# 0.04fF
C742 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF
C743 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF
C744 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z4 0.00fF
C745 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.14fF
C746 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C747 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C748 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/R 0.29fF
C749 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C750 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C751 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
C752 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF
C753 pd_buffered_0/tapered_buf_1/in4 pd_buffered_0/tapered_buf_1/in5 29.21fF
C754 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C755 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C756 div_pd_buffered_0/tapered_buf_0/in5 div_pd_buffered_0/tapered_buf_0/in1 0.22fF
C757 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF
C758 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C759 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF
C760 gpio_analog[5] ro_divider_buffered_0/ro_complete_0/a3 0.13fF
C761 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C762 filter_buffered_0/filter_0/v gpio_analog[17] 0.54fF
C763 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C764 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.36fF
C765 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/nor_1/B 0.01fF
C766 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C767 pll_full_buffered1_0/pll_full_0/div pll_full_buffered1_0/pll_full_0/vco 2.26fF
C768 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C769 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
C770 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/Z1 0.04fF
C771 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C772 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/divider_0/clk 0.05fF
C773 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C774 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/REF 0.12fF
C775 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.65fF
C776 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C777 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C778 io_analog[4] gpio_analog[6] 0.64fF
C779 io_analog[5] ro_complete_buffered_0/ro_complete_0/a1 0.22fF
C780 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C781 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C782 cp_buffered_0/tapered_buf_2/in4 cp_buffered_0/tapered_buf_2/in5 29.21fF
C783 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF
C784 io_analog[4] ro_divider_buffered_0/ro_complete_0/a3 0.23fF
C785 ro_complete_buffered_0/tapered_buf_3/in2 ro_complete_buffered_0/tapered_buf_3/in5 0.84fF
C786 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF
C787 gpio_analog[3] io_analog[1] 1.96fF
C788 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.55fF
C789 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF
C790 gpio_analog[8] io_analog[10] 1.48fF
C791 gpio_analog[5] ro_divider_buffered_0/ro_complete_0/a4 0.13fF
C792 pll_full_buffered2_0/tapered_buf_3/in1 pll_full_buffered2_0/tapered_buf_3/in 0.19fF
C793 ro_divider_buffered_0/tapered_buf_6/in2 ro_divider_buffered_0/tapered_buf_6/in3 1.27fF
C794 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C795 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF
C796 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF
C797 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF
C798 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF
C799 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C800 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF
C801 divider_buffered_0/tapered_buf_0/in3 divider_buffered_0/tapered_buf_0/in5 2.89fF
C802 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n5230# pll_full_buffered2_0/pll_full_0/vco 1.58fF
C803 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.16fF
C804 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C805 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C806 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C807 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF
C808 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF
C809 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF
C810 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C811 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C812 gpio_analog[3] ashish_0/b 0.27fF
C813 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 0.01fF
C814 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.22fF
C815 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/nor_1/A 0.03fF
C816 io_analog[4] ro_divider_buffered_0/ro_complete_0/a4 0.19fF
C817 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C818 div_pd_buffered_0/tapered_buf_2/in4 div_pd_buffered_0/tapered_buf_2/in5 29.21fF
C819 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.65fF
C820 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# 0.32fF
C821 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.04fF
C822 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.05fF
C823 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
C824 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
C825 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF
C826 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 0.14fF
C827 gpio_noesd[11] gpio_noesd[14] 2.58fF
C828 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C829 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/out1 0.31fF
C830 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
C831 pll_full_buffered1_0/tapered_buf_0/in3 pll_full_buffered1_0/tapered_buf_0/in5 2.89fF
C832 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.65fF
C833 cp_buffered_0/tapered_buf_1/in5 gpio_noesd[9] 26.29fF
C834 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C835 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.80fF
C836 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C837 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF
C838 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z4 0.12fF
C839 ro_complete_buffered_0/tapered_buf_4/in3 ro_complete_buffered_0/tapered_buf_4/in4 4.78fF
C840 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/A 0.01fF
C841 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z3 0.05fF
C842 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z1 0.03fF
C843 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.06fF
C844 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C845 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C846 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/divider_0/clk 1.30fF
C847 ro_divider_buffered_0/tapered_buf_4/in1 ro_divider_buffered_0/tapered_buf_4/in5 0.22fF
C848 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DIV 0.65fF
C849 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 1.07fF
C850 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.38fF
C851 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.12fF
C852 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 0.15fF
C853 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.33fF
C854 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF
C855 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF
C856 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF
C857 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF
C858 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C859 io_analog[3] ro_complete_buffered_0/ro_complete_0/a0 0.20fF
C860 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
C861 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.02fF
C862 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
C863 gpio_noesd[11] gpio_noesd[10] 6.19fF
C864 div_pd_buffered_0/tapered_buf_1/in4 div_pd_buffered_0/tapered_buf_1/in3 4.78fF
C865 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF
C866 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF
C867 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
C868 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF
C869 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C870 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
C871 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.08fF
C872 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C873 filter_buffered_0/tapered_buf_1/in3 filter_buffered_0/tapered_buf_1/in4 4.78fF
C874 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.12fF
C875 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C876 ro_complete_buffered_0/tapered_buf_5/in4 ro_complete_buffered_0/tapered_buf_5/in5 29.21fF
C877 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.21fF
C878 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF
C879 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF
C880 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C881 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C882 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.36fF
C883 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z3 0.45fF
C884 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
C885 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF
C886 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C887 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C888 divider_buffered_0/tapered_buf_0/in3 divider_buffered_0/tapered_buf_0/in4 4.78fF
C889 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF
C890 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Z4 0.65fF
C891 divider_buffered_0/divider_0/tspc_0/Z1 divider_buffered_0/divider_0/tspc_0/Z4 0.00fF
C892 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C893 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/clk 0.01fF
C894 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C895 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C896 cp_buffered_0/tapered_buf_2/in5 cp_buffered_0/cp_0/upbar 26.29fF
C897 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C898 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/UP 0.61fF
C899 pd_buffered_0/tapered_buf_0/in1 pd_buffered_0/pd_0/DOWN 0.19fF
C900 gpio_noesd[14] io_analog[9] 3.54fF
C901 io_analog[5] ro_divider_buffered_0/ro_complete_0/a1 0.30fF
C902 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C903 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C904 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C905 io_analog[6] io_analog[8] 1.24fF
C906 pll_full_buffered2_0/tapered_buf_1/in1 pll_full_buffered2_0/tapered_buf_1/in2 0.37fF
C907 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/and_0/B 0.18fF
C908 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C909 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/R 0.01fF
C910 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
C911 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.05fF
C912 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF
C913 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF
C914 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF
C915 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C916 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/in1 0.19fF
C917 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF
C918 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C919 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C920 filter_buffered_0/filter_0/v filter_buffered_0/filter_0/a_4216_n2998# 0.31fF
C921 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.01fF
C922 gpio_noesd[10] io_analog[9] 3.45fF
C923 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF
C924 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF
C925 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/div 0.03fF
C926 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/vco 0.06fF
C927 pll_full_buffered2_0/tapered_buf_0/in4 pll_full_buffered2_0/tapered_buf_0/in5 29.21fF
C928 ro_divider_buffered_0/tapered_buf_0/in5 ro_divider_buffered_0/tapered_buf_0/in3 2.89fF
C929 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/B 0.18fF
C930 ro_divider_buffered_0/tapered_buf_8/in1 ro_divider_buffered_0/tapered_buf_8/in5 0.22fF
C931 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C932 divider_buffered_0/divider_0/tspc_0/Z1 divider_buffered_0/divider_0/tspc_0/Z3 0.06fF
C933 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.16fF
C934 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 0.13fF
C935 pll_full_buffered2_0/tapered_buf_5/in2 pll_full_buffered2_0/tapered_buf_5/in3 1.27fF
C936 pd_buffered_0/tapered_buf_2/in1 pd_buffered_0/pd_0/UP 0.19fF
C937 io_analog[4] ro_complete_buffered_0/ro_complete_0/a4 0.20fF
C938 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C939 divider_buffered_0/tapered_buf_0/in2 divider_buffered_0/tapered_buf_0/in5 0.84fF
C940 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C941 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C942 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.14fF
C943 gpio_analog[8] cp_buffered_0/cp_0/down 0.25fF
C944 cp_buffered_0/tapered_buf_0/in1 cp_buffered_0/tapered_buf_0/in5 0.22fF
C945 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/vco 0.64fF
C946 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C947 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/a1 3.18fF
C948 ro_divider_buffered_0/tapered_buf_1/in3 ro_divider_buffered_0/tapered_buf_1/in5 2.89fF
C949 io_analog[5] ro_divider_buffered_0/tapered_buf_5/in1 0.19fF
C950 div_pd_buffered_0/tapered_buf_3/in5 div_pd_buffered_0/tapered_buf_3/in1 0.22fF
C951 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF
C952 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
C953 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C954 ro_complete_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_3/in4 4.78fF
C955 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.18fF
C956 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF
C957 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
C958 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/div 0.19fF
C959 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
C960 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C961 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C962 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 0.12fF
C963 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/UP 0.21fF
C964 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF
C965 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF
C966 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
C967 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF
C968 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.14fF
C969 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/vco 0.01fF
C970 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
C971 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.01fF
C972 io_analog[3] ro_divider_buffered_0/ro_complete_0/a0 0.22fF
C973 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.04fF
C974 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/and_0/B 0.08fF
C975 ro_divider_buffered_0/tapered_buf_6/in3 ro_divider_buffered_0/tapered_buf_6/in4 4.78fF
C976 ro_divider_buffered_0/tapered_buf_6/in2 ro_divider_buffered_0/tapered_buf_6/in5 0.84fF
C977 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in5 26.29fF
C978 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/Out 0.05fF
C979 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered2_0/pll_full_0/pd_0/R 0.21fF
C980 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF
C981 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF
C982 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C983 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF
C984 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF
C985 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF
C986 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF
C987 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF
C988 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C989 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C990 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.21fF
C991 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF
C992 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF
C993 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/div 0.01fF
C994 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C995 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.45fF
C996 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.04fF
C997 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.26fF
C998 pll_full_buffered1_0/tapered_buf_1/in1 io_analog[10] 0.19fF
C999 io_analog[4] io_analog[9] 1.28fF
C1000 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z3 0.05fF
C1001 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z1 0.03fF
C1002 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C1003 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/Out 1.14fF
C1004 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/nor_1/A 0.55fF
C1005 gpio_analog[10] div_pd_buffered_0/tapered_buf_3/in1 0.19fF
C1006 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.07fF
C1007 io_analog[10] pll_full_buffered2_0/pll_full_0/div 0.47fF
C1008 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_1/Z4 0.02fF
C1009 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C1010 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C1011 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C1012 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1013 div_pd_buffered_0/tapered_buf_0/in3 div_pd_buffered_0/tapered_buf_0/in4 4.78fF
C1014 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.78fF
C1015 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF
C1016 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF
C1017 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C1018 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF
C1019 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF
C1020 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C1021 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C1022 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C1023 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
C1024 pll_full_buffered1_0/tapered_buf_1/in5 pll_full_buffered1_0/pll_full_0/ref 26.29fF
C1025 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.02fF
C1026 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1027 ro_complete_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_2/in5 0.22fF
C1028 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
C1029 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.03fF
C1030 ro_divider_buffered_0/tapered_buf_4/in3 ro_divider_buffered_0/tapered_buf_4/in5 2.89fF
C1031 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.16fF
C1032 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.22fF
C1033 ro_complete_buffered_0/tapered_buf_4/in4 ro_complete_buffered_0/tapered_buf_4/in5 29.21fF
C1034 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/OUT 0.05fF
C1035 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z2 1.07fF
C1036 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z3 0.38fF
C1037 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z4 0.12fF
C1038 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C1039 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_divider_buffered_0/divider_0/clk 1.43fF
C1040 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in3 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in4 4.79fF
C1041 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C1042 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C1043 gpio_noesd[14] gpio_analog[10] 2.60fF
C1044 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C1045 io_analog[3] gpio_analog[6] 0.53fF
C1046 io_analog[4] ro_complete_buffered_0/ro_complete_0/a1 0.32fF
C1047 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF
C1048 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C1049 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 0.05fF
C1050 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/R 0.27fF
C1051 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
C1052 pll_full_buffered1_0/pll_full_0/cp_0/upbar pll_full_buffered1_0/pll_full_0/pd_0/UP 0.05fF
C1053 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C1054 cp_buffered_0/tapered_buf_2/in1 cp_buffered_0/tapered_buf_2/in5 0.22fF
C1055 pd_buffered_0/tapered_buf_0/in1 pd_buffered_0/tapered_buf_0/in5 0.22fF
C1056 gpio_noesd[9] gpio_noesd[14] 2.58fF
C1057 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF
C1058 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF
C1059 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
C1060 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
C1061 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
C1062 io_analog[3] ro_divider_buffered_0/ro_complete_0/a3 0.23fF
C1063 ro_divider_buffered_0/tapered_buf_3/in5 ro_divider_buffered_0/ro_complete_0/a5 26.29fF
C1064 filter_buffered_0/tapered_buf_1/in4 filter_buffered_0/tapered_buf_1/in5 29.21fF
C1065 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.21fF
C1066 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1067 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C1068 gpio_analog[8] io_analog[9] 1.10fF
C1069 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF
C1070 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z3 0.05fF
C1071 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z1 0.03fF
C1072 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C1073 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/tapered_buf_3/in 0.32fF
C1074 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C1075 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C1076 gpio_noesd[10] gpio_analog[10] 1.36fF
C1077 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF
C1078 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF
C1079 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in5 gpio_noesd[14] 26.29fF
C1080 io_analog[4] io_clamp_high[0] 0.53fF
C1081 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF
C1082 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF
C1083 gpio_noesd[8] pll_full_buffered2_0/tapered_buf_3/in 0.23fF
C1084 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.45fF
C1085 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C1086 io_analog[10] gpio_noesd[12] 1.57fF
C1087 io_analog[3] ro_divider_buffered_0/ro_complete_0/a4 0.19fF
C1088 pll_full_buffered2_0/tapered_buf_1/in2 pll_full_buffered2_0/tapered_buf_1/in3 1.27fF
C1089 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C1090 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/and_0/B 0.31fF
C1091 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C1092 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.11fF
C1093 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C1094 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C1095 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF
C1096 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF
C1097 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF
C1098 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
C1099 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C1100 gpio_analog[7] gpio_noesd[14] 2.55fF
C1101 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/out1 0.06fF
C1102 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF
C1103 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.03fF
C1104 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C1105 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C1106 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF
C1107 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF
C1108 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF
C1109 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF
C1110 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF
C1111 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF
C1112 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C1113 gpio_analog[9] io_analog[10] 1.15fF
C1114 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF
C1115 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered1_0/pll_full_0/vco 0.26fF
C1116 ro_divider_buffered_0/tapered_buf_8/in3 ro_divider_buffered_0/tapered_buf_8/in5 2.89fF
C1117 ro_divider_buffered_0/tapered_buf_6/in5 ro_divider_buffered_0/ro_complete_0/a2 26.29fF
C1118 ro_divider_buffered_0/tapered_buf_0/in1 ro_divider_buffered_0/tapered_buf_0/in2 0.37fF
C1119 ro_divider_buffered_0/divider_0/and_0/A ro_divider_buffered_0/divider_0/and_0/B 0.18fF
C1120 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/UP 0.45fF
C1121 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF
C1122 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C1123 gpio_analog[7] cp_buffered_0/tapered_buf_2/in1 0.19fF
C1124 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C1125 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1126 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.06fF
C1127 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C1128 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C1129 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF
C1130 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF
C1131 pd_buffered_0/tapered_buf_3/in5 pd_buffered_0/tapered_buf_3/in1 0.22fF
C1132 gpio_analog[5] ro_divider_buffered_0/ro_complete_0/a1 1.84fF
C1133 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.01fF
C1134 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.05fF
C1135 ro_divider_buffered_0/tapered_buf_2/in3 ro_divider_buffered_0/tapered_buf_2/in5 2.89fF
C1136 cp_buffered_0/tapered_buf_0/in3 cp_buffered_0/tapered_buf_0/in5 2.89fF
C1137 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.45fF
C1138 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C1139 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_divider_buffered_0/divider_0/clk 1.30fF
C1140 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C1141 ro_divider_buffered_0/tapered_buf_5/in1 ro_divider_buffered_0/tapered_buf_5/in2 0.37fF
C1142 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z1 0.03fF
C1143 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
C1144 ro_complete_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_1/in5 2.89fF
C1145 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C1146 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/REF 0.19fF
C1147 pll_full_buffered2_0/tapered_buf_4/in5 pll_full_buffered2_0/tapered_buf_4/in2 0.84fF
C1148 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF
C1149 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C1150 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
C1151 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.08fF
C1152 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C1153 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/div 0.51fF
C1154 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF
C1155 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C1156 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF
C1157 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF
C1158 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF
C1159 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
C1160 io_analog[4] ro_divider_buffered_0/ro_complete_0/a1 0.21fF
C1161 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C1162 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/tapered_buf_1/in5 26.29fF
C1163 io_analog[6] io_analog[7] 1.12fF
C1164 io_analog[5] io_analog[8] 1.24fF
C1165 ro_divider_buffered_0/tapered_buf_6/in4 ro_divider_buffered_0/tapered_buf_6/in5 29.21fF
C1166 ro_complete_buffered_0/tapered_buf_6/in1 ro_complete_buffered_0/tapered_buf_6/in5 0.22fF
C1167 ro_complete_buffered_0/tapered_buf_4/in5 ro_complete_buffered_0/ro_complete_0/a2 26.29fF
C1168 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C1169 ro_complete_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/in1 0.22fF
C1170 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.05fF
C1171 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C1172 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C1173 div_pd_buffered_0/tapered_buf_0/in2 div_pd_buffered_0/tapered_buf_0/in1 0.37fF
C1174 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF
C1175 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1176 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C1177 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C1178 ro_complete_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_2/in1 0.37fF
C1179 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/and_0/A 0.26fF
C1180 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C1181 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
C1182 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF
C1183 io_analog[6] io_clamp_low[2] 0.53fF
C1184 ro_divider_buffered_0/tapered_buf_2/in2 ro_divider_buffered_0/tapered_buf_2/in3 1.27fF
C1185 pd_buffered_0/tapered_buf_2/in4 pd_buffered_0/tapered_buf_2/in3 4.78fF
C1186 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.06fF
C1187 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.11fF
C1188 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1189 pll_full_buffered1_0/tapered_buf_1/in1 pll_full_buffered1_0/tapered_buf_1/in5 0.22fF
C1190 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF
C1191 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z2 1.07fF
C1192 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z3 0.38fF
C1193 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z4 0.12fF
C1194 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C1195 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C1196 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.15fF
C1197 ro_complete_buffered_0/tapered_buf_3/in5 ro_complete_buffered_0/ro_complete_0/a1 26.29fF
C1198 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/and_0/B 0.29fF
C1199 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.33fF
C1200 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF
C1201 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C1202 io_analog[3] ro_complete_buffered_0/ro_complete_0/a4 0.17fF
C1203 pd_buffered_0/tapered_buf_2/in1 pd_buffered_0/tapered_buf_2/in2 0.37fF
C1204 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF
C1205 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C1206 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C1207 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF
C1208 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C1209 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.36fF
C1210 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.05fF
C1211 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF
C1212 gpio_noesd[9] gpio_analog[8] 2.46fF
C1213 cp_buffered_0/cp_0/out cp_buffered_0/cp_0/down 0.79fF
C1214 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/Z2 0.14fF
C1215 io_analog[0] ashish_0/a 4.11fF
C1216 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF
C1217 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
C1218 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/Z1 0.36fF
C1219 ro_divider_buffered_0/divider_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/tspc_0/Z3 0.16fF
C1220 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z4 0.21fF
C1221 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C1222 ro_divider_buffered_0/tapered_buf_8/in5 ro_divider_buffered_0/ro_complete_0/a0 26.29fF
C1223 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.36fF
C1224 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/div 0.05fF
C1225 io_analog[8] ro_complete_buffered_0/tapered_buf_2/in1 0.19fF
C1226 divider_buffered_0/tapered_buf_1/in1 divider_buffered_0/tapered_buf_1/in5 0.22fF
C1227 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
C1228 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C1229 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF
C1230 filter_buffered_0/filter_0/a_4216_n5230# filter_buffered_0/filter_0/v 0.19fF
C1231 cp_buffered_0/tapered_buf_2/in3 cp_buffered_0/tapered_buf_2/in5 2.89fF
C1232 pd_buffered_0/tapered_buf_0/in3 pd_buffered_0/tapered_buf_0/in5 2.89fF
C1233 pd_buffered_0/tapered_buf_2/in5 pd_buffered_0/tapered_buf_2/in4 29.21fF
C1234 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
C1235 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C1236 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/R 0.36fF
C1237 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
C1238 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF
C1239 gpio_noesd[8] pll_full_buffered2_0/pll_full_0/cp_0/upbar 0.21fF
C1240 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C1241 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C1242 ro_divider_buffered_0/tapered_buf_1/in3 ro_divider_buffered_0/tapered_buf_1/in2 1.27fF
C1243 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z2 1.07fF
C1244 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z3 0.38fF
C1245 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z4 0.12fF
C1246 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C1247 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF
C1248 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C1249 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C1250 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/a4 0.12fF
C1251 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C1252 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
C1253 div_pd_buffered_0/tapered_buf_1/in5 div_pd_buffered_0/pd_0/REF 26.29fF
C1254 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF
C1255 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C1256 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.04fF
C1257 pll_full_buffered2_0/tapered_buf_2/in5 pll_full_buffered2_0/tapered_buf_2/in3 2.89fF
C1258 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF
C1259 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C1260 ro_complete_buffered_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_3/in5 0.22fF
C1261 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C1262 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.01fF
C1263 ashish_0/a io_analog[1] 8.93fF
C1264 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.02fF
C1265 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1266 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/vco 0.45fF
C1267 io_analog[3] io_analog[9] 1.00fF
C1268 ro_divider_buffered_0/divider_0/Out io_analog[9] 1.19fF
C1269 pll_full_buffered2_0/tapered_buf_1/in3 pll_full_buffered2_0/tapered_buf_1/in4 4.78fF
C1270 pll_full_buffered2_0/tapered_buf_1/in2 pll_full_buffered2_0/tapered_buf_1/in5 0.84fF
C1271 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/tspc_2/Z3 0.05fF
C1272 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z1 0.03fF
C1273 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/clk 0.04fF
C1274 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.05fF
C1275 ro_complete_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_3/in5 2.89fF
C1276 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z2 1.07fF
C1277 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z3 0.38fF
C1278 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.03fF
C1279 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/pd_0/R 0.21fF
C1280 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.03fF
C1281 io_analog[9] pll_full_buffered2_0/pll_full_0/div 0.68fF
C1282 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1283 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF
C1284 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF
C1285 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.38fF
C1286 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 0.00fF
C1287 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C1288 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C1289 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C1290 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF
C1291 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF
C1292 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C1293 pll_full_buffered1_0/tapered_buf_0/in pll_full_buffered1_0/tapered_buf_0/in1 0.19fF
C1294 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.05fF
C1295 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 0.03fF
C1296 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C1297 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF
C1298 ashish_0/a ashish_0/b 7.45fF
C1299 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/clk 0.64fF
C1300 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C1301 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF
C1302 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
C1303 io_analog[3] ro_complete_buffered_0/ro_complete_0/a1 0.17fF
C1304 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF
C1305 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C1306 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_buffered2_0/pll_full_0/vco 1.58fF
C1307 cp_buffered_0/tapered_buf_2/in1 cp_buffered_0/tapered_buf_2/in2 0.37fF
C1308 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/R 0.03fF
C1309 div_pd_buffered_0/tapered_buf_0/in5 gpio_noesd[12] 26.29fF
C1310 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
C1311 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C1312 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/REF 0.02fF
C1313 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/clk 0.11fF
C1314 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C1315 ro_divider_buffered_0/tapered_buf_5/in2 ro_divider_buffered_0/tapered_buf_5/in3 1.27fF
C1316 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/a3 2.04fF
C1317 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_1/Z4 0.02fF
C1318 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z1 0.01fF
C1319 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF
C1320 div_pd_buffered_0/tapered_buf_2/in5 div_pd_buffered_0/tapered_buf_2/in3 2.89fF
C1321 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF
C1322 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
C1323 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C1324 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/clk 0.11fF
C1325 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered2_0/pll_full_0/div 0.02fF
C1326 pll_full_buffered2_0/tapered_buf_4/in5 pll_full_buffered2_0/tapered_buf_4/in4 29.21fF
C1327 div_pd_buffered_0/tapered_buf_1/in5 div_pd_buffered_0/tapered_buf_1/in2 0.84fF
C1328 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C1329 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.65fF
C1330 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C1331 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered1_0/pll_full_0/div 0.17fF
C1332 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.03fF
C1333 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF
C1334 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C1335 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF
C1336 pll_full_buffered2_0/tapered_buf_3/in5 pll_full_buffered2_0/tapered_buf_3/out 26.29fF
C1337 filter_buffered_0/tapered_buf_0/in1 filter_buffered_0/tapered_buf_0/in5 0.22fF
C1338 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.01fF
C1339 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C1340 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF
C1341 io_analog[9] gpio_noesd[12] 1.79fF
C1342 ro_complete_buffered_0/tapered_buf_6/in3 ro_complete_buffered_0/tapered_buf_6/in5 2.89fF
C1343 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF
C1344 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C1345 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C1346 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
C1347 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF
C1348 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z4 0.15fF
C1349 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/nor_0/B 0.15fF
C1350 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.45fF
C1351 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 0.12fF
C1352 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C1353 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF
C1354 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
C1355 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C1356 pll_full_buffered1_0/tapered_buf_1/in3 pll_full_buffered1_0/tapered_buf_1/in5 2.89fF
C1357 pll_full_buffered2_0/tapered_buf_5/in gpio_noesd[7] 0.54fF
C1358 pll_full_buffered2_0/tapered_buf_5/in1 pll_full_buffered2_0/tapered_buf_5/in5 0.22fF
C1359 pll_full_buffered2_0/tapered_buf_2/in1 pll_full_buffered2_0/tapered_buf_2/in2 0.37fF
C1360 ro_divider_buffered_0/tapered_buf_2/in3 ro_divider_buffered_0/tapered_buf_2/in4 4.78fF
C1361 gpio_analog[9] io_analog[9] 0.93fF
C1362 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF
C1363 ro_divider_buffered_0/tapered_buf_3/in1 ro_divider_buffered_0/tapered_buf_3/in5 0.22fF
C1364 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/vco 0.45fF
C1365 divider_buffered_0/divider_0/tspc_2/Z2 divider_buffered_0/divider_0/tspc_2/Z3 0.16fF
C1366 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z4 0.22fF
C1367 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1368 ro_divider_buffered_0/divider_0/Out ro_divider_buffered_0/tapered_buf_0/in1 0.19fF
C1369 io_analog[9] div_pd_buffered_0/tapered_buf_2/in1 0.19fF
C1370 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C1371 pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# 0.04fF
C1372 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 0.06fF
C1373 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C1374 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1375 divider_buffered_0/tapered_buf_1/in3 divider_buffered_0/tapered_buf_1/in5 2.89fF
C1376 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z1 0.01fF
C1377 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/B 0.01fF
C1378 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C1379 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.36fF
C1380 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
C1381 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C1382 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1383 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF
C1384 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C1385 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C1386 pd_buffered_0/tapered_buf_3/in2 pd_buffered_0/tapered_buf_3/in1 0.37fF
C1387 gpio_analog[5] ro_divider_buffered_0/ro_complete_0/a5 0.13fF
C1388 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C1389 pll_full_buffered2_0/pll_full_0/div pll_full_buffered2_0/pll_full_0/vco 2.26fF
C1390 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_0/in1 0.19fF
C1391 filter_buffered_0/tapered_buf_1/in1 filter_buffered_0/tapered_buf_1/in5 0.22fF
C1392 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C1393 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/vco 0.01fF
C1394 gpio_noesd[11] io_analog[10] 1.30fF
C1395 ro_divider_buffered_0/divider_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.36fF
C1396 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Q 0.05fF
C1397 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C1398 divider_buffered_0/divider_0/and_0/A divider_buffered_0/divider_0/and_0/B 0.18fF
C1399 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1400 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/divider_0/clk 0.05fF
C1401 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/nor_1/B 1.21fF
C1402 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C1403 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/Z3 0.16fF
C1404 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1405 divider_buffered_0/divider_0/mc2 divider_buffered_0/tapered_buf_0/in5 26.29fF
C1406 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1407 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.20fF
C1408 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.55fF
C1409 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF
C1410 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A 0.15fF
C1411 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 0.09fF
C1412 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
C1413 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
C1414 io_analog[3] ro_divider_buffered_0/ro_complete_0/a1 0.19fF
C1415 gpio_analog[5] ro_divider_buffered_0/tapered_buf_2/in1 0.19fF
C1416 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C1417 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C1418 io_analog[5] io_analog[7] 1.11fF
C1419 io_analog[4] io_analog[8] 1.24fF
C1420 ro_divider_buffered_0/tapered_buf_1/in5 ro_divider_buffered_0/tapered_buf_1/in2 0.84fF
C1421 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/tspc_1/Z3 0.16fF
C1422 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z4 0.21fF
C1423 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.07fF
C1424 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C1425 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/mc2 0.06fF
C1426 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z1 1.07fF
C1427 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C1428 divider_buffered_0/tapered_buf_2/in5 divider_buffered_0/divider_0/clk 26.29fF
C1429 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C1430 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_2/Z4 0.02fF
C1431 pd_buffered_0/tapered_buf_3/in4 pd_buffered_0/tapered_buf_3/in5 29.21fF
C1432 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/tspc_0/Z4 0.65fF
C1433 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C1434 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 0.01fF
C1435 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.22fF
C1436 pd_buffered_0/tapered_buf_1/in5 pd_buffered_0/pd_0/DIV 26.29fF
C1437 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.03fF
C1438 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C1439 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.06fF
C1440 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF
C1441 io_analog[9] io_analog[10] 1065.06fF
C1442 pll_full_buffered2_0/tapered_buf_1/in4 pll_full_buffered2_0/tapered_buf_1/in5 29.21fF
C1443 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z2 1.07fF
C1444 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z3 0.38fF
C1445 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/tspc_2/Z4 0.12fF
C1446 ro_divider_buffered_0/tapered_buf_7/in1 ro_divider_buffered_0/tapered_buf_7/in5 0.22fF
C1447 ro_complete_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_1/in3 1.27fF
C1448 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_divider_buffered_0/divider_0/clk 0.26fF
C1449 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
C1450 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
C1451 pd_buffered_0/tapered_buf_2/in1 pd_buffered_0/tapered_buf_2/in5 0.22fF
C1452 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 0.13fF
C1453 ro_complete_buffered_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_3/in2 0.37fF
C1454 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C1455 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.80fF
C1456 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C1457 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF
C1458 pll_full_buffered2_0/tapered_buf_2/in5 pll_full_buffered2_0/tapered_buf_2/in2 0.84fF
C1459 pll_full_buffered1_0/tapered_buf_0/in1 pll_full_buffered1_0/tapered_buf_0/in2 0.37fF
C1460 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1461 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 1.07fF
C1462 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.38fF
C1463 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.12fF
C1464 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C1465 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C1466 cp_buffered_0/tapered_buf_1/in1 cp_buffered_0/tapered_buf_1/in5 0.22fF
C1467 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
C1468 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C1469 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C1470 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/nor_1/A 0.15fF
C1471 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/divider_0/clk 0.05fF
C1472 io_analog[4] ro_divider_buffered_0/tapered_buf_4/in1 0.19fF
C1473 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.35fF
C1474 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/vco 0.60fF
C1475 ro_complete_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_3/in2 1.27fF
C1476 ro_divider_buffered_0/tapered_buf_0/in2 ro_divider_buffered_0/tapered_buf_0/in3 1.27fF
C1477 ro_divider_buffered_0/divider_0/and_0/B ro_divider_buffered_0/divider_0/and_0/Z1 0.07fF
C1478 div_pd_buffered_0/tapered_buf_4/in1 div_pd_buffered_0/tapered_buf_4/in5 0.22fF
C1479 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF
C1480 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C1481 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/tspc_0/Z4 0.12fF
C1482 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
C1483 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1484 divider_buffered_0/tapered_buf_2/in4 divider_buffered_0/tapered_buf_2/in3 4.78fF
C1485 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF
C1486 cp_buffered_0/tapered_buf_2/in2 cp_buffered_0/tapered_buf_2/in3 1.27fF
C1487 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1488 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/clk 0.11fF
C1489 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C1490 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.12fF
C1491 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C1492 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_0/Z3 0.11fF
C1493 div_pd_buffered_0/tapered_buf_2/in1 div_pd_buffered_0/tapered_buf_2/in2 0.37fF
C1494 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.36fF
C1495 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C1496 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF
C1497 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 1.07fF
C1498 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C1499 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z3 0.45fF
C1500 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C1501 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1502 ro_divider_buffered_0/tapered_buf_5/in3 ro_divider_buffered_0/tapered_buf_5/in4 4.78fF
C1503 ro_divider_buffered_0/tapered_buf_5/in2 ro_divider_buffered_0/tapered_buf_5/in5 0.84fF
C1504 pd_buffered_0/tapered_buf_3/in1 io_analog[10] 0.19fF
C1505 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
C1506 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
C1507 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF
C1508 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/divider_0/clk 0.05fF
C1509 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C1510 ro_complete_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/in3 1.27fF
C1511 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1512 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/REF 0.02fF
C1513 div_pd_buffered_0/tapered_buf_4/in3 div_pd_buffered_0/tapered_buf_4/in5 2.89fF
C1514 pll_full_buffered2_0/tapered_buf_4/in pll_full_buffered2_0/tapered_buf_4/in1 0.19fF
C1515 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 0.36fF
C1516 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C1517 gpio_analog[9] gpio_noesd[9] 1.46fF
C1518 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF
C1519 pd_buffered_0/tapered_buf_2/in2 pd_buffered_0/tapered_buf_2/in3 1.27fF
C1520 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C1521 gpio_noesd[7] gpio_noesd[13] 0.80fF
C1522 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C1523 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF
C1524 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C1525 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C1526 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1527 filter_buffered_0/tapered_buf_0/in3 filter_buffered_0/tapered_buf_0/in5 2.89fF
C1528 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.45fF
C1529 ro_complete_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/ro_complete_0/a0 26.29fF
C1530 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_2/Z4 0.02fF
C1531 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z1 0.01fF
C1532 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_1/Z2 0.15fF
C1533 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/tspc_0/Z3 0.05fF
C1534 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
C1535 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/tapered_buf_3/in 0.11fF
C1536 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 0.10fF
C1537 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF
C1538 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C1539 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF
C1540 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF
C1541 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF
C1542 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C1543 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1544 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C1545 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.19fF
C1546 pll_full_buffered2_0/tapered_buf_5/in3 pll_full_buffered2_0/tapered_buf_5/in5 2.89fF
C1547 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.06fF
C1548 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF
C1549 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/div 0.03fF
C1550 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/vco 0.06fF
C1551 ro_divider_buffered_0/tapered_buf_3/in3 ro_divider_buffered_0/tapered_buf_3/in5 2.89fF
C1552 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.16fF
C1553 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF
C1554 divider_buffered_0/divider_0/tspc_2/Z2 divider_buffered_0/divider_0/tspc_2/Z4 0.36fF
C1555 divider_buffered_0/divider_0/tspc_2/Z3 divider_buffered_0/divider_0/Out 0.05fF
C1556 ro_complete_buffered_0/tapered_buf_6/in5 ro_complete_buffered_0/ro_complete_0/a4 26.29fF
C1557 ro_complete_buffered_0/tapered_buf_5/in5 ro_complete_buffered_0/ro_complete_0/a3 26.29fF
C1558 io_analog[8] ro_divider_buffered_0/tapered_buf_8/in1 0.19fF
C1559 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_1/Z1 0.06fF
C1560 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C1561 io_analog[3] ro_complete_buffered_0/ro_complete_0/a5 0.15fF
C1562 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C1563 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF
C1564 pd_buffered_0/tapered_buf_1/in1 pd_buffered_0/tapered_buf_1/in5 0.22fF
C1565 pd_buffered_0/tapered_buf_2/in5 pd_buffered_0/tapered_buf_2/in2 0.84fF
C1566 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C1567 pll_full_buffered1_0/pll_full_0/cp_0/vbias pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# 0.19fF
C1568 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1569 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C1570 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z3 0.45fF
C1571 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/vco 0.64fF
C1572 gpio_analog[8] cp_buffered_0/tapered_buf_0/in1 0.19fF
C1573 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.00fF
C1574 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/a0 3.46fF
C1575 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
C1576 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C1577 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C1578 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/a3 0.13fF
C1579 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/B 0.01fF
C1580 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF
C1581 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/Out 0.19fF
C1582 divider_buffered_0/tapered_buf_0/in1 divider_buffered_0/tapered_buf_0/in2 0.37fF
C1583 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Q 0.05fF
C1584 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF
C1585 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF
C1586 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C1587 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C1588 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/div 0.65fF
C1589 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.06fF
C1590 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C1591 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C1592 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1593 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.11fF
C1594 io_analog[10] gpio_analog[10] 1.17fF
C1595 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
C1596 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.01fF
C1597 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C1598 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/vco 0.14fF
C1599 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.11fF
C1600 gpio_noesd[9] io_analog[10] 1.63fF
C1601 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF
C1602 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF
C1603 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.36fF
C1604 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/tspc_1/Q 0.05fF
C1605 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1606 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/clk 0.45fF
C1607 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.30fF
C1608 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Z1 0.03fF
C1609 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/R 0.29fF
C1610 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1611 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/a4 0.09fF
C1612 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/and_0/B 0.08fF
C1613 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.21fF
C1614 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C1615 io_analog[5] io_clamp_low[1] 0.53fF
C1616 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.15fF
C1617 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C1618 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF
C1619 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.45fF
C1620 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.04fF
C1621 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.26fF
C1622 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
C1623 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C1624 ro_divider_buffered_0/tapered_buf_7/in3 ro_divider_buffered_0/tapered_buf_7/in5 2.89fF
C1625 ro_complete_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_1/in4 4.78fF
C1626 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/Z3 0.16fF
C1627 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z4 0.22fF
C1628 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/and_0/B 0.78fF
C1629 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C1630 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.27fF
C1631 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C1632 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/B 0.20fF
C1633 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.02fF
C1634 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1635 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C1636 pll_full_buffered1_0/tapered_buf_0/in2 pll_full_buffered1_0/tapered_buf_0/in3 1.27fF
C1637 cp_buffered_0/tapered_buf_1/in3 cp_buffered_0/tapered_buf_1/in5 2.89fF
C1638 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.30fF
C1639 gpio_analog[7] io_analog[10] 2.78fF
C1640 gpio_noesd[11] io_analog[9] 3.74fF
C1641 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.16fF
C1642 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.22fF
C1643 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z2 0.11fF
C1644 ro_divider_buffered_0/tapered_buf_4/in1 ro_divider_buffered_0/tapered_buf_4/in2 0.37fF
C1645 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.04fF
C1646 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.01fF
C1647 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/vco 0.05fF
C1648 ro_complete_buffered_0/tapered_buf_4/in1 ro_complete_buffered_0/tapered_buf_4/in5 0.22fF
C1649 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/nor_1/A 0.35fF
C1650 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C1651 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C1652 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.18fF
C1653 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 0.06fF
C1654 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
C1655 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.20fF
C1656 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C1657 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.21fF
C1658 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1659 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C1660 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
C1661 io_analog[3] ro_divider_buffered_0/ro_complete_0/a5 0.17fF
C1662 pll_full_buffered2_0/tapered_buf_4/in pll_full_buffered2_0/pll_full_0/cp_0/upbar 0.05fF
C1663 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF
C1664 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF
C1665 io_analog[3] io_analog[8] 1.02fF
C1666 io_analog[4] io_analog[7] 1.11fF
C1667 io_analog[5] io_analog[6] 21.00fF
C1668 ro_divider_buffered_0/tapered_buf_5/in4 ro_divider_buffered_0/tapered_buf_5/in5 29.21fF
C1669 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF
C1670 ro_complete_buffered_0/tapered_buf_5/in1 ro_complete_buffered_0/tapered_buf_5/in5 0.22fF
C1671 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z4 0.15fF
C1672 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C1673 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/mc2 0.33fF
C1674 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/and_0/OUT 0.06fF
C1675 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.20fF
C1676 ro_complete_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/in4 4.78fF
C1677 ro_complete_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/in5 0.84fF
C1678 pll_full_buffered2_0/tapered_buf_4/in1 pll_full_buffered2_0/tapered_buf_4/in2 0.37fF
C1679 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in1 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in5 0.22fF
C1680 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C1681 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
C1682 div_pd_buffered_0/tapered_buf_1/in2 div_pd_buffered_0/tapered_buf_1/in3 1.27fF
C1683 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C1684 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.02fF
C1685 gpio_noesd[14] gpio_noesd[7] 2.93fF
C1686 gpio_noesd[10] pd_buffered_0/pd_0/DOWN 0.54fF
C1687 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.00fF
C1688 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
C1689 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C1690 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z3 0.45fF
C1691 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/clk 0.45fF
C1692 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.02fF
C1693 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
C1694 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C1695 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF
C1696 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF
C1697 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1698 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 0.09fF
C1699 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 0.09fF
C1700 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF
C1701 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C1702 io_analog[8] ro_complete_buffered_0/ro_complete_0/a0 0.23fF
C1703 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF
C1704 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered2_0/pll_full_0/vco 0.26fF
C1705 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C1706 filter_buffered_0/tapered_buf_1/in1 filter_buffered_0/tapered_buf_1/in2 0.37fF
C1707 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 0.03fF
C1708 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C1709 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C1710 gpio_noesd[10] gpio_noesd[7] 0.73fF
C1711 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C1712 io_analog[6] ro_divider_buffered_0/ro_complete_0/a2 0.24fF
C1713 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/nor_1/B 0.22fF
C1714 pll_full_buffered2_0/tapered_buf_0/in1 pll_full_buffered2_0/tapered_buf_0/in5 0.22fF
C1715 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/B 0.20fF
C1716 ro_divider_buffered_0/tapered_buf_8/in1 ro_divider_buffered_0/tapered_buf_8/in2 0.37fF
C1717 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C1718 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/pd_0/UP 0.61fF
C1719 gpio_noesd[8] gpio_noesd[13] 0.55fF
C1720 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z4 0.21fF
C1721 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C1722 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1723 pd_buffered_0/tapered_buf_1/in3 pd_buffered_0/tapered_buf_1/in5 2.89fF
C1724 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out 0.05fF
C1725 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/R 0.61fF
C1726 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z4 0.15fF
C1727 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.45fF
C1728 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C1729 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C1730 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF
C1731 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C1732 pd_buffered_0/tapered_buf_3/in5 pd_buffered_0/pd_0/REF 26.29fF
C1733 gpio_noesd[9] cp_buffered_0/cp_0/down 0.38fF
C1734 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_divider_buffered_0/ro_complete_0/a0 0.09fF
C1735 cp_buffered_0/tapered_buf_0/in1 cp_buffered_0/tapered_buf_0/in2 0.37fF
C1736 io_analog[0] io_analog[1] 8.34fF
C1737 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.65fF
C1738 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C1739 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/vco 0.15fF
C1740 divider_buffered_0/divider_0/and_0/B divider_buffered_0/divider_0/and_0/Z1 0.07fF
C1741 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.15fF
C1742 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/nor_1/B 0.01fF
C1743 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C1744 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C1745 divider_buffered_0/tapered_buf_2/in5 divider_buffered_0/tapered_buf_2/in2 0.84fF
C1746 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
C1747 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF
C1748 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.36fF
C1749 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/REF 0.65fF
C1750 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/tspc_0/Z4 0.12fF
C1751 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/div 4.07fF
C1752 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C1753 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
C1754 pd_buffered_0/tapered_buf_2/in5 pd_buffered_0/tapered_buf_2/in3 2.89fF
C1755 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C1756 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/and_0/B 0.18fF
C1757 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C1758 gpio_noesd[14] pll_full_buffered1_0/pll_full_0/vco 0.69fF
C1759 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF
C1760 pll_full_buffered2_0/tapered_buf_3/in2 pll_full_buffered2_0/tapered_buf_3/in5 0.84fF
C1761 pll_full_buffered1_0/pll_full_0/cp_0/upbar pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.02fF
C1762 io_analog[0] ashish_0/b 8.93fF
C1763 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.38fF
C1764 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF
C1765 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C1766 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C1767 gpio_noesd[11] gpio_analog[10] 0.49fF
C1768 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF
C1769 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.06fF
C1770 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.11fF
C1771 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1772 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF
C1773 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF
C1774 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C1775 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.15fF
C1776 div_pd_buffered_0/tapered_buf_3/in3 div_pd_buffered_0/tapered_buf_3/in5 2.89fF
C1777 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/nor_0/B 0.35fF
C1778 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/clk 0.60fF
C1779 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C1780 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C1781 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.22fF
C1782 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
C1783 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF
C1784 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.36fF
C1785 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/Out 0.05fF
C1786 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/clk 0.60fF
C1787 gpio_analog[3] gpio_analog[4] 1.29fF
C1788 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.12fF
C1789 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/UP 0.21fF
C1790 divider_buffered_0/tapered_buf_0/in3 divider_buffered_0/tapered_buf_0/in2 1.27fF
C1791 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/tspc_0/Z3 0.45fF
C1792 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1793 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF
C1794 pll_full_buffered2_0/tapered_buf_3/in4 pll_full_buffered2_0/tapered_buf_3/in5 29.21fF
C1795 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.23fF
C1796 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C1797 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF
C1798 pll_full_buffered1_0/tapered_buf_0/in3 pll_full_buffered1_0/tapered_buf_0/in4 4.78fF
C1799 pll_full_buffered1_0/tapered_buf_0/in2 pll_full_buffered1_0/tapered_buf_0/in5 0.84fF
C1800 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C1801 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.36fF
C1802 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/div 0.05fF
C1803 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF
C1804 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF
C1805 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF
C1806 io_analog[8] ro_divider_buffered_0/ro_complete_0/a0 0.22fF
C1807 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z2 0.01fF
C1808 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/divider_0/clk 0.05fF
C1809 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/a5 0.09fF
C1810 ro_divider_buffered_0/tapered_buf_4/in2 ro_divider_buffered_0/tapered_buf_4/in3 1.27fF
C1811 io_analog[1] ashish_0/b 4.11fF
C1812 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.40fF
C1813 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/div 0.04fF
C1814 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered1_0/pll_full_0/vco 0.29fF
C1815 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1816 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF
C1817 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF
C1818 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.04fF
C1819 pll_full_buffered2_0/tapered_buf_0/in5 pll_full_buffered2_0/pll_full_0/ref 26.29fF
C1820 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.05fF
C1821 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF
C1822 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
C1823 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C1824 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF
C1825 io_analog[6] ro_complete_buffered_0/ro_complete_0/a2 0.25fF
C1826 pll_full_buffered2_0/tapered_buf_2/in5 gpio_noesd[8] 26.29fF
C1827 pd_buffered_0/tapered_buf_0/in1 pd_buffered_0/tapered_buf_0/in2 0.37fF
C1828 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
C1829 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
C1830 io_analog[9] gpio_analog[10] 3.28fF
C1831 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF
C1832 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/clk 0.12fF
C1833 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C1834 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.04fF
C1835 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C1836 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered1_0/pll_full_0/vco 1.27fF
C1837 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
C1838 gpio_analog[8] gpio_noesd[7] 1.68fF
C1839 gpio_noesd[9] io_analog[9] 1.19fF
C1840 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C1841 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.01fF
C1842 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
C1843 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/nor_1/A 0.01fF
C1844 div_pd_buffered_0/tapered_buf_3/in2 div_pd_buffered_0/tapered_buf_3/in1 0.37fF
C1845 ro_complete_buffered_0/tapered_buf_5/in3 ro_complete_buffered_0/tapered_buf_5/in5 2.89fF
C1846 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/nor_1/B 0.35fF
C1847 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/nor_1/B 0.06fF
C1848 ro_complete_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/in5 29.21fF
C1849 ro_complete_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_1/in5 0.22fF
C1850 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z2 0.14fF
C1851 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF
C1852 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF
C1853 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/Z4 0.36fF
C1854 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C1855 pll_full_buffered2_0/tapered_buf_4/in2 pll_full_buffered2_0/tapered_buf_4/in3 1.27fF
C1856 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF
C1857 pd_buffered_0/tapered_buf_3/in3 pd_buffered_0/tapered_buf_3/in5 2.89fF
C1858 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 pll_full_buffered1_0/pll_full_0/div 0.04fF
C1859 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in4 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in5 29.21fF
C1860 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.02fF
C1861 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1862 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/vco 0.45fF
C1863 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.47fF
C1864 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.06fF
C1865 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z4 0.15fF
C1866 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF
C1867 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/and_0/A 0.80fF
C1868 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C1869 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.05fF
C1870 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/R 0.27fF
C1871 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
C1872 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/pll_full_0/pd_0/UP 0.05fF
C1873 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C1874 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF
C1875 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/clk 0.51fF
C1876 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C1877 div_pd_buffered_0/tapered_buf_1/in1 div_pd_buffered_0/tapered_buf_1/in2 0.37fF
C1878 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF
C1879 io_analog[8] gpio_analog[6] 0.64fF
C1880 gpio_analog[7] io_analog[9] 1.40fF
C1881 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C1882 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF
C1883 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 0.31fF
C1884 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.15fF
C1885 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/div 0.12fF
C1886 io_analog[10] div_pd_buffered_0/divider_0/clk 0.61fF
C1887 ro_divider_buffered_0/tapered_buf_7/in5 ro_divider_buffered_0/ro_complete_0/a1 26.29fF
C1888 pll_full_buffered2_0/tapered_buf_0/in3 pll_full_buffered2_0/tapered_buf_0/in5 2.89fF
C1889 ro_divider_buffered_0/tapered_buf_0/in4 ro_divider_buffered_0/tapered_buf_0/in3 4.78fF
C1890 ro_divider_buffered_0/tapered_buf_0/in5 ro_divider_buffered_0/tapered_buf_0/in2 0.84fF
C1891 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/A 0.01fF
C1892 ro_divider_buffered_0/tapered_buf_8/in2 ro_divider_buffered_0/tapered_buf_8/in3 1.27fF
C1893 div_pd_buffered_0/tapered_buf_2/in5 div_pd_buffered_0/divider_0/mc2 26.29fF
C1894 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C1895 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z4 0.36fF
C1896 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/pll_full_0/div 0.45fF
C1897 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C1898 gpio_noesd[14] gpio_noesd[8] 2.61fF
C1899 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/clk 0.12fF
C1900 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C1901 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.30fF
C1902 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF
C1903 cp_buffered_0/tapered_buf_0/in2 cp_buffered_0/tapered_buf_0/in3 1.27fF
C1904 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.35fF
C1905 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF
C1906 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C1907 io_analog[3] io_analog[7] 0.92fF
C1908 io_analog[4] io_analog[6] 1.25fF
C1909 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.29fF
C1910 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/a5 2.39fF
C1911 ro_divider_buffered_0/tapered_buf_1/in3 ro_divider_buffered_0/tapered_buf_1/in4 4.78fF
C1912 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C1913 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/clk 0.14fF
C1914 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/nor_1/B 1.21fF
C1915 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C1916 io_analog[10] pll_full_buffered2_0/tapered_buf_3/in 0.42fF
C1917 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF
C1918 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF
C1919 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/divider_0/clk 1.30fF
C1920 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered2_0/pll_full_0/div 0.17fF
C1921 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF
C1922 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF
C1923 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C1924 gpio_noesd[10] gpio_noesd[8] 0.51fF
C1925 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C1926 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.01fF
C1927 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C1928 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.06fF
C1929 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF
C1930 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF
C1931 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF
C1932 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.05fF
C1933 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
C1934 pll_full_buffered2_0/tapered_buf_5/in4 pll_full_buffered2_0/tapered_buf_5/in5 29.21fF
C1935 ro_divider_buffered_0/tapered_buf_6/in1 ro_divider_buffered_0/tapered_buf_6/in5 0.22fF
C1936 ro_complete_buffered_0/tapered_buf_6/in1 ro_complete_buffered_0/tapered_buf_6/in2 0.37fF
C1937 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/nor_0/B 0.00fF
C1938 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/and_0/A 0.01fF
C1939 ro_complete_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/in1 0.37fF
C1940 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z3 0.16fF
C1941 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 0.12fF
C1942 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C1943 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C1944 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF
C1945 io_analog[7] ro_complete_buffered_0/ro_complete_0/a0 0.23fF
C1946 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF
C1947 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF
C1948 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1949 pll_full_buffered2_0/tapered_buf_2/in1 pll_full_buffered2_0/tapered_buf_2/in5 0.22fF
C1950 pll_full_buffered1_0/tapered_buf_1/in1 pll_full_buffered1_0/tapered_buf_1/in2 0.37fF
C1951 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/vco 0.45fF
C1952 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1953 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF
C1954 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF
C1955 io_analog[3] ro_divider_buffered_0/tapered_buf_3/in1 0.19fF
C1956 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/vco 0.55fF
C1957 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.14fF
C1958 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.05fF
C1959 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
C1960 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF
C1961 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z2 0.01fF
C1962 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/clk 0.05fF
C1963 io_analog[5] ro_divider_buffered_0/ro_complete_0/a2 0.35fF
C1964 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C1965 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/clk 0.05fF
C1966 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF
C1967 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C1968 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1969 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/clk 0.04fF
C1970 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C1971 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C1972 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/vco 0.01fF
C1973 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF
C1974 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF
C1975 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF
C1976 pll_full_buffered1_0/tapered_buf_0/in4 pll_full_buffered1_0/tapered_buf_0/in5 29.21fF
C1977 pll_full_buffered2_0/tapered_buf_2/in3 pll_full_buffered2_0/tapered_buf_2/in4 4.78fF
C1978 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_1/in5 26.29fF
C1979 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF
C1980 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C1981 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/tspc_0/Z2 0.01fF
C1982 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z2 0.23fF
C1983 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Q 0.04fF
C1984 ro_divider_buffered_0/tapered_buf_4/in3 ro_divider_buffered_0/tapered_buf_4/in4 4.78fF
C1985 ro_divider_buffered_0/tapered_buf_4/in2 ro_divider_buffered_0/tapered_buf_4/in5 0.84fF
C1986 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DIV 0.12fF
C1987 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.06fF
C1988 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/div 0.27fF
C1989 ro_complete_buffered_0/tapered_buf_4/in3 ro_complete_buffered_0/tapered_buf_4/in5 2.89fF
C1990 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/B 0.18fF
C1991 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF
C1992 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.09fF
C1993 div_pd_buffered_0/tapered_buf_0/in3 div_pd_buffered_0/tapered_buf_0/in5 2.89fF
C1994 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C1995 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF
C1996 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A 0.15fF
C1997 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 0.09fF
C1998 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF
C1999 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C2000 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C2001 pd_buffered_0/tapered_buf_0/in2 pd_buffered_0/tapered_buf_0/in3 1.27fF
C2002 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C2003 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF
C2004 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C2005 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
C2006 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.07fF
C2007 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
C2008 filter_buffered_0/tapered_buf_1/in3 filter_buffered_0/tapered_buf_1/in5 2.89fF
C2009 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.51fF
C2010 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.01fF
C2011 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C2012 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C2013 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z2 0.01fF
C2014 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C2015 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
C2016 divider_buffered_0/tapered_buf_2/in5 divider_buffered_0/tapered_buf_2/in1 0.22fF
C2017 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C2018 pll_full_buffered2_0/tapered_buf_4/in3 pll_full_buffered2_0/tapered_buf_4/in4 4.78fF
C2019 gpio_noesd[14] gpio_noesd[13] 2.55fF
C2020 div_pd_buffered_0/tapered_buf_0/in2 div_pd_buffered_0/tapered_buf_0/in5 0.84fF
C2021 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
C2022 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF
C2023 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF
C2024 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C2025 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_0/B 0.47fF
C2026 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
C2027 gpio_noesd[10] pd_buffered_0/tapered_buf_2/in5 26.29fF
C2028 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C2029 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C2030 io_analog[4] io_clamp_low[0] 0.53fF
C2031 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.06fF
C2032 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF
C2033 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF
C2034 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C2035 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C2036 ro_divider_buffered_0/tapered_buf_5/in5 ro_divider_buffered_0/ro_complete_0/a3 26.29fF
C2037 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF
C2038 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.20fF
C2039 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/nor_0/B 0.35fF
C2040 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/and_0/A 0.26fF
C2041 io_analog[7] ro_divider_buffered_0/tapered_buf_7/in1 0.19fF
C2042 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C2043 pll_full_buffered2_0/tapered_buf_3/in pll_full_buffered2_0/pll_full_0/pd_0/R 0.36fF
C2044 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
C2045 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
C2046 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in 1.30fF
C2047 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF
C2048 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF
C2049 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF
C2050 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 0.13fF
C2051 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF
C2052 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C2053 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
C2054 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C2055 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C2056 cp_buffered_0/cp_0/out cp_buffered_0/tapered_buf_1/in1 0.19fF
C2057 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/down 0.32fF
C2058 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C2059 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 1.21fF
C2060 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.35fF
C2061 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/vco 0.60fF
C2062 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/Out 0.05fF
C2063 io_analog[7] ro_divider_buffered_0/ro_complete_0/a0 0.33fF
C2064 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
C2065 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C2066 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/divider_0/clk 0.10fF
C2067 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF
C2068 io_analog[10] pll_full_buffered2_0/pll_full_0/cp_0/upbar 0.36fF
C2069 ro_divider_buffered_0/tapered_buf_8/in3 ro_divider_buffered_0/tapered_buf_8/in4 4.78fF
C2070 ro_divider_buffered_0/tapered_buf_8/in2 ro_divider_buffered_0/tapered_buf_8/in5 0.84fF
C2071 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF
C2072 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C2073 io_clamp_low[2] io_clamp_high[2] 0.53fF
C2074 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF
C2075 divider_buffered_0/tapered_buf_1/in1 divider_buffered_0/tapered_buf_1/in2 0.37fF
C2076 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Z4 0.21fF
C2077 io_analog[5] ro_complete_buffered_0/ro_complete_0/a2 0.25fF
C2078 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
C2079 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF
C2080 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 1.07fF
C2081 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 pll_full_buffered2_0/pll_full_0/vco 0.11fF
C2082 ro_divider_buffered_0/tapered_buf_2/in2 ro_divider_buffered_0/tapered_buf_2/in5 0.84fF
C2083 cp_buffered_0/tapered_buf_0/in3 cp_buffered_0/tapered_buf_0/in4 4.78fF
C2084 cp_buffered_0/tapered_buf_0/in2 cp_buffered_0/tapered_buf_0/in5 0.84fF
C2085 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.14fF
C2086 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/vco 0.51fF
C2087 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C2088 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF
C2089 ro_divider_buffered_0/tapered_buf_1/in4 ro_divider_buffered_0/tapered_buf_1/in5 29.21fF
C2090 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_1/Z2 0.15fF
C2091 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF
C2092 io_analog[8] io_analog[9] 1.33fF
C2093 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
C2094 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
C2095 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF
C2096 ro_complete_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_1/in5 0.84fF
C2097 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/REF 0.17fF
C2098 pll_full_buffered2_0/tapered_buf_4/in5 pll_full_buffered2_0/tapered_buf_4/in1 0.22fF
C2099 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
C2100 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C2101 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C2102 pd_buffered_0/tapered_buf_3/in2 pd_buffered_0/tapered_buf_3/in3 1.27fF
C2103 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C2104 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# 0.32fF
C2105 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF
C2106 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF
C2107 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.45fF
C2108 filter_buffered_0/tapered_buf_0/in1 filter_buffered_0/tapered_buf_0/in2 0.37fF
C2109 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z3 0.09fF
C2110 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.08fF
C2111 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
C2112 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C2113 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF
C2114 gpio_noesd[7] gpio_noesd[12] 0.68fF
C2115 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
C2116 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C2117 ro_complete_buffered_0/tapered_buf_6/in2 ro_complete_buffered_0/tapered_buf_6/in3 1.27fF
C2118 pll_full_buffered2_0/tapered_buf_5/in5 gpio_noesd[7] 26.29fF
C2119 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/nor_0/B 0.47fF
C2120 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
C2121 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/clk 0.01fF
C2122 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C2123 ro_divider_buffered_0/tapered_buf_6/in3 ro_divider_buffered_0/tapered_buf_6/in5 2.89fF
C2124 pd_buffered_0/pd_0/DIV io_analog[10] 0.52fF
C2125 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/R 0.03fF
C2126 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C2127 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Z3 0.38fF
C2128 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C2129 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF
C2130 ro_complete_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_2/in5 2.89fF
C2131 divider_buffered_0/tapered_buf_0/in4 divider_buffered_0/tapered_buf_0/in5 29.21fF
C2132 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C2133 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.06fF
C2134 io_analog[7] gpio_analog[6] 0.64fF
C2135 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 1.07fF
C2136 pll_full_buffered1_0/tapered_buf_1/in2 pll_full_buffered1_0/tapered_buf_1/in3 1.27fF
C2137 gpio_analog[9] gpio_noesd[7] 1.96fF
C2138 gpio_analog[5] gpio_analog[3] 1.06fF
C2139 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF
C2140 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF
C2141 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF
C2142 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/nor_0/B 0.06fF
C2143 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.16fF
C2144 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF
C2145 ro_divider_buffered_0/tapered_buf_3/in1 ro_divider_buffered_0/tapered_buf_3/in2 0.37fF
C2146 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.31fF
C2147 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C2148 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
C2149 io_analog[9] div_pd_buffered_0/divider_0/clk 0.65fF
C2150 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z2 0.40fF
C2151 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/Out 0.04fF
C2152 divider_buffered_0/divider_0/prescaler_0/tspc_0/D divider_buffered_0/divider_0/clk 0.29fF
C2153 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C2154 ro_complete_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_1/in1 0.37fF
C2155 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_divider_buffered_0/divider_0/clk 0.29fF
C2156 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.03fF
C2157 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF
C2158 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF
C2159 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C2160 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C2161 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF
C2162 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF
C2163 gpio_analog[9] pd_buffered_0/tapered_buf_1/in1 0.19fF
C2164 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 0.14fF
C2165 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C2166 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 0.09fF
C2167 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF
C2168 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C2169 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF
C2170 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF
C2171 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/clk 0.26fF
C2172 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.00fF
C2173 io_analog[10] div_pd_buffered_0/tapered_buf_1/in1 0.19fF
C2174 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF
C2175 divider_buffered_0/divider_0/tspc_1/Z4 divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.12fF
C2176 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
C2177 io_analog[4] io_analog[5] 20.14fF
C2178 io_analog[3] io_analog[6] 1.03fF
C2179 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/nor_1/A 0.35fF
C2180 ro_divider_buffered_0/tapered_buf_4/in4 ro_divider_buffered_0/tapered_buf_4/in5 29.21fF
C2181 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.00fF
C2182 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z3 0.06fF
C2183 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Q 0.55fF
C2184 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C2185 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_divider_buffered_0/divider_0/clk 1.27fF
C2186 io_analog[9] pll_full_buffered2_0/tapered_buf_3/in 0.61fF
C2187 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.06fF
C2188 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF
C2189 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF
Xpll_full_buffered1_0 vssa1 vdda1 pll_full_buffered1
Xashish_0 io_analog[1] io_analog[0] gpio_analog[3] vssa1 vdd ashish_0/a ashish_0/b
+ ashish
Xpd_buffered_0 vssa1 vssa1 pd_buffered
Xcp_buffered_0 vssa1 vdda1 cp_buffered
Xfilter_buffered_0 vssa1 gpio_analog[17] filter_buffered
Xro_divider_buffered_0 vssa1 vssa1 ro_divider_buffered
Xpll_full_buffered2_0 vssa1 vssa1 pll_full_buffered2
Xdivider_buffered_0 vssa1 vssa1 divider_buffered
Xro_complete_buffered_0 vssa1 ro_complete_buffered
Xdiv_pd_buffered_0 vssa1 vssa1 div_pd_buffered
C2190 io_in_3v3[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2191 io_oeb[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2192 io_in[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2193 io_out[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2194 io_out[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2195 io_in[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2196 io_oeb[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2197 io_in_3v3[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2198 io_in_3v3[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2199 io_oeb[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2200 io_in[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2201 io_out[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2202 io_out[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2203 io_in[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2204 io_oeb[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2205 io_in_3v3[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2206 io_in_3v3[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2207 io_oeb[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2208 io_in[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2209 io_out[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2210 io_out[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2211 io_in[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2212 io_oeb[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2213 io_in_3v3[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2214 io_in_3v3[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2215 gpio_noesd[17] ro_complete_buffered_0/tapered_buf_0/out 2.32fF
C2216 io_in[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2217 io_out[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2218 io_oeb[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2219 io_in_3v3[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2220 io_in[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2221 io_out[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2222 io_oeb[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2223 io_in_3v3[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2224 io_in[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2225 io_out[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2226 io_oeb[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2227 io_oeb[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2228 io_out[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2229 io_in[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2230 io_in_3v3[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2231 gpio_noesd[16] ro_complete_buffered_0/tapered_buf_0/out 2.30fF
C2232 gpio_analog[16] ro_complete_buffered_0/tapered_buf_0/out 2.30fF
C2233 io_oeb[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2234 io_out[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2235 io_in[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2236 io_in_3v3[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2237 gpio_noesd[15] ro_complete_buffered_0/tapered_buf_0/out 2.31fF
C2238 gpio_analog[15] ro_complete_buffered_0/tapered_buf_0/out 2.30fF
C2239 io_in_3v3[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2240 io_in[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2241 io_out[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2242 io_oeb[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2243 io_oeb[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2244 io_out[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2245 io_in[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2246 io_in_3v3[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2247 vssd1 ro_complete_buffered_0/tapered_buf_0/out 13.04fF
C2248 gpio_analog[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2249 gpio_noesd[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2250 io_in_3v3[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2251 io_in[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2252 io_out[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2253 io_oeb[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2254 gpio_analog[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2255 gpio_noesd[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2256 io_in_3v3[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2257 io_in[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2258 io_out[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2259 io_oeb[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2260 gpio_analog[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2261 gpio_noesd[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2262 io_in_3v3[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2263 io_in[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2264 io_out[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2265 io_oeb[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2266 gpio_noesd[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2267 io_in_3v3[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2268 io_in[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2269 io_out[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2270 io_oeb[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2271 io_in_3v3[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2272 io_in[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2273 io_out[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2274 io_oeb[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2275 io_in_3v3[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2276 io_in[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2277 io_out[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2278 io_oeb[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2279 gpio_analog[14] ro_complete_buffered_0/tapered_buf_0/out 2.29fF
C2280 vssd2 ro_complete_buffered_0/tapered_buf_0/out 25.38fF
C2281 vdda2 ro_complete_buffered_0/tapered_buf_0/out 24.41fF
C2282 io_oeb[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2283 io_out[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2284 io_in[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2285 io_in_3v3[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2286 gpio_analog[13] ro_complete_buffered_0/tapered_buf_0/out 2.30fF
C2287 io_oeb[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2288 io_out[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2289 io_in[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2290 io_in_3v3[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2291 gpio_analog[12] ro_complete_buffered_0/tapered_buf_0/out 2.30fF
C2292 io_oeb[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2293 io_out[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2294 io_in[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2295 io_in_3v3[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2296 gpio_analog[11] ro_complete_buffered_0/tapered_buf_0/out 2.29fF
C2297 io_oeb[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2298 io_out[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2299 io_in[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2300 io_in_3v3[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2301 io_oeb[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2302 io_out[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2303 io_in[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2304 io_in_3v3[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2305 io_oeb[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2306 io_out[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2307 io_in[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2308 io_in_3v3[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2309 io_oeb[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2310 io_out[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2311 io_in[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2312 io_in_3v3[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2313 vssa2 ro_complete_buffered_0/tapered_buf_0/out 69.90fF
C2314 gpio_noesd[6] ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2315 io_in_3v3[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2316 io_in[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2317 io_out[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2318 io_oeb[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF
C2319 vccd1 ro_complete_buffered_0/tapered_buf_0/out 39.84fF
C2320 vccd2 ro_complete_buffered_0/tapered_buf_0/out 70.00fF
C2321 io_clamp_high[0] ro_complete_buffered_0/tapered_buf_0/out 3.58fF
C2322 io_clamp_low[0] ro_complete_buffered_0/tapered_buf_0/out 3.58fF
C2323 io_clamp_high[1] ro_complete_buffered_0/tapered_buf_0/out 3.58fF
C2324 io_clamp_low[1] ro_complete_buffered_0/tapered_buf_0/out 3.58fF
C2325 io_clamp_high[2] ro_complete_buffered_0/tapered_buf_0/out 3.58fF
C2326 io_clamp_low[2] ro_complete_buffered_0/tapered_buf_0/out 3.58fF
C2327 user_irq[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2328 user_irq[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2329 user_irq[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2330 user_clock2 ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2331 la_oenb[127] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2332 la_data_out[127] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2333 la_data_in[127] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2334 la_oenb[126] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2335 la_data_out[126] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2336 la_data_in[126] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2337 la_oenb[125] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2338 la_data_out[125] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2339 la_data_in[125] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2340 la_oenb[124] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2341 la_data_out[124] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2342 la_data_in[124] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2343 la_oenb[123] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2344 la_data_out[123] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2345 la_data_in[123] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2346 la_oenb[122] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2347 la_data_out[122] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2348 la_data_in[122] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2349 la_oenb[121] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2350 la_data_out[121] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2351 la_data_in[121] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2352 la_oenb[120] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2353 la_data_out[120] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2354 la_data_in[120] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2355 la_oenb[119] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2356 la_data_out[119] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2357 la_data_in[119] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2358 la_oenb[118] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2359 la_data_out[118] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2360 la_data_in[118] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2361 la_oenb[117] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2362 la_data_out[117] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2363 la_data_in[117] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2364 la_oenb[116] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2365 la_data_out[116] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2366 la_data_in[116] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2367 la_oenb[115] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2368 la_data_out[115] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2369 la_data_in[115] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2370 la_oenb[114] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2371 la_data_out[114] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2372 la_data_in[114] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2373 la_oenb[113] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2374 la_data_out[113] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2375 la_data_in[113] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2376 la_oenb[112] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2377 la_data_out[112] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2378 la_data_in[112] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2379 la_oenb[111] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2380 la_data_out[111] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2381 la_data_in[111] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2382 la_oenb[110] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2383 la_data_out[110] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2384 la_data_in[110] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2385 la_oenb[109] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2386 la_data_out[109] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2387 la_data_in[109] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2388 la_oenb[108] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2389 la_data_out[108] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2390 la_data_in[108] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2391 la_oenb[107] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2392 la_data_out[107] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2393 la_data_in[107] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2394 la_oenb[106] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2395 la_data_out[106] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2396 la_data_in[106] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2397 la_oenb[105] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2398 la_data_out[105] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2399 la_data_in[105] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2400 la_oenb[104] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2401 la_data_out[104] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2402 la_data_in[104] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2403 la_oenb[103] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2404 la_data_out[103] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2405 la_data_in[103] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2406 la_oenb[102] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2407 la_data_out[102] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2408 la_data_in[102] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2409 la_oenb[101] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2410 la_data_out[101] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2411 la_data_in[101] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2412 la_oenb[100] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2413 la_data_out[100] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2414 la_data_in[100] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2415 la_oenb[99] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2416 la_data_out[99] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2417 la_data_in[99] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2418 la_oenb[98] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2419 la_data_out[98] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2420 la_data_in[98] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2421 la_oenb[97] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2422 la_data_out[97] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2423 la_data_in[97] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2424 la_oenb[96] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2425 la_data_out[96] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2426 la_data_in[96] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2427 la_oenb[95] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2428 la_data_out[95] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2429 la_data_in[95] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2430 la_oenb[94] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2431 la_data_out[94] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2432 la_data_in[94] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2433 la_oenb[93] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2434 la_data_out[93] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2435 la_data_in[93] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2436 la_oenb[92] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2437 la_data_out[92] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2438 la_data_in[92] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2439 la_oenb[91] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2440 la_data_out[91] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2441 la_data_in[91] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2442 la_oenb[90] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2443 la_data_out[90] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2444 la_data_in[90] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2445 la_oenb[89] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2446 la_data_out[89] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2447 la_data_in[89] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2448 la_oenb[88] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2449 la_data_out[88] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2450 la_data_in[88] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2451 la_oenb[87] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2452 la_data_out[87] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2453 la_data_in[87] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2454 la_oenb[86] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2455 la_data_out[86] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2456 la_data_in[86] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2457 la_oenb[85] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2458 la_data_out[85] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2459 la_data_in[85] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2460 la_oenb[84] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2461 la_data_out[84] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2462 la_data_in[84] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2463 la_oenb[83] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2464 la_data_out[83] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2465 la_data_in[83] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2466 la_oenb[82] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2467 la_data_out[82] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2468 la_data_in[82] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2469 la_oenb[81] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2470 la_data_out[81] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2471 la_data_in[81] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2472 la_oenb[80] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2473 la_data_out[80] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2474 la_data_in[80] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2475 la_oenb[79] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2476 la_data_out[79] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2477 la_data_in[79] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2478 la_oenb[78] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2479 la_data_out[78] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2480 la_data_in[78] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2481 la_oenb[77] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2482 la_data_out[77] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2483 la_data_in[77] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2484 la_oenb[76] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2485 la_data_out[76] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2486 la_data_in[76] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2487 la_oenb[75] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2488 la_data_out[75] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2489 la_data_in[75] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2490 la_oenb[74] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2491 la_data_out[74] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2492 la_data_in[74] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2493 la_oenb[73] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2494 la_data_out[73] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2495 la_data_in[73] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2496 la_oenb[72] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2497 la_data_out[72] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2498 la_data_in[72] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2499 la_oenb[71] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2500 la_data_out[71] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2501 la_data_in[71] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2502 la_oenb[70] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2503 la_data_out[70] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2504 la_data_in[70] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2505 la_oenb[69] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2506 la_data_out[69] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2507 la_data_in[69] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2508 la_oenb[68] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2509 la_data_out[68] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2510 la_data_in[68] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2511 la_oenb[67] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2512 la_data_out[67] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2513 la_data_in[67] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2514 la_oenb[66] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2515 la_data_out[66] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2516 la_data_in[66] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2517 la_oenb[65] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2518 la_data_out[65] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2519 la_data_in[65] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2520 la_oenb[64] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2521 la_data_out[64] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2522 la_data_in[64] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2523 la_oenb[63] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2524 la_data_out[63] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2525 la_data_in[63] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2526 la_oenb[62] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2527 la_data_out[62] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2528 la_data_in[62] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2529 la_oenb[61] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2530 la_data_out[61] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2531 la_data_in[61] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2532 la_oenb[60] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2533 la_data_out[60] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2534 la_data_in[60] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2535 la_oenb[59] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2536 la_data_out[59] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2537 la_data_in[59] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2538 la_oenb[58] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2539 la_data_out[58] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2540 la_data_in[58] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2541 la_oenb[57] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2542 la_data_out[57] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2543 la_data_in[57] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2544 la_oenb[56] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2545 la_data_out[56] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2546 la_data_in[56] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2547 la_oenb[55] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2548 la_data_out[55] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2549 la_data_in[55] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2550 la_oenb[54] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2551 la_data_out[54] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2552 la_data_in[54] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2553 la_oenb[53] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2554 la_data_out[53] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2555 la_data_in[53] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2556 la_oenb[52] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2557 la_data_out[52] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2558 la_data_in[52] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2559 la_oenb[51] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2560 la_data_out[51] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2561 la_data_in[51] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2562 la_oenb[50] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2563 la_data_out[50] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2564 la_data_in[50] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2565 la_oenb[49] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2566 la_data_out[49] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2567 la_data_in[49] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2568 la_oenb[48] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2569 la_data_out[48] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2570 la_data_in[48] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2571 la_oenb[47] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2572 la_data_out[47] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2573 la_data_in[47] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2574 la_oenb[46] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2575 la_data_out[46] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2576 la_data_in[46] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2577 la_oenb[45] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2578 la_data_out[45] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2579 la_data_in[45] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2580 la_oenb[44] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2581 la_data_out[44] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2582 la_data_in[44] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2583 la_oenb[43] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2584 la_data_out[43] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2585 la_data_in[43] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2586 la_oenb[42] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2587 la_data_out[42] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2588 la_data_in[42] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2589 la_oenb[41] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2590 la_data_out[41] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2591 la_data_in[41] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2592 la_oenb[40] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2593 la_data_out[40] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2594 la_data_in[40] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2595 la_oenb[39] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2596 la_data_out[39] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2597 la_data_in[39] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2598 la_oenb[38] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2599 la_data_out[38] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2600 la_data_in[38] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2601 la_oenb[37] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2602 la_data_out[37] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2603 la_data_in[37] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2604 la_oenb[36] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2605 la_data_out[36] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2606 la_data_in[36] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2607 la_oenb[35] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2608 la_data_out[35] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2609 la_data_in[35] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2610 la_oenb[34] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2611 la_data_out[34] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2612 la_data_in[34] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2613 la_oenb[33] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2614 la_data_out[33] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2615 la_data_in[33] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2616 la_oenb[32] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2617 la_data_out[32] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2618 la_data_in[32] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2619 la_oenb[31] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2620 la_data_out[31] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2621 la_data_in[31] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2622 la_oenb[30] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2623 la_data_out[30] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2624 la_data_in[30] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2625 la_oenb[29] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2626 la_data_out[29] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2627 la_data_in[29] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2628 la_oenb[28] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2629 la_data_out[28] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2630 la_data_in[28] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2631 la_oenb[27] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2632 la_data_out[27] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2633 la_data_in[27] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2634 la_oenb[26] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2635 la_data_out[26] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2636 la_data_in[26] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2637 la_oenb[25] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2638 la_data_out[25] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2639 la_data_in[25] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2640 la_oenb[24] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2641 la_data_out[24] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2642 la_data_in[24] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2643 la_oenb[23] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2644 la_data_out[23] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2645 la_data_in[23] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2646 la_oenb[22] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2647 la_data_out[22] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2648 la_data_in[22] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2649 la_oenb[21] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2650 la_data_out[21] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2651 la_data_in[21] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2652 la_oenb[20] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2653 la_data_out[20] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2654 la_data_in[20] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2655 la_oenb[19] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2656 la_data_out[19] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2657 la_data_in[19] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2658 la_oenb[18] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2659 la_data_out[18] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2660 la_data_in[18] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2661 la_oenb[17] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2662 la_data_out[17] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2663 la_data_in[17] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2664 la_oenb[16] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2665 la_data_out[16] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2666 la_data_in[16] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2667 la_oenb[15] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2668 la_data_out[15] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2669 la_data_in[15] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2670 la_oenb[14] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2671 la_data_out[14] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2672 la_data_in[14] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2673 la_oenb[13] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2674 la_data_out[13] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2675 la_data_in[13] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2676 la_oenb[12] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2677 la_data_out[12] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2678 la_data_in[12] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2679 la_oenb[11] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2680 la_data_out[11] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2681 la_data_in[11] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2682 la_oenb[10] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2683 la_data_out[10] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2684 la_data_in[10] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2685 la_oenb[9] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2686 la_data_out[9] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2687 la_data_in[9] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2688 la_oenb[8] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2689 la_data_out[8] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2690 la_data_in[8] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2691 la_oenb[7] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2692 la_data_out[7] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2693 la_data_in[7] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2694 la_oenb[6] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2695 la_data_out[6] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2696 la_data_in[6] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2697 la_oenb[5] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2698 la_data_out[5] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2699 la_data_in[5] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2700 la_oenb[4] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2701 la_data_out[4] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2702 la_data_in[4] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2703 la_oenb[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2704 la_data_out[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2705 la_data_in[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2706 la_oenb[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2707 la_data_out[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2708 la_data_in[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2709 la_oenb[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2710 la_data_out[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2711 la_data_in[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2712 la_oenb[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2713 la_data_out[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2714 la_data_in[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2715 wbs_dat_o[31] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2716 wbs_dat_i[31] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2717 wbs_adr_i[31] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2718 wbs_dat_o[30] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2719 wbs_dat_i[30] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2720 wbs_adr_i[30] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2721 wbs_dat_o[29] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2722 wbs_dat_i[29] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2723 wbs_adr_i[29] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2724 wbs_dat_o[28] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2725 wbs_dat_i[28] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2726 wbs_adr_i[28] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2727 wbs_dat_o[27] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2728 wbs_dat_i[27] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2729 wbs_adr_i[27] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2730 wbs_dat_o[26] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2731 wbs_dat_i[26] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2732 wbs_adr_i[26] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2733 wbs_dat_o[25] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2734 wbs_dat_i[25] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2735 wbs_adr_i[25] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2736 wbs_dat_o[24] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2737 wbs_dat_i[24] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2738 wbs_adr_i[24] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2739 wbs_dat_o[23] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2740 wbs_dat_i[23] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2741 wbs_adr_i[23] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2742 wbs_dat_o[22] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2743 wbs_dat_i[22] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2744 wbs_adr_i[22] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2745 wbs_dat_o[21] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2746 wbs_dat_i[21] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2747 wbs_adr_i[21] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2748 wbs_dat_o[20] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2749 wbs_dat_i[20] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2750 wbs_adr_i[20] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2751 wbs_dat_o[19] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2752 wbs_dat_i[19] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2753 wbs_adr_i[19] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2754 wbs_dat_o[18] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2755 wbs_dat_i[18] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2756 wbs_adr_i[18] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2757 wbs_dat_o[17] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2758 wbs_dat_i[17] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2759 wbs_adr_i[17] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2760 wbs_dat_o[16] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2761 wbs_dat_i[16] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2762 wbs_adr_i[16] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2763 wbs_dat_o[15] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2764 wbs_dat_i[15] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2765 wbs_adr_i[15] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2766 wbs_dat_o[14] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2767 wbs_dat_i[14] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2768 wbs_adr_i[14] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2769 wbs_dat_o[13] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2770 wbs_dat_i[13] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2771 wbs_adr_i[13] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2772 wbs_dat_o[12] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2773 wbs_dat_i[12] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2774 wbs_adr_i[12] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2775 wbs_dat_o[11] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2776 wbs_dat_i[11] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2777 wbs_adr_i[11] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2778 wbs_dat_o[10] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2779 wbs_dat_i[10] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2780 wbs_adr_i[10] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2781 wbs_dat_o[9] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2782 wbs_dat_i[9] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2783 wbs_adr_i[9] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2784 wbs_dat_o[8] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2785 wbs_dat_i[8] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2786 wbs_adr_i[8] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2787 wbs_dat_o[7] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2788 wbs_dat_i[7] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2789 wbs_adr_i[7] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2790 wbs_dat_o[6] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2791 wbs_dat_i[6] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2792 wbs_adr_i[6] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2793 wbs_dat_o[5] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2794 wbs_dat_i[5] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2795 wbs_adr_i[5] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2796 wbs_dat_o[4] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2797 wbs_dat_i[4] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2798 wbs_adr_i[4] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2799 wbs_sel_i[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2800 wbs_dat_o[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2801 wbs_dat_i[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2802 wbs_adr_i[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2803 wbs_sel_i[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2804 wbs_dat_o[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2805 wbs_dat_i[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2806 wbs_adr_i[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2807 wbs_sel_i[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2808 wbs_dat_o[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2809 wbs_dat_i[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2810 wbs_adr_i[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2811 wbs_sel_i[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2812 wbs_dat_o[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2813 wbs_dat_i[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2814 wbs_adr_i[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2815 wbs_we_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2816 wbs_stb_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2817 wbs_cyc_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2818 wbs_ack_o ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2819 wb_rst_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2820 wb_clk_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF
C2821 gpio_noesd[12] ro_complete_buffered_0/tapered_buf_0/out 476.99fF
C2822 div_pd_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2823 div_pd_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2824 div_pd_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2825 div_pd_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2826 div_pd_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2827 div_pd_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2828 div_pd_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2829 div_pd_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2830 div_pd_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2831 div_pd_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2832 div_pd_buffered_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.74fF
C2833 div_pd_buffered_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.25fF
C2834 div_pd_buffered_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.19fF
C2835 div_pd_buffered_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.93fF
C2836 div_pd_buffered_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C2837 div_pd_buffered_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2838 div_pd_buffered_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C2839 div_pd_buffered_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C2840 div_pd_buffered_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.37fF
C2841 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C2842 div_pd_buffered_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C2843 div_pd_buffered_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C2844 div_pd_buffered_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2845 div_pd_buffered_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C2846 div_pd_buffered_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C2847 div_pd_buffered_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.05fF
C2848 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C2849 div_pd_buffered_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C2850 div_pd_buffered_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF
C2851 div_pd_buffered_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2852 div_pd_buffered_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C2853 div_pd_buffered_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C2854 div_pd_buffered_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.04fF
C2855 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C2856 div_pd_buffered_0/divider_0/clk ro_complete_buffered_0/tapered_buf_0/out 399.62fF
C2857 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C2858 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF
C2859 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.64fF
C2860 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF
C2861 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C2862 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C2863 div_pd_buffered_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.62fF
C2864 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C2865 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2866 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C2867 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C2868 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C2869 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C2870 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C2871 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2872 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF
C2873 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C2874 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C2875 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING
C2876 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C2877 div_pd_buffered_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF
C2878 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C2879 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C2880 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C2881 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING
C2882 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C2883 div_pd_buffered_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C2884 div_pd_buffered_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C2885 div_pd_buffered_0/divider_0/mc2 ro_complete_buffered_0/tapered_buf_0/out 393.39fF
C2886 div_pd_buffered_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 6.33fF
C2887 div_pd_buffered_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF
C2888 div_pd_buffered_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF
C2889 div_pd_buffered_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C2890 div_pd_buffered_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C2891 div_pd_buffered_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF
C2892 div_pd_buffered_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF
C2893 div_pd_buffered_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C2894 div_pd_buffered_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C2895 div_pd_buffered_0/pd_0/DOWN ro_complete_buffered_0/tapered_buf_0/out 9.05fF
C2896 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C2897 div_pd_buffered_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C2898 div_pd_buffered_0/pd_0/DIV ro_complete_buffered_0/tapered_buf_0/out 6.57fF
C2899 div_pd_buffered_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C2900 div_pd_buffered_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C2901 div_pd_buffered_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF
C2902 div_pd_buffered_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C2903 div_pd_buffered_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C2904 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C2905 div_pd_buffered_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C2906 div_pd_buffered_0/pd_0/REF ro_complete_buffered_0/tapered_buf_0/out 392.16fF
C2907 gpio_noesd[13] ro_complete_buffered_0/tapered_buf_0/out 498.04fF
C2908 div_pd_buffered_0/tapered_buf_4/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2909 div_pd_buffered_0/tapered_buf_4/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2910 div_pd_buffered_0/tapered_buf_4/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2911 div_pd_buffered_0/tapered_buf_4/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2912 div_pd_buffered_0/tapered_buf_4/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2913 div_pd_buffered_0/tapered_buf_3/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2914 div_pd_buffered_0/tapered_buf_3/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2915 div_pd_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2916 div_pd_buffered_0/tapered_buf_3/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2917 div_pd_buffered_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2918 gpio_analog[10] ro_complete_buffered_0/tapered_buf_0/out 78.77fF
C2919 div_pd_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2920 div_pd_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2921 div_pd_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2922 div_pd_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2923 div_pd_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2924 ro_complete_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 619.27fF
C2925 ro_complete_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2926 ro_complete_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2927 ro_complete_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2928 ro_complete_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2929 gpio_analog[6] ro_complete_buffered_0/tapered_buf_0/out 148.15fF
C2930 ro_complete_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2931 ro_complete_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2932 ro_complete_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2933 ro_complete_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2934 ro_complete_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2935 io_analog[2] ro_complete_buffered_0/tapered_buf_0/out 449.69fF
C2936 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in5 ro_complete_buffered_0/tapered_buf_0/out 599.07fF
C2937 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in4 ro_complete_buffered_0/tapered_buf_0/out 256.17fF
C2938 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in3 ro_complete_buffered_0/tapered_buf_0/out 83.14fF
C2939 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in1 ro_complete_buffered_0/tapered_buf_0/out 5.48fF
C2940 ro_complete_buffered_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.53fF
C2941 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C2942 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C2943 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C2944 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C2945 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C2946 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C2947 ro_complete_buffered_0/DIGITAL_BUFFER_v1_0/in ro_complete_buffered_0/tapered_buf_0/out 26.79fF
C2948 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C2949 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 416.45fF
C2950 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C2951 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 412.13fF
C2952 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C2953 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 402.70fF
C2954 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C2955 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 407.26fF
C2956 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C2957 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 398.93fF
C2958 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C2959 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 395.79fF
C2960 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.13fF
C2961 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C2962 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C2963 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C2964 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C2965 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C2966 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C2967 ro_complete_buffered_0/tapered_buf_6/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2968 ro_complete_buffered_0/tapered_buf_6/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2969 ro_complete_buffered_0/tapered_buf_6/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2970 ro_complete_buffered_0/tapered_buf_6/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2971 ro_complete_buffered_0/tapered_buf_6/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2972 ro_complete_buffered_0/tapered_buf_5/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2973 ro_complete_buffered_0/tapered_buf_5/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2974 ro_complete_buffered_0/tapered_buf_5/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2975 ro_complete_buffered_0/tapered_buf_5/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2976 ro_complete_buffered_0/tapered_buf_5/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2977 ro_complete_buffered_0/tapered_buf_4/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2978 ro_complete_buffered_0/tapered_buf_4/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2979 ro_complete_buffered_0/tapered_buf_4/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2980 ro_complete_buffered_0/tapered_buf_4/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2981 ro_complete_buffered_0/tapered_buf_4/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2982 ro_complete_buffered_0/tapered_buf_3/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2983 ro_complete_buffered_0/tapered_buf_3/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2984 ro_complete_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2985 ro_complete_buffered_0/tapered_buf_3/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2986 ro_complete_buffered_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2987 ro_complete_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2988 ro_complete_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2989 ro_complete_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2990 ro_complete_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2991 ro_complete_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2992 divider_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2993 divider_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C2994 divider_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C2995 divider_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C2996 divider_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C2997 gpio_noesd[4] ro_complete_buffered_0/tapered_buf_0/out 480.56fF
C2998 divider_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C2999 divider_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3000 divider_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3001 divider_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3002 divider_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3003 divider_buffered_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.74fF
C3004 divider_buffered_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.25fF
C3005 divider_buffered_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.19fF
C3006 divider_buffered_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.93fF
C3007 divider_buffered_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3008 divider_buffered_0/divider_0/Out ro_complete_buffered_0/tapered_buf_0/out 7.61fF
C3009 divider_buffered_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3010 divider_buffered_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3011 divider_buffered_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3012 divider_buffered_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.33fF
C3013 divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3014 divider_buffered_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3015 divider_buffered_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3016 divider_buffered_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3017 divider_buffered_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3018 divider_buffered_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3019 divider_buffered_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.05fF
C3020 divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3021 divider_buffered_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3022 divider_buffered_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF
C3023 divider_buffered_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3024 divider_buffered_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3025 divider_buffered_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3026 divider_buffered_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.04fF
C3027 divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3028 divider_buffered_0/divider_0/clk ro_complete_buffered_0/tapered_buf_0/out 396.07fF
C3029 divider_buffered_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3030 divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF
C3031 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.70fF
C3032 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF
C3033 divider_buffered_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3034 divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3035 divider_buffered_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.62fF
C3036 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3037 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3038 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3039 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3040 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3041 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3042 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3043 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3044 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF
C3045 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3046 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3047 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING
C3048 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3049 divider_buffered_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF
C3050 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3051 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3052 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3053 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING
C3054 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3055 divider_buffered_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3056 divider_buffered_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3057 divider_buffered_0/divider_0/mc2 ro_complete_buffered_0/tapered_buf_0/out 393.27fF
C3058 divider_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3059 divider_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3060 divider_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3061 divider_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3062 divider_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3063 gpio_analog[4] ro_complete_buffered_0/tapered_buf_0/out 113.63fF
C3064 pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.65fF
C3065 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.45fF
C3066 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.35fF
C3067 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.99fF
C3068 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3069 pll_full_buffered2_0/pll_full_0/div ro_complete_buffered_0/tapered_buf_0/out 33.25fF
C3070 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3071 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3072 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3073 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.48fF
C3074 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3075 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3076 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3077 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3078 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3079 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3080 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.12fF
C3081 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3082 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3083 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF
C3084 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3085 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3086 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3087 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.08fF
C3088 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3089 pll_full_buffered2_0/pll_full_0/vco ro_complete_buffered_0/tapered_buf_0/out 35.58fF
C3090 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3091 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF
C3092 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.72fF
C3093 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF
C3094 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3095 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3096 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.67fF
C3097 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3098 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3099 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.19fF
C3100 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3101 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.47fF **FLOATING
C3102 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3103 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3104 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3105 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF
C3106 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3107 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3108 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING
C3109 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3110 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF
C3111 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3112 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3113 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3114 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING
C3115 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3116 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3117 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3118 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.43fF
C3119 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3120 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3121 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3122 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3123 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3124 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3125 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3126 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 5.35fF
C3127 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3128 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 6.54fF
C3129 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3130 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 5.96fF
C3131 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3132 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 5.21fF
C3133 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3134 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 5.81fF
C3135 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3136 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 6.74fF
C3137 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.12fF
C3138 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3139 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3140 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3141 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3142 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3143 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3144 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n5230# ro_complete_buffered_0/tapered_buf_0/out 418.90fF **FLOATING
C3145 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n2998# ro_complete_buffered_0/tapered_buf_0/out 1.39fF **FLOATING
C3146 pll_full_buffered2_0/pll_full_0/cp_0/vbias ro_complete_buffered_0/tapered_buf_0/out 2.41fF
C3147 pll_full_buffered2_0/pll_full_0/cp_0/a_7110_n2840# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING
C3148 pll_full_buffered2_0/pll_full_0/cp_0/a_3060_n2840# ro_complete_buffered_0/tapered_buf_0/out 1.71fF **FLOATING
C3149 pll_full_buffered2_0/pll_full_0/cp_0/a_7110_0# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING
C3150 pll_full_buffered2_0/pll_full_0/cp_0/a_6370_0# ro_complete_buffered_0/tapered_buf_0/out 0.40fF **FLOATING
C3151 pll_full_buffered2_0/pll_full_0/cp_0/a_3060_0# ro_complete_buffered_0/tapered_buf_0/out 2.50fF **FLOATING
C3152 pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# ro_complete_buffered_0/tapered_buf_0/out 7.47fF **FLOATING
C3153 pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# ro_complete_buffered_0/tapered_buf_0/out 2.96fF **FLOATING
C3154 pll_full_buffered2_0/pll_full_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 4.55fF
C3155 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF
C3156 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF
C3157 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C3158 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C3159 pll_full_buffered2_0/pll_full_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF
C3160 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF
C3161 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C3162 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C3163 pll_full_buffered2_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_0/out 25.17fF
C3164 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3165 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C3166 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C3167 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C3168 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF
C3169 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C3170 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C3171 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3172 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C3173 pll_full_buffered2_0/pll_full_0/ref ro_complete_buffered_0/tapered_buf_0/out 390.59fF
C3174 pll_full_buffered2_0/pll_full_0/cp_0/upbar ro_complete_buffered_0/tapered_buf_0/out 35.09fF
C3175 pll_full_buffered2_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3176 pll_full_buffered2_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3177 pll_full_buffered2_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3178 pll_full_buffered2_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3179 pll_full_buffered2_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3180 io_analog[10] ro_complete_buffered_0/tapered_buf_0/out 463.13fF
C3181 pll_full_buffered2_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 619.27fF
C3182 pll_full_buffered2_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3183 pll_full_buffered2_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3184 pll_full_buffered2_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3185 pll_full_buffered2_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3186 io_analog[9] ro_complete_buffered_0/tapered_buf_0/out 1827.47fF
C3187 gpio_noesd[7] ro_complete_buffered_0/tapered_buf_0/out 657.51fF
C3188 pll_full_buffered2_0/tapered_buf_5/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3189 pll_full_buffered2_0/tapered_buf_5/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3190 pll_full_buffered2_0/tapered_buf_5/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3191 pll_full_buffered2_0/tapered_buf_5/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3192 pll_full_buffered2_0/tapered_buf_5/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3193 pll_full_buffered2_0/tapered_buf_5/in ro_complete_buffered_0/tapered_buf_0/out 4.76fF
C3194 pll_full_buffered2_0/tapered_buf_4/out ro_complete_buffered_0/tapered_buf_0/out 385.89fF
C3195 pll_full_buffered2_0/tapered_buf_4/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3196 pll_full_buffered2_0/tapered_buf_4/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3197 pll_full_buffered2_0/tapered_buf_4/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3198 pll_full_buffered2_0/tapered_buf_4/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3199 pll_full_buffered2_0/tapered_buf_4/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3200 pll_full_buffered2_0/tapered_buf_4/in ro_complete_buffered_0/tapered_buf_0/out 2.90fF
C3201 pll_full_buffered2_0/tapered_buf_3/out ro_complete_buffered_0/tapered_buf_0/out 385.95fF
C3202 pll_full_buffered2_0/tapered_buf_3/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3203 pll_full_buffered2_0/tapered_buf_3/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3204 pll_full_buffered2_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3205 pll_full_buffered2_0/tapered_buf_3/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3206 pll_full_buffered2_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3207 gpio_noesd[8] ro_complete_buffered_0/tapered_buf_0/out 592.83fF
C3208 pll_full_buffered2_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3209 pll_full_buffered2_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3210 pll_full_buffered2_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3211 pll_full_buffered2_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3212 pll_full_buffered2_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3213 ro_divider_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3214 ro_divider_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3215 ro_divider_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3216 ro_divider_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3217 ro_divider_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3218 gpio_noesd[5] ro_complete_buffered_0/tapered_buf_0/out 466.66fF
C3219 ro_divider_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3220 ro_divider_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3221 ro_divider_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3222 ro_divider_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3223 ro_divider_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3224 ro_divider_buffered_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.74fF
C3225 ro_divider_buffered_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.25fF
C3226 ro_divider_buffered_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.19fF
C3227 ro_divider_buffered_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.93fF
C3228 ro_divider_buffered_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3229 ro_divider_buffered_0/divider_0/Out ro_complete_buffered_0/tapered_buf_0/out 15.49fF
C3230 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3231 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3232 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3233 ro_divider_buffered_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.33fF
C3234 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3235 ro_divider_buffered_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3236 ro_divider_buffered_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3237 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3238 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3239 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3240 ro_divider_buffered_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.05fF
C3241 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3242 ro_divider_buffered_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3243 ro_divider_buffered_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF
C3244 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3245 ro_divider_buffered_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3246 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3247 ro_divider_buffered_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.04fF
C3248 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3249 ro_divider_buffered_0/divider_0/clk ro_complete_buffered_0/tapered_buf_0/out 23.46fF
C3250 ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3251 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF
C3252 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.69fF
C3253 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF
C3254 ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3255 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3256 ro_divider_buffered_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.62fF
C3257 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3258 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3259 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3260 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3261 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3262 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3263 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3264 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3265 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF
C3266 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3267 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3268 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING
C3269 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3270 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF
C3271 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3272 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3273 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3274 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING
C3275 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3276 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3277 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3278 ro_divider_buffered_0/divider_0/mc2 ro_complete_buffered_0/tapered_buf_0/out 397.55fF
C3279 ro_divider_buffered_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.53fF
C3280 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3281 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3282 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3283 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3284 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3285 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3286 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3287 ro_divider_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 416.44fF
C3288 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3289 ro_divider_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 412.08fF
C3290 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3291 ro_divider_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 402.75fF
C3292 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3293 ro_divider_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 407.11fF
C3294 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3295 ro_divider_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 398.91fF
C3296 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3297 ro_divider_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 395.69fF
C3298 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.13fF
C3299 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3300 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3301 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3302 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3303 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3304 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3305 ro_divider_buffered_0/tapered_buf_8/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3306 ro_divider_buffered_0/tapered_buf_8/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3307 ro_divider_buffered_0/tapered_buf_8/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3308 ro_divider_buffered_0/tapered_buf_8/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3309 ro_divider_buffered_0/tapered_buf_8/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3310 io_analog[8] ro_complete_buffered_0/tapered_buf_0/out 459.92fF
C3311 ro_divider_buffered_0/tapered_buf_7/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3312 ro_divider_buffered_0/tapered_buf_7/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3313 ro_divider_buffered_0/tapered_buf_7/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3314 ro_divider_buffered_0/tapered_buf_7/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3315 ro_divider_buffered_0/tapered_buf_7/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3316 io_analog[7] ro_complete_buffered_0/tapered_buf_0/out 410.14fF
C3317 ro_divider_buffered_0/tapered_buf_6/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3318 ro_divider_buffered_0/tapered_buf_6/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3319 ro_divider_buffered_0/tapered_buf_6/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3320 ro_divider_buffered_0/tapered_buf_6/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3321 ro_divider_buffered_0/tapered_buf_6/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3322 io_analog[6] ro_complete_buffered_0/tapered_buf_0/out 371.89fF
C3323 ro_divider_buffered_0/tapered_buf_5/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3324 ro_divider_buffered_0/tapered_buf_5/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3325 ro_divider_buffered_0/tapered_buf_5/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3326 ro_divider_buffered_0/tapered_buf_5/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3327 ro_divider_buffered_0/tapered_buf_5/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3328 io_analog[5] ro_complete_buffered_0/tapered_buf_0/out 328.14fF
C3329 ro_divider_buffered_0/tapered_buf_4/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3330 ro_divider_buffered_0/tapered_buf_4/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3331 ro_divider_buffered_0/tapered_buf_4/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3332 ro_divider_buffered_0/tapered_buf_4/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3333 ro_divider_buffered_0/tapered_buf_4/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3334 io_analog[4] ro_complete_buffered_0/tapered_buf_0/out 241.52fF
C3335 ro_divider_buffered_0/tapered_buf_3/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3336 ro_divider_buffered_0/tapered_buf_3/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3337 ro_divider_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3338 ro_divider_buffered_0/tapered_buf_3/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3339 ro_divider_buffered_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3340 io_analog[3] ro_complete_buffered_0/tapered_buf_0/out 151.14fF
C3341 ro_divider_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 619.27fF
C3342 ro_divider_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3343 ro_divider_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3344 ro_divider_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3345 ro_divider_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3346 gpio_analog[5] ro_complete_buffered_0/tapered_buf_0/out 109.76fF
C3347 gpio_analog[17] ro_complete_buffered_0/tapered_buf_0/out 525.65fF
C3348 filter_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3349 filter_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3350 filter_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3351 filter_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3352 filter_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3353 filter_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3354 filter_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3355 filter_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3356 filter_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3357 filter_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3358 filter_buffered_0/filter_0/v ro_complete_buffered_0/tapered_buf_0/out 476.79fF
C3359 filter_buffered_0/filter_0/a_4216_n5230# ro_complete_buffered_0/tapered_buf_0/out 418.47fF **FLOATING
C3360 filter_buffered_0/filter_0/a_4216_n2998# ro_complete_buffered_0/tapered_buf_0/out 1.03fF **FLOATING
C3361 cp_buffered_0/cp_0/down ro_complete_buffered_0/tapered_buf_0/out 397.14fF
C3362 cp_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3363 cp_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3364 cp_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3365 cp_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3366 cp_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3367 gpio_analog[8] ro_complete_buffered_0/tapered_buf_0/out 86.34fF
C3368 gpio_noesd[9] ro_complete_buffered_0/tapered_buf_0/out 503.64fF
C3369 cp_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3370 cp_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3371 cp_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3372 cp_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3373 cp_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3374 cp_buffered_0/cp_0/out ro_complete_buffered_0/tapered_buf_0/out 11.85fF
C3375 cp_buffered_0/cp_0/upbar ro_complete_buffered_0/tapered_buf_0/out 393.41fF
C3376 cp_buffered_0/cp_0/a_7110_n2840# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING
C3377 cp_buffered_0/cp_0/a_3060_n2840# ro_complete_buffered_0/tapered_buf_0/out 1.71fF **FLOATING
C3378 cp_buffered_0/cp_0/a_7110_0# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING
C3379 cp_buffered_0/cp_0/a_6370_0# ro_complete_buffered_0/tapered_buf_0/out 0.40fF **FLOATING
C3380 cp_buffered_0/cp_0/a_3060_0# ro_complete_buffered_0/tapered_buf_0/out 1.65fF **FLOATING
C3381 cp_buffered_0/cp_0/a_1710_0# ro_complete_buffered_0/tapered_buf_0/out 5.76fF **FLOATING
C3382 cp_buffered_0/cp_0/a_1710_n2840# ro_complete_buffered_0/tapered_buf_0/out 5.24fF **FLOATING
C3383 cp_buffered_0/cp_0/a_10_n50# ro_complete_buffered_0/tapered_buf_0/out 3.19fF **FLOATING
C3384 cp_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3385 cp_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3386 cp_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3387 cp_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3388 cp_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3389 gpio_analog[7] ro_complete_buffered_0/tapered_buf_0/out 67.87fF
C3390 gpio_noesd[11] ro_complete_buffered_0/tapered_buf_0/out 514.13fF
C3391 pd_buffered_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3392 pd_buffered_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3393 pd_buffered_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3394 pd_buffered_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3395 pd_buffered_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3396 pd_buffered_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3397 pd_buffered_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3398 pd_buffered_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3399 pd_buffered_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3400 pd_buffered_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3401 gpio_analog[9] ro_complete_buffered_0/tapered_buf_0/out 74.98fF
C3402 pd_buffered_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 5.76fF
C3403 pd_buffered_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF
C3404 pd_buffered_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF
C3405 pd_buffered_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C3406 pd_buffered_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C3407 pd_buffered_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF
C3408 pd_buffered_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF
C3409 pd_buffered_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C3410 pd_buffered_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C3411 pd_buffered_0/pd_0/DOWN ro_complete_buffered_0/tapered_buf_0/out 8.46fF
C3412 pd_buffered_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3413 pd_buffered_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C3414 pd_buffered_0/pd_0/DIV ro_complete_buffered_0/tapered_buf_0/out 390.67fF
C3415 pd_buffered_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C3416 pd_buffered_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C3417 pd_buffered_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF
C3418 pd_buffered_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C3419 pd_buffered_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C3420 pd_buffered_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3421 pd_buffered_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C3422 pd_buffered_0/pd_0/REF ro_complete_buffered_0/tapered_buf_0/out 388.56fF
C3423 pd_buffered_0/tapered_buf_3/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3424 pd_buffered_0/tapered_buf_3/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3425 pd_buffered_0/tapered_buf_3/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3426 pd_buffered_0/tapered_buf_3/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3427 pd_buffered_0/tapered_buf_3/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3428 gpio_noesd[10] ro_complete_buffered_0/tapered_buf_0/out 487.93fF
C3429 pd_buffered_0/tapered_buf_2/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3430 pd_buffered_0/tapered_buf_2/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3431 pd_buffered_0/tapered_buf_2/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3432 pd_buffered_0/tapered_buf_2/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3433 pd_buffered_0/tapered_buf_2/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3434 ashish_0/b ro_complete_buffered_0/tapered_buf_0/out 3.76fF
C3435 ashish_0/a ro_complete_buffered_0/tapered_buf_0/out 1.43fF
C3436 io_analog[0] ro_complete_buffered_0/tapered_buf_0/out 49.99fF
C3437 io_analog[1] ro_complete_buffered_0/tapered_buf_0/out 34.21fF
C3438 gpio_analog[3] ro_complete_buffered_0/tapered_buf_0/out 235.46fF
C3439 pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.65fF
C3440 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.45fF
C3441 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.35fF
C3442 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.99fF
C3443 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3444 pll_full_buffered1_0/pll_full_0/div ro_complete_buffered_0/tapered_buf_0/out 15.26fF
C3445 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3446 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3447 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3448 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.48fF
C3449 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3450 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3451 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3452 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3453 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3454 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3455 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.12fF
C3456 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3457 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3458 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF
C3459 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3460 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3461 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3462 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.08fF
C3463 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING
C3464 pll_full_buffered1_0/pll_full_0/vco ro_complete_buffered_0/tapered_buf_0/out 45.00fF
C3465 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3466 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF
C3467 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.72fF
C3468 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF
C3469 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF
C3470 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF
C3471 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.67fF
C3472 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3473 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3474 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.19fF
C3475 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3476 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.47fF **FLOATING
C3477 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3478 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3479 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3480 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF
C3481 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3482 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING
C3483 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING
C3484 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF
C3485 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF
C3486 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF
C3487 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF
C3488 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF
C3489 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING
C3490 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING
C3491 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3492 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3493 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.43fF
C3494 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3495 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3496 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3497 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3498 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3499 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3500 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3501 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 5.35fF
C3502 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3503 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 6.54fF
C3504 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3505 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 5.96fF
C3506 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3507 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 5.21fF
C3508 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3509 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 5.81fF
C3510 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3511 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 6.74fF
C3512 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.12fF
C3513 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF
C3514 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF
C3515 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF
C3516 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF
C3517 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF
C3518 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF
C3519 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n5230# ro_complete_buffered_0/tapered_buf_0/out 418.90fF **FLOATING
C3520 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n2998# ro_complete_buffered_0/tapered_buf_0/out 1.39fF **FLOATING
C3521 pll_full_buffered1_0/pll_full_0/cp_0/vbias ro_complete_buffered_0/tapered_buf_0/out 2.41fF
C3522 pll_full_buffered1_0/pll_full_0/cp_0/a_7110_n2840# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING
C3523 pll_full_buffered1_0/pll_full_0/cp_0/a_3060_n2840# ro_complete_buffered_0/tapered_buf_0/out 1.71fF **FLOATING
C3524 pll_full_buffered1_0/pll_full_0/cp_0/a_7110_0# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING
C3525 pll_full_buffered1_0/pll_full_0/cp_0/a_6370_0# ro_complete_buffered_0/tapered_buf_0/out 0.40fF **FLOATING
C3526 pll_full_buffered1_0/pll_full_0/cp_0/a_3060_0# ro_complete_buffered_0/tapered_buf_0/out 2.50fF **FLOATING
C3527 pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# ro_complete_buffered_0/tapered_buf_0/out 7.47fF **FLOATING
C3528 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# ro_complete_buffered_0/tapered_buf_0/out 2.96fF **FLOATING
C3529 pll_full_buffered1_0/pll_full_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 4.55fF
C3530 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF
C3531 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF
C3532 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C3533 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C3534 pll_full_buffered1_0/pll_full_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF
C3535 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF
C3536 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C3537 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C3538 pll_full_buffered1_0/pll_full_0/pd_0/DOWN ro_complete_buffered_0/tapered_buf_0/out 7.30fF
C3539 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3540 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C3541 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF
C3542 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF
C3543 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF
C3544 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF
C3545 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF
C3546 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF
C3547 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF
C3548 pll_full_buffered1_0/pll_full_0/ref ro_complete_buffered_0/tapered_buf_0/out 391.17fF
C3549 pll_full_buffered1_0/pll_full_0/cp_0/upbar ro_complete_buffered_0/tapered_buf_0/out 14.90fF
C3550 pll_full_buffered1_0/tapered_buf_0/in5 ro_complete_buffered_0/tapered_buf_0/out 619.27fF
C3551 pll_full_buffered1_0/tapered_buf_0/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3552 pll_full_buffered1_0/tapered_buf_0/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3553 pll_full_buffered1_0/tapered_buf_0/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3554 pll_full_buffered1_0/tapered_buf_0/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3555 pll_full_buffered1_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 1.38fF
C3556 pll_full_buffered1_0/tapered_buf_1/in5 ro_complete_buffered_0/tapered_buf_0/out 592.97fF
C3557 pll_full_buffered1_0/tapered_buf_1/in4 ro_complete_buffered_0/tapered_buf_0/out 252.41fF
C3558 pll_full_buffered1_0/tapered_buf_1/in3 ro_complete_buffered_0/tapered_buf_0/out 63.61fF
C3559 pll_full_buffered1_0/tapered_buf_1/in2 ro_complete_buffered_0/tapered_buf_0/out 16.76fF
C3560 pll_full_buffered1_0/tapered_buf_1/in1 ro_complete_buffered_0/tapered_buf_0/out 4.58fF
C3561 gpio_noesd[14] ro_complete_buffered_0/tapered_buf_0/out 950.03fF
C3562 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in5 ro_complete_buffered_0/tapered_buf_0/out 599.07fF
C3563 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in4 ro_complete_buffered_0/tapered_buf_0/out 256.17fF
C3564 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in3 ro_complete_buffered_0/tapered_buf_0/out 83.14fF
C3565 pll_full_buffered1_0/DIGITAL_BUFFER_v1_0/in1 ro_complete_buffered_0/tapered_buf_0/out 5.32fF
.ends