diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
deleted file mode 100644
index 79162ae..0000000
--- a/gds/user_analog_project_wrapper.gds
+++ /dev/null
Binary files differ
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz
new file mode 100644
index 0000000..9d9deea
--- /dev/null
+++ b/gds/user_analog_project_wrapper.gds.gz
Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 022af29..3ad49ce 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,10 +1,2938 @@
 magic
 tech sky130A
-timestamp 1644267365
+timestamp 1644270303
 << nwell >>
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 << nsubdiff >>
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 << psubdiffcont >>
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 << viali >>
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 << metal1 >>
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 << via1 >>
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 rect 229206 260070 231073 261120
-rect 156887 248836 159424 253620
+rect 156673 258648 159444 259137
+rect 156673 257821 159440 258648
+rect 157052 256386 159440 257821
+rect 157052 253620 159393 256386
+rect 156887 250449 159424 253620
+rect 156887 250437 159475 250449
+rect 156763 249945 159475 250437
+rect 156734 246534 159475 249945
 rect 122960 245000 130971 245011
-rect 157052 245000 159393 248836
+rect 156734 245000 159623 246534
 rect 9000 243072 274000 245000
 rect 9000 243000 226843 243072
 rect 234785 243000 239793 243072
 rect 26157 241019 27614 243000
 rect 122960 242990 130971 243000
-rect 26157 241014 27403 241019
-rect 26157 240838 27170 241014
-rect 27341 240843 27403 241014
-rect 27574 240843 27614 241019
-rect 27341 240838 27614 240843
-rect 26157 238592 27614 240838
-rect 26157 238416 27144 238592
-rect 27315 238416 27403 238592
-rect 27574 238416 27614 238592
-rect 26157 236134 27614 238416
-rect 26157 235958 27109 236134
-rect 27280 236130 27614 236134
-rect 27280 235958 27376 236130
-rect 26157 235954 27376 235958
-rect 27547 235954 27614 236130
-rect 26157 233961 27614 235954
-rect 26157 233785 27061 233961
-rect 27232 233785 27346 233961
-rect 27517 233785 27614 233961
-rect 26157 233383 27614 233785
-rect 157052 227000 159393 243000
+rect 156655 241296 159623 243000
 rect 242462 242271 243000 243072
 rect 247735 243000 274000 243072
 rect 242462 242153 242652 242271
@@ -7045,6 +15532,36 @@
 rect 242462 241821 242651 241939
 rect 242786 241821 243000 241939
 rect 242462 241804 243000 241821
+rect 26157 241014 27403 241019
+rect 26157 240838 27170 241014
+rect 27341 240843 27403 241014
+rect 27574 240843 27614 241019
+rect 27341 240838 27614 240843
+rect 26157 238592 27614 240838
+rect 156596 239900 159623 241296
+rect 26157 238416 27144 238592
+rect 27315 238416 27403 238592
+rect 27574 238416 27614 238592
+rect 26157 236134 27614 238416
+rect 26157 235958 27109 236134
+rect 27280 236130 27614 236134
+rect 27280 235958 27376 236130
+rect 26157 235954 27376 235958
+rect 27547 235954 27614 236130
+rect 26157 233961 27614 235954
+rect 156763 239446 159623 239900
+rect 156763 234883 159475 239446
+rect 26157 233785 27061 233961
+rect 27232 233785 27346 233961
+rect 27517 233785 27614 233961
+rect 26157 233383 27614 233785
+rect 156704 234394 159475 234883
+rect 156704 233567 159471 234394
+rect 157052 233402 159471 233567
+rect 157052 230638 159393 233402
+rect 156887 230093 159393 230638
+rect 156887 229679 159394 230093
+rect 156858 227000 159445 229679
 rect 10000 225511 275000 227000
 rect 10000 225389 36608 225511
 rect 36727 225389 275000 225511
@@ -7055,8 +15572,20 @@
 rect 10000 225022 36608 225144
 rect 36727 225022 275000 225144
 rect 10000 225000 275000 225022
-rect 157052 211754 159393 225000
-rect 156878 202843 159465 211754
+rect 157052 224776 159393 225000
+rect 156867 223817 159393 224776
+rect 156838 221025 159425 223817
+rect 157052 213295 159393 221025
+rect 156907 212168 159393 213295
+rect 156907 211754 159414 212168
+rect 156878 205038 159465 211754
+rect 156799 203105 159465 205038
+rect 156740 202843 159465 203105
+rect 156740 201709 159393 202843
+rect 156907 196692 159393 201709
+rect 156848 194275 159393 196692
+rect 156848 193861 159401 194275
+rect 156848 193531 159452 193861
 rect 27342 187275 28458 187920
 rect 27342 187145 27672 187275
 rect 27843 187271 28458 187275
@@ -7064,7 +15593,9 @@
 rect 27342 187141 27936 187145
 rect 28107 187141 28236 187271
 rect 28407 187141 28458 187271
+rect 156865 187145 159452 193531
 rect 27342 184893 28458 187141
+rect 156786 185212 159452 187145
 rect 27342 184763 27728 184893
 rect 27899 184888 28223 184893
 rect 27899 184763 27987 184888
@@ -7073,6 +15604,8 @@
 rect 28394 184763 28458 184893
 rect 28158 184758 28458 184763
 rect 27342 182427 28458 184758
+rect 156727 184950 159452 185212
+rect 156727 183816 159393 184950
 rect 27342 182297 27751 182427
 rect 27922 182297 27982 182427
 rect 28153 182297 28227 182427
@@ -7083,9 +15616,15 @@
 rect 28130 180039 28209 180169
 rect 28380 180039 28458 180169
 rect 27342 177000 28458 180039
-rect 157052 177000 159393 202843
-rect 12000 175000 277000 177000
+rect 156894 178799 159393 183816
+rect 156835 177000 159393 178799
+rect 12000 175016 277000 177000
+rect 12000 175000 58627 175016
+rect 61148 175000 277000 175016
 rect 27364 171169 28450 175000
+rect 156688 174818 159393 175000
+rect 156609 172885 159393 174818
+rect 156550 171489 159393 172885
 rect 27362 170817 28452 171169
 rect 27362 170816 28218 170817
 rect 27362 170624 27924 170816
@@ -7093,7 +15632,9 @@
 rect 28400 170625 28452 170817
 rect 28106 170624 28452 170625
 rect 27362 170528 28452 170624
-rect 157052 160826 159393 175000
+rect 156717 166472 159393 171489
+rect 156658 164985 159393 166472
+rect 157052 160826 159393 164985
 rect 156835 158070 159825 160826
 rect 157052 155993 159393 158070
 rect 157052 153237 160110 155993
@@ -7177,6 +15718,7 @@
 rect 157052 50000 159393 50746
 rect 11000 48000 276000 50000
 rect 22603 45664 25872 48000
+rect 157052 45727 159393 48000
 rect 22603 45662 24978 45664
 rect 22603 45659 24694 45662
 rect 22603 45655 24430 45659
@@ -7197,7 +15739,30 @@
 rect 22603 45529 25709 45531
 rect 25833 45529 25872 45653
 rect 22603 44698 25872 45529
-rect 157052 4597 159393 48000
+rect 157036 45476 159393 45727
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+rect 156432 43049 159705 43939
+rect 157036 42901 159393 43049
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+rect 157052 9561 159393 14227
+rect 156491 8024 159705 9561
+rect 156432 7134 159705 8024
+rect 157052 6011 159393 7134
 << comment >>
 rect -50 352000 292050 352050
 rect -50 0 0 352000
@@ -7212,15 +15777,15 @@
 transform 1 0 27511 0 1 45357
 box -460 -1085 31200 495
 use pd  pd_5
-timestamp 1644265269
+timestamp 1644268929
 transform 1 0 38673 0 1 170517
 box -215 -855 1685 810
 use divider  divider_3
-timestamp 1643097770
+timestamp 1644268929
 transform 1 0 31863 0 1 169542
 box -490 -235 4690 2150
 use divider  divider_0
-timestamp 1643097770
+timestamp 1644268929
 transform 1 0 246803 0 1 129340
 box -490 -235 4690 2150
 use divbuf  divbuf_25
@@ -7252,7 +15817,7 @@
 transform 1 0 30286 0 1 179927
 box -460 -1085 31200 495
 use pd  pd_4
-timestamp 1644265269
+timestamp 1644268929
 transform 1 0 36668 0 1 222858
 box -215 -855 1685 810
 use cp  cp_0
@@ -7280,11 +15845,11 @@
 transform 1 0 28673 0 1 263178
 box -460 -1085 31200 495
 use ro_complete  ro_complete_0
-timestamp 1643097770
+timestamp 1644268929
 transform 1 0 242309 0 1 239846
 box -348 -5690 4661 1440
 use divider  divider_1
-timestamp 1643097770
+timestamp 1644268929
 transform 1 0 250269 0 1 235475
 box -490 -235 4690 2150
 use divbuf  divbuf_21
@@ -7320,11 +15885,11 @@
 transform 1 0 245938 0 1 311543
 box -460 -1085 31200 495
 use pll_full  pll_full_1
-timestamp 1643097770
+timestamp 1644268929
 transform 1 0 31292 0 1 318138
 box -5794 -2690 26430 12835
 use ro_complete  ro_complete_1
-timestamp 1643097770
+timestamp 1644268929
 transform 1 0 247313 0 1 328719
 box -348 -5690 4661 1440
 use divbuf  divbuf_2
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 6e767ba..d2e28fb 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -106,1671 +106,1671 @@
 + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
 + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
 + wbs_stb_i wbs_we_i
-C0 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
-C1 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
-C2 divbuf_16/OUT5 divbuf_16/IN 0.00fF
-C3 divbuf_6/OUT divbuf_7/OUT 2.98fF
-C4 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C5 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
-C6 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C7 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
-C8 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
-C9 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_0/B 0.38fF
-C10 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
-C11 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C12 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C13 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
-C14 divbuf_19/OUT4 divbuf_19/OUT 1.11fF
-C15 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
-C16 divider_1/nor_1/B divider_1/tspc_1/Q 0.22fF
-C17 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
-C18 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
-C19 divider_1/nor_0/A divider_1/and_0/A 0.01fF
-C20 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
-C21 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
-C22 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
-C23 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
-C24 divbuf_3/OUT divbuf_3/OUT2 0.06fF
-C25 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C26 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
-C27 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
-C28 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C29 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
-C30 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
-C31 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C32 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C33 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C34 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
-C35 divbuf_22/IN divbuf_22/OUT5 0.00fF
-C36 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
-C37 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
-C38 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
-C39 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
-C40 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C41 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C42 divider_0/tspc_2/Q divider_0/tspc_1/Z1 0.01fF
-C43 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
-C44 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C45 divbuf_5/OUT divbuf_5/OUT2 0.06fF
-C46 divider_0/nor_0/B divider_0/and_0/A 0.26fF
-C47 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C48 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
-C49 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF
-C50 divbuf_16/OUT2 divbuf_16/OUT3 1.37fF
-C51 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
-C52 pd_0/R pd_0/UP 0.45fF
-C53 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
-C54 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
-C55 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
-C56 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
-C57 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
-C58 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
-C59 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C60 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
-C61 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
-C62 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C63 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF
-C64 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C65 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
-C66 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
-C67 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
-C68 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
-C69 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
-C70 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
-C71 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
-C72 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
-C73 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/a_492_n240# 0.42fF
-C74 divbuf_14/IN divbuf_14/OUT5 0.00fF
-C75 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
-C76 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
-C77 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
-C78 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
-C79 divider_0/and_0/A divider_0/and_0/B 0.18fF
-C80 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C81 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_740_n680# 0.21fF
-C82 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
-C83 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C84 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
-C85 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
-C86 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
-C87 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
-C88 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
-C89 divbuf_9/IN divbuf_9/OUT5 0.00fF
-C90 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF
-C91 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
-C92 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
-C93 divbuf_0/OUT divbuf_0/OUT4 1.11fF
-C94 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF
-C95 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C96 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
-C97 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
-C98 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C99 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF
-C100 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
-C101 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
-C102 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
-C103 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
-C104 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
-C105 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
-C106 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
-C107 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C108 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C109 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
-C110 divider_2/mc2 divider_2/and_0/A 0.16fF
-C111 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C112 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
-C113 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
-C114 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
-C115 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
-C116 divbuf_14/OUT divbuf_14/OUT2 0.06fF
-C117 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
-C118 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C119 divbuf_2/IN divbuf_2/OUT5 0.00fF
-C120 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C121 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
-C122 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
-C123 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C124 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
-C125 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
-C126 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
-C127 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
-C128 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
-C129 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
-C130 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C131 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
-C132 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
-C133 divider_1/and_0/OUT divider_1/clk 0.04fF
-C134 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
-C135 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C136 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
-C137 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
-C138 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
-C139 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
-C140 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
-C141 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
-C142 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
-C143 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C144 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C145 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
-C146 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF
-C147 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF
-C148 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
-C149 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
-C150 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.51fF
-C151 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C152 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
-C153 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
-C154 divbuf_18/OUT4 divbuf_18/OUT5 20.26fF
-C155 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
-C156 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
-C157 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
-C158 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
-C159 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
-C160 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
-C161 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C162 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
-C163 divbuf_19/a_492_n240# divbuf_19/IN 0.13fF
-C164 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
-C165 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
-C166 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
-C167 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
-C168 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
-C169 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C170 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C171 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
-C172 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
-C173 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
-C174 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
-C175 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
-C176 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
-C177 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
-C178 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C179 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
-C180 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF
-C181 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
-C182 divbuf_5/OUT divbuf_5/OUT4 1.11fF
-C183 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C184 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C185 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
-C186 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
-C187 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
-C188 divider_1/nor_0/B divider_1/and_0/A 0.26fF
-C189 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
-C190 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
-C191 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
-C192 divider_2/nor_0/A divider_2/and_0/B 0.08fF
-C193 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
-C194 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
-C195 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C196 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
-C197 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
-C198 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
-C199 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
-C200 io_clamp_high[2] io_analog[6] 0.53fF
-C201 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
-C202 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
-C203 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF
-C204 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
-C205 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
-C206 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
-C207 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C208 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C209 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
-C210 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
-C211 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
-C212 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
-C213 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
-C214 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
-C215 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
-C216 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
-C217 divider_0/mc2 divider_0/and_0/A 0.16fF
-C218 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
-C219 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C220 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C221 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
-C222 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
-C223 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
-C224 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
-C225 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
-C226 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C227 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
-C228 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
-C229 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
-C230 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
-C231 divider_1/and_0/A divider_1/and_0/B 0.18fF
-C232 pd_1/tspc_r_1/Qbar pd_1/UP 0.21fF
-C233 divider_2/tspc_0/a_630_n680# divider_2/Out 0.04fF
-C234 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
-C235 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
-C236 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
-C237 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
-C238 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
-C239 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C240 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C241 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
-C242 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
-C243 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C244 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
-C245 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
-C246 divbuf_1/OUT divbuf_1/OUT4 1.11fF
-C247 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
-C248 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
-C249 divider_1/mc2 divider_1/nor_1/B 0.15fF
-C250 divbuf_7/OUT divbuf_7/OUT3 0.26fF
-C251 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
-C252 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
-C253 filter_0/v divbuf_25/a_492_n240# 0.00fF
-C254 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
-C255 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C256 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
-C257 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
-C258 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
-C259 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
-C260 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
-C261 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF
-C262 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
-C263 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
-C264 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF
-C265 divider_0/tspc_2/Q divider_0/nor_0/B 0.22fF
-C266 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
-C267 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
-C268 divider_1/nor_1/B divider_1/tspc_0/Z1 0.03fF
-C269 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
-C270 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
-C271 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
-C272 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
-C273 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C274 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
-C275 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
-C276 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
-C277 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
-C278 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
-C279 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
-C280 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
-C281 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
-C282 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
-C283 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF
-C284 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
-C285 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
-C286 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
-C287 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
-C288 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF
-C289 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
-C290 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
-C291 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
-C292 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C293 divbuf_16/OUT divbuf_16/a_492_n240# 0.00fF
-C294 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
-C295 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
-C296 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_0/B 0.02fF
-C297 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
-C298 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C299 filter_0/v divbuf_25/OUT5 43.38fF
-C300 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
-C301 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
-C302 pd_1/tspc_r_1/Z2 pd_1/R 0.21fF
-C303 divbuf_19/OUT divbuf_19/OUT2 0.06fF
-C304 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C305 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
-C306 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
-C307 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C308 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
-C309 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
-C310 divbuf_19/a_492_n240# divbuf_19/OUT 0.00fF
-C311 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
-C312 divider_1/nor_1/B divider_1/tspc_0/Z3 0.38fF
-C313 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
-C314 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
-C315 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
-C316 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C317 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z2 0.16fF
-C318 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C319 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C320 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
-C321 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
-C322 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
-C323 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
-C324 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
-C325 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
-C326 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
-C327 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
-C328 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
-C329 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
-C330 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
-C331 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
-C332 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
-C333 divider_2/nor_1/B divider_2/mc2 0.15fF
-C334 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
-C335 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
-C336 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C337 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
-C338 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
-C339 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
-C340 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
-C341 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
-C342 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
-C343 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C344 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
-C345 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
-C346 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
-C347 io_clamp_low[1] io_analog[5] 0.53fF
-C348 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C349 divider_2/nor_1/B divider_2/tspc_0/Z2 0.40fF
-C350 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
-C351 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
-C352 divider_2/nor_1/B divider_2/tspc_0/Z4 0.22fF
-C353 divider_1/tspc_1/Z1 divider_1/nor_0/B 0.03fF
-C354 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF
-C355 divider_1/nor_1/B divider_1/tspc_0/Z2 0.40fF
-C356 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
-C357 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
-C358 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
-C359 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C360 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C361 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
-C362 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
-C363 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
-C364 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
-C365 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
-C366 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
-C367 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
-C368 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
-C369 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C370 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF
-C371 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
-C372 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C373 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C374 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
-C375 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
-C376 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
-C377 divbuf_10/IN divbuf_10/OUT5 0.00fF
-C378 divider_1/mc2 divider_1/and_0/out1 0.06fF
-C379 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF
-C380 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
-C381 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
-C382 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C383 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C384 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
-C385 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
-C386 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
-C387 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
-C388 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
-C389 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
-C390 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C391 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C392 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF
-C393 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF
-C394 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
-C395 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C396 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
-C397 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF
-C398 divbuf_3/OUT divbuf_3/OUT3 0.26fF
-C399 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
-C400 divbuf_16/OUT5 divbuf_16/OUT2 0.02fF
-C401 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
-C402 divbuf_7/OUT divbuf_7/OUT5 43.38fF
-C403 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
-C404 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
-C405 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
-C406 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
-C407 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
-C408 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
-C409 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
-C410 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
-C411 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
-C412 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
-C413 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
-C414 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C415 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
-C416 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
-C417 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
-C418 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
-C419 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C420 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.00fF
-C421 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
-C422 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
-C423 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C424 pd_0/R pd_0/and_pd_0/Z1 0.02fF
-C425 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
-C426 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C427 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
-C428 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
-C429 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
-C430 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C431 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
-C432 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
-C433 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
-C434 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
-C435 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
-C436 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C437 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
-C438 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
-C439 divbuf_11/IN divbuf_11/OUT5 0.00fF
-C440 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
-C441 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
-C442 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
-C443 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
-C444 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
-C445 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
-C446 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C447 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C448 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
-C449 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
-C450 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C451 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
-C452 pd_0/DIV pd_0/R 0.51fF
-C453 divbuf_18/IN divbuf_18/OUT5 0.00fF
-C454 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C455 pd_1/R pd_1/and_pd_0/Out1 0.33fF
-C456 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
-C457 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
-C458 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
-C459 divbuf_4/OUT divbuf_2/OUT 1.95fF
-C460 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
-C461 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C462 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
-C463 divider_0/nor_1/B divider_0/tspc_0/Z1 0.03fF
-C464 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
-C465 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
-C466 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
-C467 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
-C468 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
-C469 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C470 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
-C471 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
-C472 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
-C473 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
-C474 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
-C475 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
-C476 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
-C477 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
-C478 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
-C479 divbuf_14/OUT divbuf_14/OUT5 43.38fF
-C480 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
-C481 divider_2/tspc_1/Q divider_2/tspc_0/Z2 0.14fF
-C482 divbuf_6/OUT divbuf_6/OUT2 0.06fF
-C483 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
-C484 divider_2/tspc_1/Q divider_2/tspc_0/Z4 0.15fF
-C485 divider_1/tspc_1/Z3 divider_1/nor_0/B 0.38fF
-C486 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
-C487 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
-C488 divider_2/mc2 divider_2/nor_0/B 0.06fF
-C489 divbuf_23/IN divbuf_23/OUT5 0.00fF
-C490 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
-C491 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
-C492 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
-C493 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C494 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
-C495 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF
-C496 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
-C497 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF
-C498 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C499 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
-C500 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
-C501 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
-C502 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C503 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
-C504 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
-C505 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C506 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
-C507 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
-C508 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C509 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
-C510 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
-C511 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
-C512 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
-C513 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
-C514 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
-C515 divider_2/nor_0/B divider_2/tspc_0/Z4 0.02fF
-C516 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
-C517 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
-C518 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C519 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C520 divbuf_3/OUT divbuf_3/OUT5 43.38fF
-C521 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
-C522 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C523 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
-C524 pll_full_0/divbuf_0/IN pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF
-C525 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
-C526 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
-C527 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
-C528 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
-C529 pd_0/DOWN pd_0/UP 0.46fF
-C530 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
-C531 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
-C532 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
-C533 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
-C534 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
-C535 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
-C536 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
-C537 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
-C538 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C539 divider_0/Out divider_0/nor_1/B 0.22fF
-C540 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C541 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
-C542 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
-C543 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
-C544 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
-C545 divider_1/nor_1/B divider_1/nor_0/B 0.47fF
-C546 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
-C547 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
-C548 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
-C549 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
-C550 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C551 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
-C552 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
-C553 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
-C554 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z2 0.40fF
-C555 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
-C556 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C557 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
-C558 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
-C559 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C560 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
-C561 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
-C562 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
-C563 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
-C564 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
-C565 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
-C566 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
-C567 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
-C568 divider_1/mc2 divider_1/nor_0/A 0.04fF
-C569 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
-C570 filter_0/v divbuf_25/OUT2 0.06fF
-C571 divbuf_19/a_492_n240# divbuf_19/OUT2 0.42fF
-C572 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
-C573 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
-C574 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
-C575 pd_1/DOWN pd_1/UP 0.46fF
-C576 pd_1/tspc_r_0/Z3 pd_1/R 0.27fF
-C577 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
-C578 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
-C579 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF
-C580 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
-C581 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
-C582 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
-C583 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
-C584 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
-C585 divbuf_16/OUT divbuf_16/OUT3 0.26fF
-C586 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
-C587 divider_1/nor_1/B divider_1/and_0/B 0.29fF
-C588 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
-C589 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
-C590 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
-C591 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
-C592 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
-C593 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
-C594 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
-C595 divider_2/mc2 divider_2/and_0/out1 0.06fF
-C596 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
-C597 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
-C598 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
-C599 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
-C600 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF
-C601 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
-C602 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C603 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
-C604 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
-C605 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C606 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
-C607 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
-C608 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
-C609 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
-C610 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
-C611 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
-C612 pd_1/DIV pd_1/R 0.51fF
-C613 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
-C614 divider_2/tspc_1/Z2 divider_2/nor_0/B 0.30fF
-C615 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
-C616 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C617 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
-C618 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
-C619 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
-C620 divbuf_2/OUT divbuf_2/OUT4 1.11fF
-C621 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C622 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C623 divbuf_6/OUT divbuf_6/OUT4 1.11fF
-C624 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
-C625 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
-C626 io_clamp_high[0] io_analog[4] 0.53fF
-C627 divbuf_15/OUT3 divbuf_15/OUT4 5.16fF
-C628 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
-C629 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C630 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C631 divider_1/tspc_0/Z4 divider_1/tspc_1/Q 0.15fF
-C632 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
-C633 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
-C634 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C635 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C636 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
-C637 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
-C638 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
-C639 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
-C640 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
-C641 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
-C642 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF
-C643 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
-C644 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
-C645 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C646 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
-C647 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
-C648 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
-C649 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C650 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
-C651 pd_1/R pd_1/UP 0.45fF
-C652 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
-C653 divider_2/nor_0/B divider_2/and_0/A 0.26fF
-C654 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C655 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C656 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
-C657 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
-C658 divbuf_4/OUT divbuf_4/OUT3 0.26fF
-C659 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
-C660 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C661 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
-C662 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C663 pd_0/R pd_0/REF 0.61fF
-C664 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
-C665 divbuf_17/IN divbuf_17/OUT5 0.00fF
-C666 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
-C667 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
-C668 divider_0/tspc_1/Z1 divider_0/nor_0/B 0.03fF
-C669 divider_0/tspc_1/Z3 divider_0/tspc_1/a_630_n680# 0.05fF
-C670 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
-C671 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C672 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C673 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
-C674 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C675 divbuf_15/OUT divbuf_15/OUT4 1.11fF
-C676 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
-C677 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
-C678 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
-C679 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C680 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
-C681 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
-C682 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
-C683 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.35fF
-C684 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
-C685 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
-C686 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
-C687 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
-C688 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
-C689 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
-C690 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
-C691 divbuf_15/IN divbuf_15/OUT5 0.00fF
-C692 divider_0/mc2 divider_0/and_0/out1 0.06fF
-C693 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
-C694 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
-C695 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C696 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
-C697 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
-C698 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
-C699 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C700 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
-C701 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
-C702 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C703 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
-C704 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
-C705 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C706 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
-C707 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
-C708 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
-C709 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
-C710 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
-C711 pd_1/tspc_r_1/Z1 pd_1/REF 0.17fF
-C712 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Z4 0.20fF
-C713 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF
-C714 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
-C715 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
-C716 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
-C717 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
-C718 divider_0/Out divider_0/tspc_0/a_630_n680# 0.04fF
-C719 divbuf_15/a_492_n240# divbuf_15/OUT 0.00fF
-C720 divider_0/tspc_1/Q divider_0/tspc_0/Z1 0.01fF
-C721 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
-C722 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
-C723 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF
-C724 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
-C725 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
-C726 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
-C727 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C728 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF
-C729 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
-C730 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
-C731 divider_1/prescaler_0/Out divider_1/clk 0.51fF
-C732 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
-C733 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
-C734 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
-C735 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
-C736 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF
-C737 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
-C738 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF
-C739 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
-C740 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
-C741 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
-C742 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
-C743 divider_0/nor_1/B divider_0/and_0/B 0.29fF
-C744 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C745 divider_1/mc2 divider_1/nor_0/B 0.06fF
-C746 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
-C747 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
-C748 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C749 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
-C750 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
-C751 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z2 0.20fF
-C752 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
-C753 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
-C754 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
-C755 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
-C756 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
-C757 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
-C758 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
-C759 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
-C760 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
-C761 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.35fF
-C762 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
-C763 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
-C764 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
-C765 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
-C766 divider_0/nor_0/A divider_0/and_0/B 0.08fF
-C767 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C768 divbuf_19/OUT5 divbuf_19/IN 0.00fF
-C769 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
-C770 divbuf_6/IN divbuf_6/OUT5 0.00fF
-C771 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/B 0.30fF
-C772 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
-C773 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
-C774 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
-C775 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C776 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
-C777 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
-C778 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
-C779 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
-C780 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
-C781 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
-C782 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
-C783 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF
-C784 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
-C785 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
-C786 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.00fF
-C787 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
-C788 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
-C789 divider_1/mc2 divider_1/and_0/B 0.20fF
-C790 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
-C791 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
-C792 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C793 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
-C794 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
-C795 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
-C796 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
-C797 divider_2/mc2 divider_2/nor_0/A 0.04fF
-C798 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
-C799 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
-C800 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
-C801 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF
-C802 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C803 divbuf_4/OUT divbuf_4/OUT5 43.38fF
-C804 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C805 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C806 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
-C807 divbuf_15/a_492_n240# divbuf_15/OUT5 0.01fF
-C808 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
-C809 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
-C810 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
-C811 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
-C812 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
-C813 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z2 0.14fF
-C814 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C815 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
-C816 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
-C817 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
-C818 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
-C819 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
-C820 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C821 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C822 divider_0/tspc_1/Z3 divider_0/nor_0/B 0.38fF
-C823 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
-C824 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C825 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C826 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C827 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
-C828 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
-C829 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
-C830 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
-C831 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
-C832 divbuf_7/IN divbuf_7/OUT5 0.00fF
-C833 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
-C834 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
-C835 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
-C836 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
-C837 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
-C838 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C839 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C840 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
-C841 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF
-C842 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
-C843 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
-C844 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
-C845 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_740_n680# 0.33fF
-C846 divider_1/nor_0/B divider_1/tspc_0/Z2 0.20fF
-C847 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
-C848 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
-C849 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
-C850 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
-C851 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z3 0.25fF
-C852 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/z5 0.20fF
-C853 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
-C854 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C855 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF
-C856 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF
-C857 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
-C858 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
-C859 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
-C860 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
-C861 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
-C862 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
-C863 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
-C864 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
-C865 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C866 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
-C867 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
-C868 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
-C869 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
-C870 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
-C871 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
-C872 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF
-C873 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF
-C874 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C875 divider_0/mc2 divider_0/nor_1/B 0.15fF
-C876 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
-C877 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF
-C878 divbuf_19/OUT4 divbuf_19/OUT5 20.26fF
-C879 divbuf_16/OUT5 divbuf_16/a_492_n240# 0.01fF
-C880 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
-C881 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
-C882 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C883 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C884 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF
-C885 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C886 divider_1/tspc_2/Q divider_1/tspc_1/Z1 0.01fF
-C887 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF
-C888 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C889 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
-C890 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C891 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
-C892 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
-C893 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
-C894 divbuf_12/IN divbuf_12/OUT5 0.00fF
-C895 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
-C896 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF
-C897 divider_0/mc2 divider_0/nor_0/A 0.04fF
-C898 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
-C899 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C900 divbuf_1/OUT divbuf_1/OUT3 0.26fF
-C901 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C902 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
-C903 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C904 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
-C905 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
-C906 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.35fF
-C907 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
-C908 divider_1/nor_0/A divider_1/and_0/B 0.08fF
-C909 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
-C910 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
-C911 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
-C912 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
-C913 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
-C914 divbuf_16/OUT5 divbuf_16/OUT 43.38fF
-C915 divbuf_14/OUT divbuf_14/OUT3 0.26fF
-C916 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
-C917 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
-C918 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
-C919 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF
-C920 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF
-C921 divider_2/tspc_1/Q divider_2/tspc_1/a_630_n680# 0.04fF
-C922 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C923 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
-C924 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
-C925 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF
-C926 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
-C927 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
-C928 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
-C929 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
-C930 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
-C931 cp_0/a_1710_0# cp_0/out 0.84fF
-C932 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
-C933 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
-C934 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
-C935 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
-C936 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
-C937 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C938 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
-C939 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C940 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
-C941 divider_0/nor_0/B divider_0/and_0/B 0.31fF
-C942 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
-C943 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
-C944 divbuf_5/OUT divbuf_5/OUT3 0.26fF
-C945 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C946 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF
-C947 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C948 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
-C949 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
-C950 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
-C951 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
-C952 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
-C953 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
-C954 divider_2/nor_0/A divider_2/and_0/A 0.01fF
-C955 divbuf_24/IN divbuf_24/OUT5 0.00fF
-C956 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF
-C957 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF
-C958 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
-C959 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
-C960 divider_0/tspc_1/Q divider_0/nor_0/B 0.51fF
-C961 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C962 io_clamp_low[2] io_analog[6] 0.53fF
-C963 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
-C964 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C965 divbuf_17/OUT3 divbuf_17/OUT4 5.16fF
-C966 divider_1/mc2 divider_1/and_0/OUT 0.05fF
-C967 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF
-C968 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
-C969 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C970 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C971 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
-C972 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
-C973 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
-C974 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
-C975 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
-C976 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
-C977 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
-C978 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
-C979 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
-C980 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
-C981 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C982 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C983 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C984 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_740_n680# 0.08fF
-C985 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF
-C986 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
-C987 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
-C988 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
-C989 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
-C990 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
-C991 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
-C992 pd_1/tspc_r_1/Qbar pd_1/tspc_r_1/Qbar1 0.01fF
-C993 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
-C994 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C995 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C996 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
-C997 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
-C998 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C999 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
-C1000 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
-C1001 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
-C1002 divider_2/tspc_1/Q divider_2/nor_0/B 0.51fF
-C1003 divbuf_7/OUT divbuf_7/OUT2 0.06fF
-C1004 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
-C1005 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
-C1006 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C1007 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
-C1008 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
-C1009 divider_2/mc2 divider_2/and_0/B 0.20fF
-C1010 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF
-C1011 divbuf_18/a_492_n240# divbuf_18/OUT 0.00fF
-C1012 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
-C1013 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
-C1014 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
-C1015 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
-C1016 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1017 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
-C1018 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C1019 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1020 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
-C1021 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
-C1022 divider_2/nor_1/B divider_2/nor_1/Z1 0.06fF
-C1023 divbuf_16/IN divbuf_16/a_492_n240# 0.13fF
-C1024 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
-C1025 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
-C1026 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
-C1027 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
-C1028 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1029 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1030 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
-C1031 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
-C1032 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
-C1033 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
-C1034 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
-C1035 pd_0/R pd_0/and_pd_0/Out1 0.33fF
-C1036 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
-C1037 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
-C1038 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
-C1039 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
-C1040 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
-C1041 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1042 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1043 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
-C1044 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
-C1045 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
-C1046 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C1047 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
-C1048 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
-C1049 filter_0/v divbuf_25/OUT4 1.11fF
-C1050 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
-C1051 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
-C1052 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF
-C1053 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
-C1054 divbuf_25/OUT2 divbuf_25/OUT3 1.37fF
-C1055 divbuf_0/OUT5 divbuf_0/OUT 43.38fF
-C1056 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
-C1057 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
-C1058 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1059 divider_0/prescaler_0/Out divider_0/clk 0.51fF
-C1060 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
-C1061 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1062 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
-C1063 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
-C1064 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
-C1065 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
-C1066 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
-C1067 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C1068 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF
-C1069 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C1070 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
-C1071 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
-C1072 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
-C1073 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
-C1074 cp_0/a_1710_0# cp_0/down 0.32fF
-C1075 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
-C1076 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
-C1077 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
-C1078 divider_2/and_0/OUT divider_2/clk 0.04fF
-C1079 divbuf_5/OUT divbuf_3/OUT 3.09fF
-C1080 divider_0/mc2 divider_0/nor_0/B 0.06fF
-C1081 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
-C1082 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1083 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
-C1084 divbuf_5/OUT divbuf_5/OUT5 43.38fF
-C1085 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
-C1086 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1087 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1088 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
-C1089 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
-C1090 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
-C1091 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
-C1092 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
-C1093 divider_1/nor_0/B divider_1/and_0/B 0.31fF
-C1094 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
-C1095 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
-C1096 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
-C1097 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1098 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
-C1099 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
-C1100 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
-C1101 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
-C1102 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
-C1103 divider_0/tspc_0/Z4 divider_0/nor_0/B 0.02fF
-C1104 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
-C1105 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C1106 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
-C1107 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1108 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
-C1109 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
-C1110 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1111 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
-C1112 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
-C1113 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/B 0.22fF
-C1114 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
-C1115 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
-C1116 divbuf_17/OUT3 divbuf_17/OUT2 1.37fF
-C1117 divider_2/nor_1/B divider_2/Out 0.22fF
-C1118 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
-C1119 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF
-C1120 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
-C1121 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
-C1122 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
-C1123 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
-C1124 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
-C1125 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
-C1126 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
-C1127 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
-C1128 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
-C1129 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1130 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C1131 divider_0/mc2 divider_0/and_0/B 0.20fF
-C1132 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF
-C1133 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1134 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
-C1135 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
-C1136 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
-C1137 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1138 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
-C1139 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
-C1140 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
-C1141 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
-C1142 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
-C1143 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
-C1144 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z4 0.12fF
-C1145 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
-C1146 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
-C1147 divbuf_0/OUT5 divbuf_0/IN 0.00fF
-C1148 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF
-C1149 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1150 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
-C1151 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
-C1152 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
-C1153 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
-C1154 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF
-C1155 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
-C1156 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1157 divbuf_7/OUT divbuf_7/OUT4 1.11fF
-C1158 divbuf_4/IN divbuf_4/OUT5 0.00fF
-C1159 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
-C1160 divider_2/nor_1/B divider_2/tspc_0/Z3 0.38fF
-C1161 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
-C1162 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1163 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
-C1164 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
-C1165 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
-C1166 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
-C1167 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
-C1168 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
-C1169 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
-C1170 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
-C1171 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
-C1172 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
-C1173 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C1174 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
-C1175 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
-C1176 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
-C1177 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
-C1178 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1179 divbuf_5/IN divbuf_5/OUT5 0.00fF
-C1180 divider_1/tspc_0/Z4 divider_1/nor_0/B 0.02fF
-C1181 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
-C1182 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
-C1183 divbuf_19/OUT5 divbuf_19/OUT2 0.02fF
-C1184 divbuf_19/OUT4 divbuf_19/OUT3 5.16fF
-C1185 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
-C1186 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
-C1187 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C1188 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
-C1189 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
-C1190 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
-C1191 divider_2/and_0/A divider_2/and_0/B 0.18fF
-C1192 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
-C1193 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1194 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1195 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
-C1196 divbuf_16/OUT5 divbuf_16/OUT3 0.01fF
-C1197 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
-C1198 divbuf_25/IN divbuf_25/OUT5 0.00fF
-C1199 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
-C1200 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
-C1201 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1202 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1203 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
-C1204 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
-C1205 divider_2/mc2 divider_2/and_0/OUT 0.05fF
-C1206 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
-C1207 pd_1/tspc_r_1/Qbar pd_1/R 0.03fF
-C1208 divbuf_19/OUT divbuf_19/OUT3 0.26fF
-C1209 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
-C1210 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
-C1211 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
-C1212 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
-C1213 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
-C1214 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
-C1215 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
-C1216 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF
-C1217 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1218 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
-C1219 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
-C1220 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1221 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
-C1222 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
-C1223 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1224 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1225 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
-C1226 divider_1/nor_1/B divider_1/Out 0.22fF
-C1227 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
-C1228 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
-C1229 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
-C1230 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
-C1231 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
-C1232 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
-C1233 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
-C1234 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1235 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1236 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
-C1237 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
-C1238 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
-C1239 divbuf_21/IN divbuf_21/OUT5 0.00fF
-C1240 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
-C1241 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
-C1242 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
-C1243 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
-C1244 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
-C1245 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
-C1246 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
-C1247 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
-C1248 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C1249 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
-C1250 io_clamp_high[1] io_analog[5] 0.53fF
-C1251 divider_1/tspc_1/Z2 divider_1/nor_0/B 0.30fF
-C1252 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
-C1253 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
-C1254 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
-C1255 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
-C1256 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
-C1257 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
-C1258 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
-C1259 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
-C1260 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF
-C1261 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF
-C1262 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
-C1263 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF
-C1264 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C1265 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
-C1266 divbuf_17/a_492_n240# divbuf_17/IN 0.13fF
-C1267 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
-C1268 divbuf_16/OUT divbuf_16/OUT4 1.11fF
-C1269 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
-C1270 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1271 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
-C1272 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
-C1273 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
-C1274 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1275 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
-C1276 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1277 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
-C1278 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
-C1279 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
-C1280 pd_1/R pd_1/REF 0.61fF
-C1281 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
-C1282 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C1283 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
-C1284 divbuf_3/OUT divbuf_3/OUT4 1.11fF
-C1285 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
-C1286 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
-C1287 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1288 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
-C1289 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
-C1290 divider_2/tspc_1/Q divider_2/tspc_0/Z3 0.45fF
-C1291 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
-C1292 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF
-C1293 divbuf_8/IN divbuf_8/OUT5 0.00fF
-C1294 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
-C1295 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
-C1296 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
-C1297 cp_0/upbar cp_0/down 0.02fF
-C1298 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
-C1299 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
-C1300 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
-C1301 divider_0/mc2 divider_0/and_0/OUT 0.05fF
-C1302 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
-C1303 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1304 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
-C1305 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
-C1306 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
-C1307 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
-C1308 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF
-C1309 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
-C1310 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z1 0.03fF
-C1311 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
-C1312 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
-C1313 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
-C1314 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
-C1315 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
-C1316 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
-C1317 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF
-C1318 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
-C1319 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
-C1320 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF
-C1321 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
-C1322 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
-C1323 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
-C1324 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1325 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
-C1326 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
-C1327 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
-C1328 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
-C1329 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
-C1330 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
-C1331 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
-C1332 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
-C1333 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
-C1334 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C1335 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF
-C1336 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
-C1337 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
-C1338 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
-C1339 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1340 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
-C1341 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
-C1342 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
-C1343 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
-C1344 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
-C1345 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
-C1346 divbuf_13/IN divbuf_13/OUT5 0.00fF
-C1347 divbuf_5/OUT divbuf_6/OUT 3.23fF
-C1348 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
-C1349 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1350 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
-C1351 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
-C1352 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
-C1353 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C1354 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
-C1355 divider_0/nor_1/B divider_0/tspc_0/Z2 0.40fF
-C1356 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C1357 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
-C1358 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1359 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1360 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
-C1361 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_1/Q 0.45fF
-C1362 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C1363 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
-C1364 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
-C1365 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
-C1366 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
-C1367 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
-C1368 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
-C1369 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
-C1370 divider_2/tspc_1/Z1 divider_2/nor_0/B 0.03fF
-C1371 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
-C1372 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
-C1373 divbuf_2/OUT divbuf_2/OUT3 0.26fF
-C1374 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
-C1375 io_clamp_low[0] io_analog[4] 0.53fF
-C1376 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
-C1377 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
-C1378 divbuf_6/OUT divbuf_6/OUT3 0.26fF
-C1379 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
-C1380 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
-C1381 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
-C1382 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C1383 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
-C1384 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
-C1385 divider_2/nor_1/B divider_2/and_0/B 0.29fF
-C1386 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
-C1387 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
-C1388 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
-C1389 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
-C1390 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
-C1391 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
-C1392 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
-C1393 divbuf_18/OUT4 divbuf_18/OUT3 5.16fF
-C1394 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
-C1395 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
-C1396 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
-C1397 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
-C1398 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
-C1399 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
-C1400 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
-C1401 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
-C1402 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
-C1403 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
-C1404 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C1405 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C1406 divbuf_16/OUT2 divbuf_16/a_492_n240# 0.42fF
-C1407 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
-C1408 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
-C1409 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
-C1410 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
-C1411 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
-C1412 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
-C1413 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
-C1414 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1415 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
-C1416 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
-C1417 divbuf_4/OUT divbuf_4/OUT2 0.06fF
-C1418 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
-C1419 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
-C1420 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1421 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C1422 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1423 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
-C1424 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
-C1425 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
-C1426 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
-C1427 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
-C1428 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
-C1429 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1430 divider_0/tspc_1/Z2 divider_0/tspc_1/a_630_n680# 0.01fF
-C1431 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1432 divbuf_15/OUT divbuf_15/OUT3 0.26fF
-C1433 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
-C1434 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
-C1435 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
-C1436 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
-C1437 divbuf_16/OUT divbuf_16/OUT2 0.06fF
-C1438 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
-C1439 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
-C1440 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
-C1441 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
-C1442 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
-C1443 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
-C1444 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
-C1445 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
-C1446 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C1447 filter_0/a_4216_n2998# filter_0/v 0.36fF
-C1448 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
-C1449 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
-C1450 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
-C1451 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
-C1452 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
-C1453 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
-C1454 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1455 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
-C1456 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
-C1457 filter_0/v divbuf_25/OUT3 0.26fF
-C1458 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C1459 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
-C1460 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
-C1461 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
-C1462 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
-C1463 pd_1/tspc_r_0/Qbar1 pd_1/R 0.01fF
-C1464 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
-C1465 divbuf_0/OUT divbuf_0/OUT2 0.06fF
-C1466 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
-C1467 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C1468 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
-C1469 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
-C1470 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF
-C1471 divbuf_1/OUT5 divbuf_1/IN 0.00fF
-C1472 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
-C1473 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1474 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
-C1475 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
-C1476 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
-C1477 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.35fF
-C1478 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
-C1479 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
-C1480 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
-C1481 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
-C1482 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
-C1483 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1484 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
-C1485 pd_0/DOWN pd_0/R 0.36fF
-C1486 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
-C1487 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
-C1488 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
-C1489 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
-C1490 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
-C1491 pd_1/R pd_1/and_pd_0/Z1 0.02fF
-C1492 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
-C1493 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
-C1494 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
-C1495 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1496 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
-C1497 divbuf_25/OUT2 divbuf_25/a_492_n240# 0.42fF
-C1498 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
-C1499 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1500 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
-C1501 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
-C1502 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
-C1503 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1504 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1505 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
-C1506 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
-C1507 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1508 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
-C1509 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
-C1510 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
-C1511 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
-C1512 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
-C1513 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
-C1514 divider_2/tspc_1/Z3 divider_2/nor_0/B 0.38fF
-C1515 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF
-C1516 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
-C1517 io_clamp_low[1] io_clamp_high[1] 0.53fF
-C1518 divbuf_2/OUT divbuf_2/OUT5 43.38fF
-C1519 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF
-C1520 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF
-C1521 divbuf_15/OUT2 divbuf_15/OUT 0.06fF
-C1522 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
-C1523 divbuf_6/OUT divbuf_6/OUT5 43.38fF
-C1524 divbuf_3/IN divbuf_3/OUT5 0.00fF
-C1525 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1526 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1527 divbuf_15/OUT3 divbuf_15/OUT5 0.01fF
-C1528 divider_0/nor_0/A divider_0/and_0/A 0.01fF
-C1529 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
-C1530 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_0/B 0.03fF
-C1531 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF
-C1532 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
-C1533 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C1534 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C1535 divider_2/prescaler_0/Out divider_2/clk 0.51fF
-C1536 divbuf_16/OUT4 divbuf_16/OUT3 5.16fF
-C1537 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
-C1538 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
-C1539 pd_1/DOWN pd_1/R 0.36fF
-C1540 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
-C1541 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
-C1542 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
-C1543 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
-C1544 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
-C1545 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
-C1546 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
-C1547 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
-C1548 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF
-C1549 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
-C1550 divider_1/mc2 divider_1/and_0/A 0.16fF
-C1551 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
-C1552 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
-C1553 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
-C1554 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C1555 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C1556 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C1557 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C1558 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
-C1559 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
-C1560 divider_2/nor_0/B divider_2/and_0/B 0.31fF
-C1561 divider_2/tspc_0/Z3 divider_2/Out 0.05fF
-C1562 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
-C1563 divider_0/tspc_0/Z3 divider_0/tspc_1/Q 0.45fF
-C1564 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C1565 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
-C1566 divbuf_4/OUT divbuf_4/OUT4 1.11fF
-C1567 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1568 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
-C1569 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
-C1570 divider_0/nor_0/B divider_0/tspc_0/Z2 0.20fF
-C1571 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
-C1572 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z1 0.01fF
-C1573 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1574 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
-C1575 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
-C1576 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
-C1577 cp_0/a_10_n50# cp_0/vbias 0.19fF
-C1578 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
-C1579 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
-C1580 divider_0/tspc_1/Z2 divider_0/nor_0/B 0.30fF
-C1581 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
-C1582 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1583 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
-C1584 divbuf_15/OUT divbuf_15/OUT5 43.38fF
-C1585 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
-C1586 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
-C1587 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
-C1588 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
-C1589 divider_1/tspc_2/Q divider_1/nor_0/B 0.22fF
-C1590 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
-C1591 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
-C1592 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
-C1593 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
-C1594 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
-C1595 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
-C1596 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
-C1597 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
-C1598 filter_0/a_4216_n5230# filter_0/v 0.91fF
-C1599 divbuf_15/OUT2 divbuf_15/OUT5 0.02fF
-C1600 divbuf_14/OUT divbuf_14/OUT4 1.11fF
-C1601 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
-C1602 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
-C1603 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
-C1604 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1605 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF
-C1606 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
-C1607 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
-C1608 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
-C1609 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
-C1610 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF
-C1611 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
-C1612 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF
-C1613 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
-C1614 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
-C1615 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
-C1616 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
-C1617 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z3 0.09fF
-C1618 pd_1/tspc_r_1/Z2 pd_1/REF 0.19fF
-C1619 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/z5 0.11fF
-C1620 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
-C1621 divbuf_0/OUT divbuf_0/OUT3 0.26fF
-C1622 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C1623 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
-C1624 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
-C1625 divbuf_14/OUT5 divbuf_14/a_492_n240# 0.01fF
-C1626 divider_0/tspc_1/Q divider_0/tspc_0/Z2 0.14fF
-C1627 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
-C1628 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C1629 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
-C1630 divider_2/tspc_1/Q divider_2/tspc_0/a_630_n680# 0.01fF
-C1631 divbuf_20/IN divbuf_20/OUT5 0.00fF
-C1632 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
-C1633 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
-C1634 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
-C1635 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
-C1636 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
-C1637 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
-C1638 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
-C1639 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
-C1640 cp_0/a_1710_n2840# cp_0/out 0.61fF
-C1641 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
-C1642 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
-C1643 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
-C1644 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
-C1645 divbuf_4/OUT divbuf_3/OUT 2.71fF
-C1646 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
-C1647 divbuf_17/a_492_n240# divbuf_17/OUT2 0.42fF
-C1648 divider_0/and_0/OUT divider_0/clk 0.04fF
-C1649 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
-C1650 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C1651 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1652 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1653 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
-C1654 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
-C1655 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1656 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
-C1657 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
-C1658 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
-C1659 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
-C1660 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
-C1661 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
-C1662 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF
-C1663 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
-C1664 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
+C0 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
+C1 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
+C2 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
+C3 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
+C4 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
+C5 pd_1/tspc_r_1/Qbar pd_1/UP 0.21fF
+C6 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
+C7 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
+C8 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
+C9 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C10 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF
+C11 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
+C12 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
+C13 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
+C14 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
+C15 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
+C16 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
+C17 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C18 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C19 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
+C20 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
+C21 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
+C22 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
+C23 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/z5 0.20fF
+C24 pd_1/tspc_r_0/Z1 pd_1/DIV 0.17fF
+C25 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
+C26 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
+C27 divider_2/mc2 divider_2/and_0/A 0.16fF
+C28 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
+C29 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C30 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
+C31 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
+C32 divider_0/mc2 divider_0/and_0/A 0.16fF
+C33 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
+C34 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C35 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
+C36 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
+C37 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
+C38 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
+C39 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
+C40 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C41 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
+C42 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
+C43 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
+C44 divider_1/and_0/A divider_1/and_0/B 0.18fF
+C45 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
+C46 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
+C47 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
+C48 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
+C49 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
+C50 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
+C51 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
+C52 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
+C53 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
+C54 divider_2/nor_0/B divider_2/and_0/A 0.26fF
+C55 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C56 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
+C57 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
+C58 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C59 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
+C60 divbuf_1/OUT divbuf_1/OUT4 1.11fF
+C61 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
+C62 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
+C63 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
+C64 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
+C65 divbuf_7/OUT divbuf_7/OUT3 0.26fF
+C66 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
+C67 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
+C68 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
+C69 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
+C70 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
+C71 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C72 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
+C73 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C74 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
+C75 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
+C76 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
+C77 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
+C78 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
+C79 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
+C80 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
+C81 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
+C82 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/UP 0.21fF
+C83 divbuf_14/OUT divbuf_14/OUT3 0.26fF
+C84 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
+C85 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
+C86 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
+C87 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
+C88 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
+C89 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
+C90 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
+C91 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
+C92 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C93 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
+C94 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
+C95 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
+C96 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
+C97 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
+C98 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
+C99 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
+C100 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
+C101 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
+C102 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
+C103 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
+C104 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
+C105 pd_1/and_pd_0/Z1 pd_1/UP 0.06fF
+C106 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
+C107 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
+C108 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
+C109 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
+C110 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
+C111 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF
+C112 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
+C113 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C114 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C115 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
+C116 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
+C117 divider_1/Out divider_1/nor_1/B 0.22fF
+C118 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
+C119 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
+C120 pd_0/tspc_r_1/Qbar pd_0/UP 0.21fF
+C121 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
+C122 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
+C123 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C124 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
+C125 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
+C126 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
+C127 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
+C128 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C129 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF
+C130 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
+C131 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C132 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C133 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
+C134 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
+C135 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
+C136 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
+C137 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
+C138 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
+C139 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
+C140 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
+C141 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
+C142 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
+C143 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
+C144 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
+C145 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
+C146 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
+C147 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
+C148 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
+C149 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
+C150 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
+C151 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
+C152 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
+C153 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
+C154 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C155 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
+C156 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
+C157 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
+C158 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
+C159 filter_0/a_4216_n2998# filter_0/v 0.36fF
+C160 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
+C161 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
+C162 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
+C163 divider_2/nor_0/A divider_2/and_0/B 0.08fF
+C164 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
+C165 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
+C166 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C167 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF
+C168 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
+C169 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
+C170 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
+C171 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
+C172 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
+C173 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C174 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF
+C175 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
+C176 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
+C177 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
+C178 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
+C179 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
+C180 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C181 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
+C182 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
+C183 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
+C184 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
+C185 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
+C186 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF
+C187 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
+C188 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
+C189 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
+C190 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
+C191 divbuf_15/OUT divbuf_15/OUT2 0.06fF
+C192 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
+C193 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
+C194 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C195 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C196 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C197 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
+C198 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
+C199 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
+C200 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
+C201 divbuf_10/IN divbuf_10/OUT5 0.00fF
+C202 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C203 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C204 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
+C205 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
+C206 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
+C207 pd_0/and_pd_0/Z1 pd_0/UP 0.06fF
+C208 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
+C209 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
+C210 io_analog[6] io_clamp_high[2] 0.53fF
+C211 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
+C212 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF
+C213 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C214 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF
+C215 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF
+C216 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C217 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
+C218 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C219 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF
+C220 divbuf_3/OUT divbuf_3/OUT3 0.26fF
+C221 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
+C222 divbuf_7/OUT divbuf_7/OUT5 43.38fF
+C223 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
+C224 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
+C225 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
+C226 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
+C227 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
+C228 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
+C229 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF
+C230 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
+C231 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
+C232 divbuf_2/IN divbuf_2/OUT5 0.00fF
+C233 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
+C234 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C235 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
+C236 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
+C237 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
+C238 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
+C239 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C240 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
+C241 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
+C242 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C243 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
+C244 pd_0/R pd_0/and_pd_0/Z1 0.02fF
+C245 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
+C246 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
+C247 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
+C248 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
+C249 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
+C250 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
+C251 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF
+C252 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C253 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
+C254 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
+C255 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
+C256 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
+C257 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
+C258 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
+C259 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
+C260 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
+C261 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C262 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
+C263 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
+C264 divbuf_11/IN divbuf_11/OUT5 0.00fF
+C265 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
+C266 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
+C267 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
+C268 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
+C269 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
+C270 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
+C271 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
+C272 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C273 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C274 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
+C275 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
+C276 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
+C277 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
+C278 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C279 pd_0/DIV pd_0/R 0.51fF
+C280 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
+C281 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C282 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
+C283 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C284 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C285 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
+C286 cp_0/upbar cp_0/down 0.02fF
+C287 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
+C288 divbuf_4/OUT divbuf_2/OUT 1.95fF
+C289 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C290 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
+C291 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
+C292 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
+C293 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
+C294 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C295 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
+C296 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
+C297 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
+C298 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
+C299 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
+C300 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
+C301 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
+C302 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
+C303 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
+C304 filter_0/a_4216_n5230# filter_0/v 0.91fF
+C305 pd_1/tspc_r_1/z5 pd_1/UP 0.03fF
+C306 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
+C307 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_0/vin 0.19fF
+C308 divbuf_6/OUT divbuf_6/OUT2 0.06fF
+C309 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
+C310 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
+C311 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
+C312 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
+C313 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
+C314 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
+C315 pd_1/tspc_r_0/Qbar1 pd_1/DIV 0.12fF
+C316 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
+C317 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
+C318 divbuf_23/IN divbuf_23/OUT5 0.00fF
+C319 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
+C320 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C321 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
+C322 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C323 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
+C324 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
+C325 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
+C326 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C327 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
+C328 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
+C329 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C330 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
+C331 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
+C332 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C333 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
+C334 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
+C335 pd_1/R pd_1/UP 0.45fF
+C336 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
+C337 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
+C338 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
+C339 io_analog[5] io_clamp_low[1] 0.53fF
+C340 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C341 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C342 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
+C343 divbuf_3/OUT divbuf_3/OUT5 43.38fF
+C344 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
+C345 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C346 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
+C347 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C348 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
+C349 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF
+C350 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
+C351 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
+C352 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
+C353 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF
+C354 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
+C355 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
+C356 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
+C357 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
+C358 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
+C359 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
+C360 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
+C361 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
+C362 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
+C363 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C364 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C365 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/UP 0.03fF
+C366 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
+C367 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
+C368 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
+C369 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
+C370 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C371 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF
+C372 divbuf_16/IN divbuf_16/OUT5 0.00fF
+C373 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
+C374 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF
+C375 pd_1/tspc_r_0/Z2 pd_1/DIV 0.19fF
+C376 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C377 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
+C378 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
+C379 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
+C380 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
+C381 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C382 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
+C383 divider_1/mc2 divider_1/and_0/out1 0.06fF
+C384 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
+C385 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
+C386 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
+C387 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
+C388 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
+C389 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C390 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
+C391 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
+C392 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
+C393 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
+C394 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
+C395 cp_0/a_1710_0# cp_0/down 0.32fF
+C396 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
+C397 pd_1/R pd_1/and_pd_0/Out1 0.33fF
+C398 pd_0/tspc_r_1/z5 pd_0/UP 0.03fF
+C399 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
+C400 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF
+C401 divider_1/mc2 divider_1/nor_0/B 0.06fF
+C402 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
+C403 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
+C404 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
+C405 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
+C406 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C407 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF
+C408 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
+C409 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
+C410 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
+C411 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
+C412 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
+C413 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
+C414 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
+C415 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF
+C416 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C417 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
+C418 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
+C419 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C420 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
+C421 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
+C422 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
+C423 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
+C424 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
+C425 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
+C426 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C427 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
+C428 divbuf_2/OUT divbuf_2/OUT4 1.11fF
+C429 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C430 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
+C431 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
+C432 divbuf_6/OUT divbuf_6/OUT4 1.11fF
+C433 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
+C434 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
+C435 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF
+C436 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
+C437 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C438 filter_0/v divbuf_25/OUT5 43.38fF
+C439 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
+C440 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
+C441 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
+C442 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
+C443 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
+C444 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
+C445 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
+C446 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
+C447 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
+C448 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF
+C449 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
+C450 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
+C451 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
+C452 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
+C453 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
+C454 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
+C455 divider_2/Out divider_2/nor_1/B 0.22fF
+C456 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C457 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C458 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
+C459 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
+C460 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
+C461 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
+C462 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
+C463 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
+C464 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
+C465 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
+C466 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
+C467 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C468 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C469 divbuf_4/OUT divbuf_4/OUT3 0.26fF
+C470 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
+C471 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT5 0.01fF
+C472 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
+C473 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
+C474 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
+C475 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
+C476 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C477 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
+C478 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
+C479 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C480 pd_0/R pd_0/REF 0.61fF
+C481 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
+C482 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
+C483 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
+C484 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C485 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
+C486 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
+C487 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C488 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C489 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
+C490 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C491 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
+C492 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
+C493 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
+C494 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
+C495 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
+C496 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
+C497 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
+C498 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
+C499 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
+C500 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
+C501 pd_1/R pd_1/DIV 0.51fF
+C502 pd_1/tspc_r_0/Qbar1 pd_1/DOWN 0.11fF
+C503 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
+C504 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
+C505 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
+C506 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
+C507 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
+C508 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C509 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
+C510 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
+C511 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
+C512 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C513 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
+C514 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
+C515 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C516 divider_1/mc2 divider_1/and_0/A 0.16fF
+C517 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
+C518 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
+C519 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
+C520 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
+C521 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
+C522 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
+C523 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
+C524 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
+C525 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
+C526 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
+C527 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
+C528 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
+C529 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
+C530 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
+C531 divider_0/nor_0/B divider_0/and_0/A 0.26fF
+C532 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
+C533 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF
+C534 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
+C535 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
+C536 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
+C537 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF
+C538 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
+C539 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
+C540 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
+C541 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
+C542 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
+C543 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF
+C544 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C545 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
+C546 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
+C547 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF
+C548 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
+C549 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF
+C550 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
+C551 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
+C552 divider_0/nor_1/B divider_0/and_0/B 0.29fF
+C553 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
+C554 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C555 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
+C556 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
+C557 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C558 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C559 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
+C560 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
+C561 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
+C562 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
+C563 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
+C564 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
+C565 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
+C566 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
+C567 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
+C568 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
+C569 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
+C570 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
+C571 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
+C572 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
+C573 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
+C574 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C575 divbuf_6/IN divbuf_6/OUT5 0.00fF
+C576 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
+C577 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
+C578 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
+C579 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
+C580 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
+C581 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
+C582 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
+C583 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
+C584 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
+C585 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
+C586 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
+C587 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
+C588 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C589 divbuf_19/IN divbuf_19/OUT5 0.00fF
+C590 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
+C591 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
+C592 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
+C593 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
+C594 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
+C595 divider_2/mc2 divider_2/nor_1/B 0.15fF
+C596 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
+C597 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
+C598 io_analog[4] io_clamp_high[0] 0.53fF
+C599 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
+C600 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C601 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
+C602 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
+C603 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
+C604 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
+C605 divbuf_4/OUT divbuf_4/OUT5 43.38fF
+C606 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
+C607 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C608 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C609 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
+C610 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
+C611 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
+C612 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
+C613 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
+C614 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
+C615 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C616 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
+C617 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
+C618 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
+C619 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
+C620 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
+C621 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
+C622 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
+C623 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
+C624 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
+C625 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
+C626 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
+C627 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
+C628 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C629 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C630 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
+C631 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C632 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C633 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
+C634 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
+C635 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C636 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF
+C637 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
+C638 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
+C639 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
+C640 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
+C641 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
+C642 divbuf_7/IN divbuf_7/OUT5 0.00fF
+C643 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
+C644 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
+C645 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
+C646 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
+C647 divbuf_15/OUT4 divbuf_15/OUT 1.11fF
+C648 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF
+C649 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
+C650 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
+C651 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
+C652 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
+C653 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C654 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C655 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
+C656 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF
+C657 divider_2/Out divider_2/tspc_0/Z3 0.05fF
+C658 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
+C659 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
+C660 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
+C661 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
+C662 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
+C663 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
+C664 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
+C665 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
+C666 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C667 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
+C668 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
+C669 divbuf_18/IN divbuf_18/OUT5 0.00fF
+C670 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF
+C671 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
+C672 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
+C673 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C674 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
+C675 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
+C676 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C677 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
+C678 divider_1/nor_0/B divider_1/and_0/A 0.26fF
+C679 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
+C680 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
+C681 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
+C682 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C683 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
+C684 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
+C685 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
+C686 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
+C687 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
+C688 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C689 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
+C690 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
+C691 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF
+C692 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF
+C693 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
+C694 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C695 divider_0/mc2 divider_0/nor_1/B 0.15fF
+C696 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
+C697 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C698 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C699 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF
+C700 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C701 divider_1/nor_1/B divider_1/and_0/B 0.29fF
+C702 divbuf_12/IN divbuf_12/OUT5 0.00fF
+C703 pd_1/R pd_1/DOWN 0.36fF
+C704 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
+C705 pd_1/and_pd_0/Out1 pd_1/UP 0.33fF
+C706 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF
+C707 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
+C708 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C709 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
+C710 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
+C711 divbuf_1/OUT divbuf_1/OUT3 0.26fF
+C712 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C713 divider_0/nor_0/A divider_0/and_0/B 0.08fF
+C714 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
+C715 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
+C716 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF
+C717 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
+C718 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C719 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
+C720 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C721 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
+C722 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
+C723 pd_1/tspc_r_0/z5 pd_1/DIV 0.04fF
+C724 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
+C725 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
+C726 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
+C727 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
+C728 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
+C729 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF
+C730 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
+C731 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
+C732 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
+C733 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C734 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
+C735 divbuf_19/OUT2 divbuf_19/OUT 0.06fF
+C736 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
+C737 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C738 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
+C739 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
+C740 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
+C741 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
+C742 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
+C743 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
+C744 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
+C745 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
+C746 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
+C747 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
+C748 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
+C749 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
+C750 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
+C751 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C752 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
+C753 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
+C754 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C755 divbuf_5/OUT divbuf_5/OUT3 0.26fF
+C756 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT 0.06fF
+C757 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT5 0.01fF
+C758 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C759 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C760 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
+C761 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
+C762 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
+C763 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
+C764 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
+C765 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
+C766 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
+C767 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
+C768 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
+C769 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C770 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
+C771 divbuf_24/IN divbuf_24/OUT5 0.00fF
+C772 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
+C773 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
+C774 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
+C775 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C776 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
+C777 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF
+C778 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF
+C779 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF
+C780 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C781 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
+C782 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C783 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
+C784 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
+C785 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
+C786 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
+C787 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
+C788 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
+C789 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
+C790 pd_1/R pd_1/REF 0.61fF
+C791 pd_0/R pd_0/UP 0.45fF
+C792 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
+C793 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
+C794 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
+C795 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
+C796 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
+C797 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C798 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C799 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
+C800 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
+C801 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
+C802 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C803 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
+C804 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
+C805 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
+C806 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C807 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
+C808 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
+C809 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
+C810 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
+C811 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
+C812 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
+C813 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
+C814 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
+C815 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
+C816 pd_0/and_pd_0/Out1 pd_0/UP 0.33fF
+C817 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
+C818 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
+C819 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C820 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C821 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
+C822 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
+C823 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
+C824 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
+C825 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C826 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
+C827 divbuf_7/OUT divbuf_7/OUT2 0.06fF
+C828 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
+C829 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C830 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
+C831 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
+C832 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
+C833 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C834 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
+C835 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
+C836 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
+C837 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C838 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C839 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
+C840 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
+C841 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C842 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C843 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
+C844 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
+C845 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C846 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C847 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
+C848 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
+C849 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
+C850 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
+C851 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
+C852 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
+C853 pd_0/R pd_0/and_pd_0/Out1 0.33fF
+C854 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
+C855 divider_2/mc2 divider_2/nor_0/A 0.04fF
+C856 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
+C857 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
+C858 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
+C859 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
+C860 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
+C861 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C862 divider_0/mc2 divider_0/nor_0/A 0.04fF
+C863 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C864 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
+C865 filter_0/v divbuf_25/OUT4 1.11fF
+C866 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
+C867 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C868 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
+C869 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF
+C870 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
+C871 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
+C872 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
+C873 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C874 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
+C875 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
+C876 divider_1/nor_0/A divider_1/and_0/B 0.08fF
+C877 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
+C878 divbuf_19/OUT divbuf_19/OUT4 1.11fF
+C879 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
+C880 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
+C881 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
+C882 divbuf_15/OUT5 divbuf_15/IN 0.00fF
+C883 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
+C884 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
+C885 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
+C886 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
+C887 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
+C888 divider_0/prescaler_0/Out divider_0/clk 0.51fF
+C889 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
+C890 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C891 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
+C892 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C893 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
+C894 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
+C895 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
+C896 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
+C897 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
+C898 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
+C899 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
+C900 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
+C901 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
+C902 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
+C903 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
+C904 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
+C905 divider_2/and_0/OUT divider_2/clk 0.04fF
+C906 divbuf_5/OUT divbuf_3/OUT 3.09fF
+C907 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C908 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
+C909 divbuf_5/OUT divbuf_5/OUT5 43.38fF
+C910 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
+C911 divbuf_14/OUT divbuf_14/OUT5 43.38fF
+C912 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
+C913 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
+C914 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT 1.11fF
+C915 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C916 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C917 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
+C918 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
+C919 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
+C920 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
+C921 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
+C922 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
+C923 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C924 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
+C925 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
+C926 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
+C927 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
+C928 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
+C929 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
+C930 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
+C931 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
+C932 divider_2/nor_0/A divider_2/and_0/A 0.01fF
+C933 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C934 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C935 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
+C936 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
+C937 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C938 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF
+C939 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
+C940 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
+C941 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
+C942 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
+C943 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
+C944 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
+C945 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
+C946 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
+C947 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
+C948 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
+C949 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
+C950 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
+C951 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
+C952 divider_2/mc2 divider_2/and_0/B 0.20fF
+C953 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF
+C954 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
+C955 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF
+C956 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C957 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C958 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
+C959 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C960 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C961 divider_0/mc2 divider_0/and_0/B 0.20fF
+C962 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
+C963 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
+C964 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
+C965 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
+C966 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
+C967 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
+C968 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C969 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
+C970 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
+C971 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
+C972 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
+C973 cp_0/a_10_n50# cp_0/vbias 0.19fF
+C974 cp_0/a_1710_n2840# cp_0/out 0.61fF
+C975 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
+C976 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C977 divider_2/nor_0/B divider_2/and_0/B 0.31fF
+C978 io_analog[6] io_clamp_low[2] 0.53fF
+C979 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
+C980 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
+C981 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C982 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
+C983 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF
+C984 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
+C985 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C986 divbuf_7/OUT divbuf_7/OUT4 1.11fF
+C987 divbuf_4/IN divbuf_4/OUT5 0.00fF
+C988 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
+C989 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
+C990 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
+C991 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
+C992 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
+C993 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C994 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
+C995 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
+C996 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF
+C997 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
+C998 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
+C999 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
+C1000 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
+C1001 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
+C1002 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C1003 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
+C1004 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
+C1005 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
+C1006 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C1007 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
+C1008 divbuf_5/IN divbuf_5/OUT5 0.00fF
+C1009 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
+C1010 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
+C1011 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1012 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
+C1013 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
+C1014 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
+C1015 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
+C1016 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
+C1017 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
+C1018 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
+C1019 divider_2/and_0/A divider_2/and_0/B 0.18fF
+C1020 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
+C1021 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1022 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
+C1023 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
+C1024 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
+C1025 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C1026 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C1027 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C1028 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
+C1029 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
+C1030 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
+C1031 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
+C1032 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
+C1033 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
+C1034 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
+C1035 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
+C1036 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
+C1037 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1038 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
+C1039 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
+C1040 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1041 filter_0/v divbuf_25/a_492_n240# 0.00fF
+C1042 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
+C1043 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
+C1044 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
+C1045 divider_1/prescaler_0/Out divider_1/clk 0.51fF
+C1046 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C1047 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C1048 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1049 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
+C1050 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
+C1051 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
+C1052 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
+C1053 pd_1/DOWN pd_1/UP 0.46fF
+C1054 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
+C1055 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
+C1056 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
+C1057 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
+C1058 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
+C1059 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1060 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1061 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
+C1062 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
+C1063 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
+C1064 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
+C1065 divbuf_21/IN divbuf_21/OUT5 0.00fF
+C1066 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
+C1067 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
+C1068 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
+C1069 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z1 0.71fF
+C1070 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
+C1071 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
+C1072 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF
+C1073 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
+C1074 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
+C1075 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
+C1076 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
+C1077 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
+C1078 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
+C1079 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
+C1080 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
+C1081 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
+C1082 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
+C1083 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
+C1084 divbuf_15/OUT divbuf_15/OUT3 0.26fF
+C1085 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C1086 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
+C1087 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF
+C1088 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
+C1089 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
+C1090 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
+C1091 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
+C1092 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
+C1093 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
+C1094 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1095 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
+C1096 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C1097 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C1098 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
+C1099 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
+C1100 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
+C1101 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
+C1102 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
+C1103 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
+C1104 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
+C1105 divbuf_0/OUT4 divbuf_0/OUT 1.11fF
+C1106 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
+C1107 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C1108 divbuf_3/OUT divbuf_3/OUT4 1.11fF
+C1109 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
+C1110 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
+C1111 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1112 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
+C1113 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
+C1114 divbuf_8/IN divbuf_8/OUT5 0.00fF
+C1115 divider_2/mc2 divider_2/and_0/OUT 0.05fF
+C1116 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
+C1117 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
+C1118 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
+C1119 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
+C1120 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
+C1121 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
+C1122 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
+C1123 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
+C1124 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
+C1125 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
+C1126 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C1127 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
+C1128 divider_0/mc2 divider_0/and_0/OUT 0.05fF
+C1129 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
+C1130 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
+C1131 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
+C1132 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
+C1133 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
+C1134 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
+C1135 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
+C1136 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
+C1137 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
+C1138 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
+C1139 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
+C1140 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
+C1141 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
+C1142 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
+C1143 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF
+C1144 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
+C1145 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
+C1146 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
+C1147 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
+C1148 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
+C1149 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
+C1150 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1151 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
+C1152 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
+C1153 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
+C1154 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
+C1155 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
+C1156 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
+C1157 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
+C1158 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
+C1159 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C1160 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
+C1161 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
+C1162 divbuf_14/IN divbuf_14/OUT5 0.00fF
+C1163 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
+C1164 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
+C1165 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1166 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
+C1167 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
+C1168 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
+C1169 divbuf_13/IN divbuf_13/OUT5 0.00fF
+C1170 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
+C1171 divbuf_5/OUT divbuf_6/OUT 3.23fF
+C1172 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C1173 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C1174 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C1175 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
+C1176 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C1177 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1178 divider_1/mc2 divider_1/nor_1/B 0.15fF
+C1179 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1180 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
+C1181 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1182 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C1183 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
+C1184 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
+C1185 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
+C1186 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
+C1187 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
+C1188 divbuf_2/OUT divbuf_2/OUT3 0.26fF
+C1189 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
+C1190 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
+C1191 divbuf_6/OUT divbuf_6/OUT3 0.26fF
+C1192 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
+C1193 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
+C1194 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
+C1195 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
+C1196 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
+C1197 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF
+C1198 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
+C1199 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
+C1200 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C1201 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
+C1202 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
+C1203 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF
+C1204 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
+C1205 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
+C1206 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
+C1207 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/Z3 0.38fF
+C1208 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
+C1209 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
+C1210 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
+C1211 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
+C1212 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
+C1213 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
+C1214 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
+C1215 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
+C1216 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
+C1217 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
+C1218 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
+C1219 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
+C1220 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C1221 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C1222 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
+C1223 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
+C1224 io_analog[5] io_clamp_high[1] 0.53fF
+C1225 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
+C1226 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
+C1227 divbuf_0/OUT5 divbuf_0/OUT 43.38fF
+C1228 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1229 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
+C1230 divbuf_4/OUT divbuf_4/OUT2 0.06fF
+C1231 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
+C1232 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1233 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
+C1234 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
+C1235 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
+C1236 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1237 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
+C1238 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF
+C1239 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
+C1240 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
+C1241 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
+C1242 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
+C1243 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
+C1244 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
+C1245 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1246 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C1247 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
+C1248 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF
+C1249 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
+C1250 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
+C1251 pd_0/DOWN pd_0/UP 0.46fF
+C1252 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
+C1253 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
+C1254 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C1255 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
+C1256 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
+C1257 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
+C1258 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
+C1259 divbuf_0/OUT divbuf_0/OUT2 0.06fF
+C1260 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C1261 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
+C1262 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
+C1263 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1264 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
+C1265 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
+C1266 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
+C1267 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
+C1268 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
+C1269 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C1270 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
+C1271 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
+C1272 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
+C1273 divbuf_1/OUT5 divbuf_1/IN 0.00fF
+C1274 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1275 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
+C1276 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
+C1277 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
+C1278 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
+C1279 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
+C1280 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1281 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
+C1282 pd_0/DOWN pd_0/R 0.36fF
+C1283 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
+C1284 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
+C1285 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
+C1286 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
+C1287 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
+C1288 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
+C1289 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
+C1290 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
+C1291 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C1292 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
+C1293 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
+C1294 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
+C1295 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C1296 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
+C1297 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C1298 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1299 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
+C1300 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
+C1301 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1302 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
+C1303 divider_2/prescaler_0/Out divider_2/clk 0.51fF
+C1304 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
+C1305 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
+C1306 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
+C1307 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
+C1308 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
+C1309 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
+C1310 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
+C1311 divbuf_2/OUT divbuf_2/OUT5 43.38fF
+C1312 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF
+C1313 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
+C1314 divider_1/mc2 divider_1/nor_0/A 0.04fF
+C1315 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
+C1316 divbuf_6/OUT divbuf_6/OUT5 43.38fF
+C1317 divbuf_3/IN divbuf_3/OUT5 0.00fF
+C1318 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C1319 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1320 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
+C1321 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
+C1322 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
+C1323 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C1324 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C1325 divider_1/nor_0/B divider_1/nor_1/B 0.47fF
+C1326 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
+C1327 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
+C1328 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
+C1329 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
+C1330 divbuf_16/OUT divbuf_16/OUT5 43.38fF
+C1331 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
+C1332 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
+C1333 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
+C1334 cp_0/a_1710_0# cp_0/out 0.84fF
+C1335 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
+C1336 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
+C1337 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF
+C1338 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
+C1339 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF
+C1340 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
+C1341 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
+C1342 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
+C1343 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF
+C1344 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
+C1345 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
+C1346 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
+C1347 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C1348 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1349 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C1350 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C1351 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
+C1352 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
+C1353 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
+C1354 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
+C1355 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
+C1356 io_analog[4] io_clamp_low[0] 0.53fF
+C1357 divbuf_0/OUT4 divbuf_0/OUT3 5.16fF
+C1358 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
+C1359 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C1360 divbuf_4/OUT divbuf_4/OUT4 1.11fF
+C1361 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT 0.00fF
+C1362 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
+C1363 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C1364 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
+C1365 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
+C1366 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
+C1367 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1368 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
+C1369 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
+C1370 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
+C1371 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
+C1372 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
+C1373 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1374 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
+C1375 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
+C1376 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
+C1377 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
+C1378 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
+C1379 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C1380 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
+C1381 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
+C1382 filter_0/v divbuf_25/OUT2 0.06fF
+C1383 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
+C1384 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
+C1385 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
+C1386 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
+C1387 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
+C1388 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF
+C1389 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF
+C1390 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
+C1391 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
+C1392 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C1393 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
+C1394 divider_1/mc2 divider_1/and_0/B 0.20fF
+C1395 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
+C1396 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT2 0.42fF
+C1397 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
+C1398 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
+C1399 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
+C1400 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
+C1401 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
+C1402 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
+C1403 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
+C1404 pd_1/R pd_1/and_pd_0/Z1 0.02fF
+C1405 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1406 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
+C1407 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
+C1408 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C1409 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT3 5.16fF
+C1410 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
+C1411 divider_0/nor_0/B divider_0/and_0/B 0.31fF
+C1412 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
+C1413 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
+C1414 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
+C1415 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
+C1416 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
+C1417 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
+C1418 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
+C1419 divbuf_20/IN divbuf_20/OUT5 0.00fF
+C1420 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
+C1421 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
+C1422 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF
+C1423 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
+C1424 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
+C1425 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
+C1426 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
+C1427 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
+C1428 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
+C1429 divbuf_4/OUT divbuf_3/OUT 2.71fF
+C1430 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
+C1431 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
+C1432 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
+C1433 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1434 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1435 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
+C1436 divider_0/and_0/OUT divider_0/clk 0.04fF
+C1437 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C1438 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
+C1439 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1440 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
+C1441 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
+C1442 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1443 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1444 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
+C1445 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
+C1446 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
+C1447 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
+C1448 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
+C1449 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
+C1450 divbuf_6/OUT divbuf_7/OUT 2.98fF
+C1451 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
+C1452 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
+C1453 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1454 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C1455 divider_0/nor_0/A divider_0/and_0/A 0.01fF
+C1456 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
+C1457 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
+C1458 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
+C1459 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C1460 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1461 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
+C1462 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
+C1463 divbuf_16/OUT divbuf_16/OUT4 1.11fF
+C1464 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
+C1465 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
+C1466 pd_1/tspc_r_0/Z4 pd_1/DIV 0.02fF
+C1467 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
+C1468 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
+C1469 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
+C1470 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
+C1471 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
+C1472 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
+C1473 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
+C1474 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
+C1475 divbuf_3/OUT divbuf_3/OUT2 0.06fF
+C1476 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C1477 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
+C1478 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1479 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
+C1480 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
+C1481 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
+C1482 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
+C1483 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
+C1484 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
+C1485 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
+C1486 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1487 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1488 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C1489 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
+C1490 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
+C1491 divbuf_22/IN divbuf_22/OUT5 0.00fF
+C1492 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
+C1493 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
+C1494 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
+C1495 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C1496 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
+C1497 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1498 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
+C1499 divbuf_5/OUT divbuf_5/OUT2 0.06fF
+C1500 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT5 0.02fF
+C1501 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
+C1502 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
+C1503 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
+C1504 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
+C1505 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
+C1506 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
+C1507 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
+C1508 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF
+C1509 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
+C1510 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
+C1511 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1512 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1513 divbuf_25/IN divbuf_25/OUT5 0.00fF
+C1514 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
+C1515 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
+C1516 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1517 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1518 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
+C1519 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF
+C1520 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF
+C1521 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
+C1522 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
+C1523 divider_2/mc2 divider_2/and_0/out1 0.06fF
+C1524 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
+C1525 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
+C1526 divbuf_15/OUT5 divbuf_15/OUT 43.38fF
+C1527 divider_0/mc2 divider_0/and_0/out1 0.06fF
+C1528 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
+C1529 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
+C1530 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
+C1531 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
+C1532 divider_0/and_0/A divider_0/and_0/B 0.18fF
+C1533 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
+C1534 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
+C1535 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1536 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
+C1537 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
+C1538 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
+C1539 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
+C1540 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
+C1541 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
+C1542 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
+C1543 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
+C1544 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
+C1545 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
+C1546 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
+C1547 divider_2/nor_1/B divider_2/and_0/B 0.29fF
+C1548 divbuf_9/IN divbuf_9/OUT5 0.00fF
+C1549 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF
+C1550 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1551 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
+C1552 divider_0/mc2 divider_0/nor_0/B 0.06fF
+C1553 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
+C1554 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
+C1555 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF
+C1556 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1557 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
+C1558 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
+C1559 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
+C1560 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
+C1561 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
+C1562 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1563 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1564 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
+C1565 divider_1/nor_0/B divider_1/and_0/B 0.31fF
+C1566 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
+C1567 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
+C1568 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
+C1569 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF
+C1570 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
+C1571 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
+C1572 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
+C1573 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
+C1574 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1575 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
+C1576 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C1577 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF
+C1578 divider_1/mc2 divider_1/and_0/OUT 0.05fF
+C1579 divbuf_14/OUT divbuf_14/OUT4 1.11fF
+C1580 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
+C1581 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
+C1582 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
+C1583 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
+C1584 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
+C1585 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1586 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1587 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
+C1588 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
+C1589 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1590 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1591 divider_1/and_0/OUT divider_1/clk 0.04fF
+C1592 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
+C1593 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
+C1594 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
+C1595 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
+C1596 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
+C1597 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
+C1598 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
+C1599 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
+C1600 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
+C1601 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
+C1602 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF
+C1603 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF
+C1604 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
+C1605 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
+C1606 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
+C1607 divider_0/Out divider_0/nor_1/B 0.22fF
+C1608 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
+C1609 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
+C1610 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
+C1611 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
+C1612 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
+C1613 filter_0/v divbuf_25/OUT3 0.26fF
+C1614 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
+C1615 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
+C1616 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1617 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
+C1618 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
+C1619 divider_1/nor_0/A divider_1/and_0/A 0.01fF
+C1620 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
+C1621 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
+C1622 divbuf_19/OUT divbuf_19/OUT3 0.26fF
+C1623 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF
+C1624 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
+C1625 divbuf_0/IN divbuf_0/OUT5 0.00fF
+C1626 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
+C1627 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
+C1628 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1629 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
+C1630 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
+C1631 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
+C1632 divbuf_17/IN divbuf_17/OUT5 0.00fF
+C1633 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
+C1634 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
+C1635 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
+C1636 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
+C1637 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
+C1638 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
+C1639 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
+C1640 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1641 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1642 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
+C1643 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
+C1644 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
+C1645 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
+C1646 divider_2/mc2 divider_2/nor_0/B 0.06fF
+C1647 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
+C1648 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
+C1649 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
+C1650 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
+C1651 divbuf_0/OUT divbuf_0/OUT3 0.26fF
+C1652 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF
+C1653 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1654 divbuf_5/OUT divbuf_5/OUT4 1.11fF
+C1655 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT 0.26fF
+C1656 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT5 20.26fF
+C1657 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1658 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
+C1659 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
+C1660 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
+C1661 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1662 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
+C1663 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C1664 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
 Xpd_0 vdda1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
 Xpd_1 vdda1 vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd
 Xcp_0 cp_0/vbias vdda1 gnd cp_0/out cp_0/down cp_0/upbar cp
@@ -1863,8 +1863,8 @@
 C1690 io_oeb[2] gnd 0.61fF
 C1691 io_in_3v3[24] gnd 0.61fF
 C1692 io_in_3v3[3] gnd 0.61fF
-C1693 gpio_noesd[17] gnd 2.32fF
-C1694 io_in[3] gnd 0.61fF
+C1693 io_in[3] gnd 0.61fF
+C1694 gpio_noesd[17] gnd 2.32fF
 C1695 gpio_analog[17] gnd 2.30fF
 C1696 io_out[3] gnd 0.61fF
 C1697 io_oeb[3] gnd 0.61fF
@@ -2599,14 +2599,14 @@
 C2426 pll_full_0/cp_0/a_6370_0# gnd 0.40fF **FLOATING
 C2427 pll_full_0/cp_0/a_3060_0# gnd 2.49fF **FLOATING
 C2428 pll_full_0/cp_0/a_1710_0# gnd 7.47fF **FLOATING
-C2429 pll_full_0/pd_0/and_pd_0/Z1 gnd 0.39fF
-C2430 pll_full_0/pd_0/and_pd_0/Out1 gnd 2.22fF
-C2431 pll_full_0/pd_0/tspc_r_1/z5 gnd 1.10fF
-C2432 pll_full_0/pd_0/tspc_r_1/Z4 gnd 1.07fF
-C2433 pll_full_0/pd_0/tspc_r_1/Qbar gnd 0.88fF
-C2434 pll_full_0/pd_0/tspc_r_1/Z2 gnd 1.22fF
-C2435 pll_full_0/pd_0/tspc_r_1/Z1 gnd 0.67fF
-C2436 pll_full_0/pd_0/UP gnd 6.41fF
+C2429 pll_full_0/pd_0/UP gnd 6.41fF
+C2430 pll_full_0/pd_0/and_pd_0/Z1 gnd 0.39fF
+C2431 pll_full_0/pd_0/and_pd_0/Out1 gnd 2.22fF
+C2432 pll_full_0/pd_0/tspc_r_1/z5 gnd 1.10fF
+C2433 pll_full_0/pd_0/tspc_r_1/Z4 gnd 1.07fF
+C2434 pll_full_0/pd_0/tspc_r_1/Qbar gnd 0.88fF
+C2435 pll_full_0/pd_0/tspc_r_1/Z2 gnd 1.22fF
+C2436 pll_full_0/pd_0/tspc_r_1/Z1 gnd 0.67fF
 C2437 pll_full_0/pd_0/tspc_r_1/Qbar1 gnd 1.34fF
 C2438 pll_full_0/pd_0/tspc_r_1/Z3 gnd 2.12fF
 C2439 pll_full_0/pd_0/REF gnd 6.48fF
@@ -3031,14 +3031,14 @@
 C2858 cp_0/a_1710_0# gnd 5.89fF **FLOATING
 C2859 cp_0/a_1710_n2840# gnd 4.91fF **FLOATING
 C2860 cp_0/a_10_n50# gnd 2.96fF **FLOATING
-C2861 pd_1/and_pd_0/Z1 gnd 0.39fF
-C2862 pd_1/and_pd_0/Out1 gnd 2.22fF
-C2863 pd_1/tspc_r_1/z5 gnd 1.10fF
-C2864 pd_1/tspc_r_1/Z4 gnd 1.07fF
-C2865 pd_1/tspc_r_1/Qbar gnd 0.88fF
-C2866 pd_1/tspc_r_1/Z2 gnd 1.22fF
-C2867 pd_1/tspc_r_1/Z1 gnd 0.67fF
-C2868 pd_1/UP gnd 2.21fF
+C2861 pd_1/UP gnd 2.21fF
+C2862 pd_1/and_pd_0/Z1 gnd 0.39fF
+C2863 pd_1/and_pd_0/Out1 gnd 2.22fF
+C2864 pd_1/tspc_r_1/z5 gnd 1.10fF
+C2865 pd_1/tspc_r_1/Z4 gnd 1.07fF
+C2866 pd_1/tspc_r_1/Qbar gnd 0.88fF
+C2867 pd_1/tspc_r_1/Z2 gnd 1.22fF
+C2868 pd_1/tspc_r_1/Z1 gnd 0.67fF
 C2869 pd_1/tspc_r_1/Qbar1 gnd 1.34fF
 C2870 pd_1/tspc_r_1/Z3 gnd 2.12fF
 C2871 pd_1/REF gnd 1.80fF
@@ -3052,14 +3052,14 @@
 C2879 pd_1/tspc_r_0/Qbar1 gnd 1.34fF
 C2880 pd_1/tspc_r_0/Z3 gnd 2.12fF
 C2881 pd_1/DIV gnd 1.82fF
-C2882 pd_0/and_pd_0/Z1 gnd 0.39fF
-C2883 pd_0/and_pd_0/Out1 gnd 2.22fF
-C2884 pd_0/tspc_r_1/z5 gnd 1.10fF
-C2885 pd_0/tspc_r_1/Z4 gnd 1.07fF
-C2886 pd_0/tspc_r_1/Qbar gnd 0.88fF
-C2887 pd_0/tspc_r_1/Z2 gnd 1.22fF
-C2888 pd_0/tspc_r_1/Z1 gnd 0.67fF
-C2889 pd_0/UP gnd 2.21fF
+C2882 pd_0/UP gnd 2.21fF
+C2883 pd_0/and_pd_0/Z1 gnd 0.39fF
+C2884 pd_0/and_pd_0/Out1 gnd 2.22fF
+C2885 pd_0/tspc_r_1/z5 gnd 1.10fF
+C2886 pd_0/tspc_r_1/Z4 gnd 1.07fF
+C2887 pd_0/tspc_r_1/Qbar gnd 0.88fF
+C2888 pd_0/tspc_r_1/Z2 gnd 1.22fF
+C2889 pd_0/tspc_r_1/Z1 gnd 0.67fF
 C2890 pd_0/tspc_r_1/Qbar1 gnd 1.34fF
 C2891 pd_0/tspc_r_1/Z3 gnd 2.12fF
 C2892 pd_0/REF gnd 1.80fF