diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
new file mode 100644
index 0000000..5cc3977
--- /dev/null
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 4f03b90..c6f025f 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@
 magic
 tech sky130A
-timestamp 1647119365
+timestamp 1647284393
 << nwell >>
 rect 26424 264625 26589 264812
 rect 23497 264291 23832 264611
@@ -9435,13 +9435,14 @@
 rect 280813 73748 281123 75451
 rect 282980 73748 292400 75451
 rect 280813 73656 292400 73748
-rect 280813 73516 288755 73656
+rect 280813 73527 288755 73656
+rect 280813 73516 286531 73527
+rect 291170 73415 292400 73656
 rect 164819 70727 166240 70810
 rect 164819 69552 164892 70727
 rect 166158 69552 166240 70727
 rect 164819 69461 166240 69552
-rect 287067 70535 288755 73516
-rect 291170 73415 292400 73656
+rect 287067 70535 288755 70545
 rect 291170 70535 292400 70815
 rect 287067 68984 292400 70535
 rect 287095 68642 292400 68984
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index 59e1e71..9a0f52b 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -106,2045 +106,2045 @@
 + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
 + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
 + wbs_stb_i wbs_we_i
-C0 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
-C1 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
-C2 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
-C3 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C4 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
-C5 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF
-C6 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
-C7 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
-C8 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
-C9 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
-C10 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C11 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
-C12 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.29fF
-C13 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
-C14 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
-C15 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
-C16 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C17 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C18 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
-C19 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C20 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C21 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF
-C22 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
-C23 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
-C24 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C25 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF
-C26 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/A 0.15fF
-C27 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF
-C28 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/clk 0.01fF
-C29 divider_1/mc2 divider_1/and_0/B 0.20fF
-C30 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
-C31 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
-C32 io_clamp_high[1] io_analog[5] 0.53fF
-C33 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
-C34 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.27fF
-C35 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
-C36 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
-C37 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
-C38 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
-C39 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
-C40 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
-C41 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
-C42 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C43 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
-C44 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
-C45 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C46 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C47 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/divider_0/clk 1.46fF
-C48 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
-C49 divider_0/nor_0/B divider_0/and_0/B 0.31fF
-C50 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
-C51 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
-C52 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C53 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF
-C54 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Out1 0.33fF
-C55 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
-C56 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
-C57 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
-C58 divbuf_20/IN divbuf_20/OUT5 0.00fF
-C59 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
-C60 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
-C61 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
-C62 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
-C63 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
-C64 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
-C65 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C66 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C67 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF
-C68 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
-C69 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
-C70 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
-C71 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
-C72 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
-C73 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
-C74 divbuf_4/OUT divbuf_3/OUT 2.71fF
-C75 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
-C76 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Z1 0.06fF
-C77 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
-C78 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z2 0.01fF
-C79 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z3 0.45fF
-C80 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C81 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C82 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C83 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
-C84 divider_0/and_0/OUT divider_0/clk 0.04fF
-C85 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
-C86 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
-C87 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C88 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF
-C89 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
-C90 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF
-C91 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C92 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
-C93 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
-C94 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C95 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
-C96 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
-C97 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
-C98 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
-C99 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
-C100 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
-C101 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
-C102 divbuf_6/OUT divbuf_7/OUT 2.98fF
-C103 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C104 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
-C105 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
-C106 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C107 divider_0/nor_0/A divider_0/and_0/A 0.01fF
-C108 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
-C109 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
-C110 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
-C111 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.30fF
-C112 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF
-C113 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C114 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C115 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
-C116 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
-C117 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
-C118 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
-C119 divbuf_16/OUT divbuf_16/OUT4 1.11fF
-C120 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
-C121 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
-C122 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C123 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
-C124 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
-C125 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
-C126 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C127 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF
-C128 divbuf_3/OUT divbuf_3/OUT2 0.06fF
-C129 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
-C130 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C131 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
-C132 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
-C133 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
-C134 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
-C135 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
-C136 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
-C137 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
-C138 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
-C139 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
-C140 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
-C141 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
-C142 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF
-C143 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
-C144 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
-C145 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C146 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C147 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
-C148 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
-C149 divbuf_22/IN divbuf_22/OUT5 0.00fF
-C150 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF
-C151 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
-C152 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
-C153 pd_1/R pd_1/and_pd_0/Z1 0.02fF
-C154 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
-C155 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C156 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
-C157 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C158 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C159 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
-C160 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C161 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z4 0.21fF
-C162 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/nor_1/B 0.38fF
-C163 divbuf_5/OUT divbuf_5/OUT2 0.06fF
-C164 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
-C165 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
-C166 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/B 0.08fF
-C167 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
-C168 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
-C169 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
-C170 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z4 0.04fF
-C171 pd_0/R pd_0/UP 0.45fF
-C172 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT3 0.01fF
-C173 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C174 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
-C175 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
-C176 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
-C177 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF
-C178 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
-C179 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF
-C180 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
-C181 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C182 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C183 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF
-C184 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/clk 0.11fF
-C185 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF
-C186 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
-C187 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C188 divbuf_25/IN divbuf_25/OUT5 0.00fF
-C189 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
-C190 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
-C191 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF
-C192 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF
-C193 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C194 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
-C195 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
-C196 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
-C197 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT3 1.37fF
-C198 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT4 1.11fF
-C199 pd_1/DOWN pd_1/R 0.36fF
-C200 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
-C201 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
-C202 divider_2/mc2 divider_2/and_0/out1 0.06fF
-C203 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
-C204 divbuf_15/OUT5 divbuf_15/OUT 43.38fF
-C205 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.01fF
-C206 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C207 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF
-C208 pll_full_1/ro_complete_0/a2 pll_full_1/divider_0/clk 0.11fF
-C209 divider_0/mc2 divider_0/and_0/out1 0.06fF
-C210 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
-C211 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF
-C212 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF
-C213 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
-C214 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
-C215 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C216 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
-C217 divider_0/and_0/A divider_0/and_0/B 0.18fF
-C218 io_clamp_low[0] io_analog[4] 0.53fF
-C219 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
-C220 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
-C221 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
-C222 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
-C223 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
-C224 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
-C225 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
-C226 divbuf_9/IN divbuf_9/OUT5 0.00fF
-C227 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT2 1.37fF
-C228 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
-C229 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
-C230 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
-C231 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
-C232 divider_2/nor_1/B divider_2/and_0/B 0.29fF
-C233 divider_0/mc2 divider_0/nor_0/B 0.06fF
-C234 divbuf_0/OUT divbuf_0/OUT2 0.06fF
-C235 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF
-C236 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C237 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.04fF
-C238 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C239 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/divider_0/clk 1.58fF
-C240 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
-C241 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
-C242 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
-C243 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
-C244 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z2 0.23fF
-C245 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
-C246 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
-C247 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
-C248 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
-C249 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
-C250 divider_1/nor_0/B divider_1/and_0/B 0.31fF
-C251 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
-C252 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
-C253 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF
-C254 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF
-C255 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
-C256 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
-C257 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
-C258 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
-C259 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF
-C260 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
-C261 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
-C262 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C263 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
-C264 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
-C265 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
-C266 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C267 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C268 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z4 0.15fF
-C269 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_1/B 0.22fF
-C270 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C271 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C272 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
-C273 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF
-C274 divider_1/mc2 divider_1/and_0/OUT 0.05fF
-C275 divbuf_14/OUT divbuf_14/OUT4 1.11fF
-C276 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
-C277 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
-C278 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
-C279 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF
-C280 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
-C281 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C282 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
-C283 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
-C284 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
-C285 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
-C286 divider_1/and_0/OUT divider_1/clk 0.04fF
-C287 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
-C288 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
-C289 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
-C290 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
-C291 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
-C292 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
-C293 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
-C294 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
-C295 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
-C296 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
-C297 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C298 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C299 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
-C300 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
-C301 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
-C302 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
-C303 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
-C304 divider_0/Out divider_0/nor_1/B 0.22fF
-C305 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF
-C306 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF
-C307 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/Z3 0.05fF
-C308 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/clk 0.11fF
-C309 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
-C310 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
-C311 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
-C312 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT5 0.01fF
-C313 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
-C314 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C315 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
-C316 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
-C317 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
-C318 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
-C319 divider_1/nor_0/A divider_1/and_0/A 0.01fF
-C320 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
-C321 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
-C322 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
-C323 divbuf_19/OUT divbuf_19/OUT3 0.26fF
-C324 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF
-C325 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
-C326 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF
-C327 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C328 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C329 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
-C330 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
-C331 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
-C332 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
-C333 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
-C334 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
-C335 divbuf_17/IN divbuf_17/OUT5 0.00fF
-C336 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
-C337 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
-C338 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
-C339 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C340 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C341 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
-C342 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
-C343 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
-C344 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
-C345 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
-C346 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
-C347 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
-C348 divider_2/mc2 divider_2/nor_0/B 0.06fF
-C349 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
-C350 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
-C351 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
-C352 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
-C353 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
-C354 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
-C355 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
-C356 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
-C357 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
-C358 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF
-C359 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C360 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C361 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/divider_0/clk 1.46fF
-C362 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
-C363 divbuf_5/OUT divbuf_5/OUT4 1.11fF
-C364 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C365 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
-C366 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
-C367 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C368 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
-C369 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C370 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
-C371 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
-C372 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
-C373 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
-C374 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
-C375 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
-C376 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
-C377 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
-C378 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
-C379 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
-C380 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C381 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF
-C382 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C383 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/clk 0.51fF
-C384 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
-C385 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
-C386 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
-C387 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF
-C388 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
-C389 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
-C390 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
-C391 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C392 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C393 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
-C394 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT4 5.16fF
-C395 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT5 43.38fF
-C396 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
-C397 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
-C398 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
-C399 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
-C400 divider_2/mc2 divider_2/and_0/A 0.16fF
-C401 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
-C402 io_clamp_low[1] io_clamp_high[1] 0.53fF
-C403 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF
-C404 divbuf_2/IN divbuf_2/OUT5 0.00fF
-C405 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C406 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
-C407 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
-C408 divider_0/mc2 divider_0/and_0/A 0.16fF
-C409 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
-C410 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C411 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF
-C412 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/clk 0.11fF
-C413 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
-C414 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
-C415 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
-C416 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
-C417 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
-C418 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C419 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
-C420 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
-C421 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
-C422 divider_1/and_0/A divider_1/and_0/B 0.18fF
-C423 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
-C424 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
-C425 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
-C426 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
-C427 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
-C428 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
-C429 divider_2/nor_0/B divider_2/and_0/A 0.26fF
-C430 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C431 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C432 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
-C433 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C434 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
-C435 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C436 divbuf_1/OUT divbuf_1/OUT4 1.11fF
-C437 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
-C438 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF
-C439 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
-C440 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
-C441 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
-C442 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
-C443 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF
-C444 divbuf_7/OUT divbuf_7/OUT3 0.26fF
-C445 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
-C446 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
-C447 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
-C448 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
-C449 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
-C450 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C451 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
-C452 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
-C453 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT2 0.06fF
-C454 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C455 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C456 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C457 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
-C458 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
-C459 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
-C460 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
-C461 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
-C462 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
-C463 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF
-C464 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
-C465 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C466 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C467 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/clk 0.14fF
-C468 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.78fF
-C469 divbuf_14/OUT divbuf_14/OUT3 0.26fF
-C470 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
-C471 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
-C472 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
-C473 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
-C474 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
-C475 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
-C476 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
-C477 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
-C478 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
-C479 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
-C480 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
-C481 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
-C482 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
-C483 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
-C484 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
-C485 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
-C486 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
-C487 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
-C488 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
-C489 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
-C490 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
-C491 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
-C492 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
-C493 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C494 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF
-C495 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
-C496 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
-C497 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
-C498 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
-C499 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
-C500 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
-C501 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
-C502 divider_1/Out divider_1/nor_1/B 0.22fF
-C503 filter_0/v divbuf_25/OUT4 1.11fF
-C504 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C505 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
-C506 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
-C507 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
-C508 pd_1/R pd_1/REF 0.61fF
-C509 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C510 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
-C511 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
-C512 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C513 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
-C514 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z4 0.12fF
-C515 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z3 0.45fF
-C516 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/nor_1/B 0.40fF
-C517 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C518 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
-C519 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
-C520 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
-C521 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
-C522 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF
-C523 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF
-C524 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
-C525 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
-C526 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
-C527 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
-C528 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF
-C529 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF
-C530 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
-C531 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C532 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
-C533 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
-C534 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
-C535 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
-C536 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
-C537 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
-C538 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
-C539 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
-C540 cp_0/upbar cp_0/down 0.02fF
-C541 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
-C542 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
-C543 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
-C544 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
-C545 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
-C546 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C547 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C548 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
-C549 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
-C550 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
-C551 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
-C552 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
-C553 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C554 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
-C555 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
-C556 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
-C557 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
-C558 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF
-C559 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
-C560 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
-C561 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
-C562 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
-C563 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
-C564 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
-C565 divider_2/nor_0/A divider_2/and_0/B 0.08fF
-C566 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C567 divbuf_2/OUT divbuf_2/OUT2 0.06fF
-C568 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
-C569 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
-C570 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
-C571 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C572 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
-C573 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
-C574 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
-C575 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
-C576 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
-C577 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
-C578 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C579 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF
-C580 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
-C581 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
-C582 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
-C583 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
-C584 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
-C585 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
-C586 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
-C587 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
-C588 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
-C589 divbuf_15/OUT divbuf_15/OUT2 0.06fF
-C590 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
-C591 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C592 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
-C593 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
-C594 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C595 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C596 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF
-C597 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C598 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
-C599 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Z3 0.03fF
-C600 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
-C601 divbuf_10/IN divbuf_10/OUT5 0.00fF
-C602 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
-C603 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C604 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
-C605 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
-C606 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
-C607 cp_0/a_1710_n2840# cp_0/out 0.61fF
-C608 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
-C609 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
-C610 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
-C611 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
-C612 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
-C613 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C614 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF
-C615 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF
-C616 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
-C617 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z4 0.15fF
-C618 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C619 pll_full_1/ro_complete_0/a0 pll_full_1/divider_0/clk 0.11fF
-C620 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
-C621 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C622 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
-C623 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
-C624 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF
-C625 divbuf_3/OUT divbuf_3/OUT3 0.26fF
-C626 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
-C627 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF
-C628 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
-C629 divbuf_7/OUT divbuf_7/OUT5 43.38fF
-C630 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
-C631 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
-C632 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
-C633 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
-C634 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
-C635 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
-C636 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF
-C637 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
-C638 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
-C639 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT 0.06fF
-C640 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT5 0.01fF
-C641 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C642 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
-C643 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C644 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
-C645 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
-C646 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
-C647 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
-C648 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
-C649 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C650 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
-C651 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
-C652 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
-C653 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
-C654 pd_0/R pd_0/and_pd_0/Z1 0.02fF
-C655 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
-C656 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
-C657 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
-C658 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
-C659 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
-C660 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
-C661 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
-C662 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C663 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
-C664 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF
-C665 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
-C666 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
-C667 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
-C668 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
-C669 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
-C670 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
-C671 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
-C672 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
-C673 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
-C674 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
-C675 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
-C676 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
-C677 divbuf_11/IN divbuf_11/OUT5 0.00fF
-C678 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/a_492_n240# 0.00fF
-C679 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
-C680 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
-C681 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
-C682 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
-C683 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
-C684 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
-C685 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
-C686 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
-C687 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
-C688 pll_full_1/ro_complete_0/a3 pll_full_1/divider_0/clk 0.11fF
-C689 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C690 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF
-C691 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
-C692 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
-C693 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
-C694 filter_0/v divbuf_25/a_492_n240# 0.00fF
-C695 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C696 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
-C697 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
-C698 pd_0/DIV pd_0/R 0.51fF
-C699 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
-C700 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C701 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
-C702 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C703 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
-C704 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
-C705 divbuf_4/OUT divbuf_2/OUT 1.95fF
-C706 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C707 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
-C708 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C709 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF
-C710 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
-C711 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
-C712 pll_full_1/pd_0/UP pll_full_1/pd_0/DOWN 4.58fF
-C713 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
-C714 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
-C715 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C716 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
-C717 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
-C718 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z4 0.14fF
-C719 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
-C720 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
-C721 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
-C722 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
-C723 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
-C724 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
-C725 filter_0/a_4216_n2998# filter_0/v 0.36fF
-C726 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
-C727 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
-C728 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
-C729 divbuf_6/OUT divbuf_6/OUT2 0.06fF
-C730 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
-C731 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
-C732 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF
-C733 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
-C734 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
-C735 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
-C736 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
-C737 divbuf_23/IN divbuf_23/OUT5 0.00fF
-C738 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
-C739 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
-C740 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
-C741 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
-C742 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C743 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C744 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C745 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
-C746 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
-C747 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C748 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
-C749 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
-C750 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
-C751 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
-C752 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
-C753 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C754 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
-C755 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
-C756 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
-C757 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
-C758 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
-C759 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
-C760 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
-C761 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
-C762 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C763 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
-C764 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_1/B 0.47fF
-C765 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z4 0.65fF
-C766 divbuf_3/OUT divbuf_3/OUT5 43.38fF
-C767 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
-C768 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
-C769 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
-C770 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C771 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF
-C772 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
-C773 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
-C774 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF
-C775 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
-C776 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
-C777 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF
-C778 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
-C779 pd_0/DOWN pd_0/UP 0.46fF
-C780 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
-C781 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
-C782 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
-C783 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT 1.11fF
-C784 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
-C785 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF
-C786 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
-C787 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
-C788 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
-C789 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
-C790 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
-C791 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
-C792 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C793 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C794 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
-C795 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
-C796 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
-C797 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
-C798 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
-C799 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF
-C800 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C801 divbuf_16/IN divbuf_16/OUT5 0.00fF
-C802 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
-C803 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
-C804 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C805 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
-C806 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
-C807 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_1/Q 0.14fF
-C808 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.04fF
-C809 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
-C810 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
-C811 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
-C812 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
-C813 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
-C814 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
-C815 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
-C816 divider_1/mc2 divider_1/and_0/out1 0.06fF
-C817 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
-C818 io_clamp_high[2] io_analog[6] 0.53fF
-C819 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
-C820 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
-C821 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
-C822 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
-C823 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
-C824 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
-C825 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
-C826 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
-C827 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
-C828 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
-C829 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.18fF
-C830 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C831 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
-C832 divider_1/mc2 divider_1/nor_0/B 0.06fF
-C833 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
-C834 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
-C835 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
-C836 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF
-C837 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
-C838 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF
-C839 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF
-C840 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C841 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
-C842 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
-C843 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
-C844 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
-C845 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
-C846 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
-C847 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
-C848 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C849 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
-C850 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF
-C851 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
-C852 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
-C853 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
-C854 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
-C855 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
-C856 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
-C857 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
-C858 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
-C859 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
-C860 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
-C861 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
-C862 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
-C863 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C864 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
-C865 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C866 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
-C867 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
-C868 divbuf_2/OUT divbuf_2/OUT4 1.11fF
-C869 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C870 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.04fF
-C871 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF
-C872 divbuf_6/OUT divbuf_6/OUT4 1.11fF
-C873 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
-C874 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
-C875 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
-C876 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C877 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF
-C878 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
-C879 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
-C880 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT3 0.26fF
-C881 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
-C882 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
-C883 pll_full_1/pd_0/DIV pll_full_1/divider_0/and_0/OUT 0.01fF
-C884 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C885 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
-C886 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
-C887 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z1 0.03fF
-C888 pll_full_1/ro_complete_0/a4 pll_full_1/divider_0/clk 0.01fF
-C889 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
-C890 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
-C891 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
-C892 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
-C893 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
-C894 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
-C895 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF
-C896 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/nor_0/A 0.03fF
-C897 divider_2/Out divider_2/nor_1/B 0.22fF
-C898 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C899 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
-C900 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C901 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
-C902 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
-C903 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
-C904 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
-C905 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
-C906 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
-C907 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C908 cp_0/a_10_n50# cp_0/vbias 0.19fF
-C909 pd_1/R pd_1/and_pd_0/Out1 0.33fF
-C910 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
-C911 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
-C912 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
-C913 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C914 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C915 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C916 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z2 0.30fF
-C917 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
-C918 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
-C919 divbuf_4/OUT divbuf_4/OUT3 0.26fF
-C920 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
-C921 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
-C922 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
-C923 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C924 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar1 0.11fF
-C925 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
-C926 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
-C927 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
-C928 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
-C929 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
-C930 pd_0/R pd_0/REF 0.61fF
-C931 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
-C932 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C933 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
-C934 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
-C935 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C936 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C937 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z3 0.45fF
-C938 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/A 1.21fF
-C939 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
-C940 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
-C941 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
-C942 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF
-C943 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
-C944 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
-C945 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
-C946 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
-C947 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
-C948 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
-C949 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF
-C950 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
-C951 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
-C952 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
-C953 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
-C954 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C955 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
-C956 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF
-C957 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C958 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C959 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
-C960 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
-C961 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
-C962 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
-C963 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C964 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
-C965 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
-C966 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
-C967 divider_1/mc2 divider_1/and_0/A 0.16fF
-C968 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
-C969 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
-C970 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z1 0.17fF
-C971 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C972 io_clamp_low[1] io_analog[5] 0.53fF
-C973 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
-C974 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
-C975 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
-C976 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
-C977 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
-C978 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
-C979 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
-C980 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
-C981 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
-C982 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
-C983 pll_full_1/divbuf_1/OUT5 pll_full_1/divbuf_1/OUT 43.38fF
-C984 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C985 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
-C986 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
-C987 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
-C988 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_2/Q 0.01fF
-C989 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/a_630_n680# 0.35fF
-C990 pll_full_1/ro_complete_0/a1 pll_full_1/divider_0/clk 0.11fF
-C991 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF
-C992 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
-C993 divider_0/nor_0/B divider_0/and_0/A 0.26fF
-C994 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF
-C995 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
-C996 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
-C997 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF
-C998 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
-C999 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
-C1000 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
-C1001 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
-C1002 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
-C1003 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
-C1004 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF
-C1005 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
-C1006 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
-C1007 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF
-C1008 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
-C1009 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF
-C1010 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z2 0.14fF
-C1011 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1012 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
-C1013 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.02fF
-C1014 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
-C1015 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
-C1016 divider_0/nor_1/B divider_0/and_0/B 0.29fF
-C1017 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF
-C1018 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF
-C1019 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
-C1020 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
-C1021 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
-C1022 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C1023 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
-C1024 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
-C1025 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
-C1026 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
-C1027 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
-C1028 pll_full_1/filter_0/a_4216_n5230# pll_full_1/divider_0/clk 1.58fF
-C1029 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
-C1030 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF
-C1031 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
-C1032 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
-C1033 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
-C1034 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
-C1035 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
-C1036 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.31fF
-C1037 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/A 0.55fF
-C1038 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF
-C1039 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
-C1040 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
-C1041 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
-C1042 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
-C1043 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
-C1044 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
-C1045 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
-C1046 divbuf_6/IN divbuf_6/OUT5 0.00fF
-C1047 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
-C1048 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
-C1049 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
-C1050 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
-C1051 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
-C1052 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
-C1053 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1054 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Q 0.51fF
-C1055 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z4 0.36fF
-C1056 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
-C1057 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
-C1058 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
-C1059 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/clk 0.06fF
-C1060 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/z5 0.03fF
-C1061 divbuf_19/IN divbuf_19/OUT5 0.00fF
-C1062 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
-C1063 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
-C1064 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
-C1065 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
-C1066 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
-C1067 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
-C1068 divider_2/mc2 divider_2/nor_1/B 0.15fF
-C1069 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
-C1070 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF
-C1071 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
-C1072 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
-C1073 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
-C1074 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
-C1075 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF
-C1076 divbuf_4/OUT divbuf_4/OUT5 43.38fF
-C1077 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C1078 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1079 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
-C1080 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
-C1081 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
-C1082 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
-C1083 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
-C1084 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/A 0.01fF
-C1085 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
-C1086 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
-C1087 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
-C1088 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
-C1089 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
-C1090 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
-C1091 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
-C1092 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
-C1093 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
-C1094 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
-C1095 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
-C1096 pd_1/DIV pd_1/R 0.51fF
-C1097 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
-C1098 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
-C1099 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
-C1100 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
-C1101 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
-C1102 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
-C1103 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
-C1104 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
-C1105 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
-C1106 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
-C1107 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
-C1108 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1109 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1110 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/nor_0/A 0.01fF
-C1111 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z4 0.12fF
-C1112 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF
-C1113 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF
-C1114 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1115 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
-C1116 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
-C1117 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
-C1118 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
-C1119 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF
-C1120 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
-C1121 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
-C1122 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
-C1123 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
-C1124 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
-C1125 filter_0/v divbuf_25/OUT2 0.06fF
-C1126 divbuf_7/IN divbuf_7/OUT5 0.00fF
-C1127 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
-C1128 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
-C1129 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1130 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1131 divbuf_15/OUT4 divbuf_15/OUT 1.11fF
-C1132 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1133 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
-C1134 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
-C1135 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
-C1136 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
-C1137 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
-C1138 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
-C1139 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF
-C1140 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
-C1141 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
-C1142 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
-C1143 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF
-C1144 divider_2/Out divider_2/tspc_0/Z3 0.05fF
-C1145 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
-C1146 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
-C1147 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
-C1148 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
-C1149 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
-C1150 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
-C1151 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
-C1152 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
-C1153 divbuf_18/IN divbuf_18/OUT5 0.00fF
-C1154 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF
-C1155 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
-C1156 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
-C1157 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
-C1158 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
-C1159 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1160 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1161 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1162 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
-C1163 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF
-C1164 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z1 0.03fF
-C1165 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z3 0.65fF
-C1166 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
-C1167 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
-C1168 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
-C1169 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
-C1170 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C1171 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
-C1172 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
-C1173 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C1174 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
-C1175 divider_1/nor_0/B divider_1/and_0/A 0.26fF
-C1176 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
-C1177 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
-C1178 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
-C1179 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
-C1180 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
-C1181 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
-C1182 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF
-C1183 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C1184 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF
-C1185 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
-C1186 divider_0/mc2 divider_0/nor_1/B 0.15fF
-C1187 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z3 0.05fF
-C1188 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
-C1189 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF
-C1190 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
-C1191 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1192 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
-C1193 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF
-C1194 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF
-C1195 divider_1/nor_1/B divider_1/and_0/B 0.29fF
-C1196 divbuf_12/IN divbuf_12/OUT5 0.00fF
-C1197 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
-C1198 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
-C1199 filter_0/a_4216_n5230# filter_0/v 0.91fF
-C1200 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF
-C1201 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_0/B 0.18fF
-C1202 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C1203 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
-C1204 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
-C1205 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF
-C1206 divider_0/nor_0/A divider_0/and_0/B 0.08fF
-C1207 divbuf_1/OUT divbuf_1/OUT3 0.26fF
-C1208 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
-C1209 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1210 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
-C1211 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
-C1212 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
-C1213 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
-C1214 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF
-C1215 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
-C1216 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
-C1217 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
-C1218 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
-C1219 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
-C1220 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
-C1221 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
-C1222 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
-C1223 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C1224 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1225 pll_full_1/ro_complete_0/a5 pll_full_1/divider_0/clk 0.15fF
-C1226 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF
-C1227 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
-C1228 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
-C1229 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
-C1230 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF
-C1231 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/clk 0.26fF
-C1232 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
-C1233 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z4 0.14fF
-C1234 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1235 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
-C1236 divbuf_19/OUT2 divbuf_19/OUT 0.06fF
-C1237 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
-C1238 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
-C1239 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
-C1240 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
-C1241 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
-C1242 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
-C1243 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
-C1244 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
-C1245 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF
-C1246 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
-C1247 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
-C1248 pll_full_1/pd_0/DIV pll_full_1/divider_0/clk 2.26fF
-C1249 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/IN 0.00fF
-C1250 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
-C1251 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
-C1252 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
-C1253 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
-C1254 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
-C1255 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
-C1256 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/Z3 0.05fF
-C1257 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF
-C1258 pll_full_1/divbuf_0/IN pll_full_1/divider_0/nor_1/B 0.27fF
-C1259 divbuf_5/OUT divbuf_5/OUT3 0.26fF
-C1260 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
-C1261 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
-C1262 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
-C1263 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Qbar1 0.12fF
-C1264 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/DIV 0.17fF
-C1265 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
-C1266 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
-C1267 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
-C1268 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
-C1269 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
-C1270 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
-C1271 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
-C1272 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
-C1273 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
-C1274 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
-C1275 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
-C1276 divbuf_24/IN divbuf_24/OUT5 0.00fF
-C1277 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
-C1278 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
-C1279 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF
-C1280 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF
-C1281 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
-C1282 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
-C1283 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
-C1284 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF
-C1285 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF
-C1286 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/clk 0.64fF
-C1287 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
-C1288 pll_full_1/pd_0/REF pll_full_1/pd_0/DOWN 1.48fF
-C1289 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/R 0.03fF
-C1290 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
-C1291 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
-C1292 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
-C1293 pll_full_1/pd_0/REF pll_full_1/divbuf_1/OUT5 0.00fF
-C1294 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF
-C1295 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
-C1296 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
-C1297 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
-C1298 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF
-C1299 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
-C1300 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
-C1301 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
-C1302 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
-C1303 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF
-C1304 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
-C1305 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
-C1306 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1307 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1308 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/divider_0/clk 1.46fF
-C1309 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
-C1310 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
-C1311 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
-C1312 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
-C1313 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
-C1314 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
-C1315 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
-C1316 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/nor_0/A 0.02fF
-C1317 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
-C1318 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
-C1319 io_clamp_high[0] io_analog[4] 0.53fF
-C1320 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF
-C1321 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DIV 0.04fF
-C1322 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
-C1323 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
-C1324 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
-C1325 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
-C1326 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
-C1327 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
-C1328 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
-C1329 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
-C1330 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
-C1331 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
-C1332 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
-C1333 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
-C1334 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
-C1335 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
-C1336 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/REF 0.19fF
-C1337 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
-C1338 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C1339 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
-C1340 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_0/Z4 0.02fF
-C1341 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C1342 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/divider_0/clk 1.27fF
-C1343 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
-C1344 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1345 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
-C1346 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
-C1347 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
-C1348 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
-C1349 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF
-C1350 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF
-C1351 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z3 0.38fF
-C1352 divbuf_7/OUT divbuf_7/OUT2 0.06fF
-C1353 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
-C1354 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
-C1355 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
-C1356 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
-C1357 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
-C1358 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
-C1359 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
-C1360 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
-C1361 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
-C1362 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1363 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
-C1364 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1365 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
-C1366 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1367 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
-C1368 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF
-C1369 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C1370 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
-C1371 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
-C1372 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
-C1373 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
-C1374 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1375 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
-C1376 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
-C1377 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
-C1378 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
-C1379 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
-C1380 pd_0/R pd_0/and_pd_0/Out1 0.33fF
-C1381 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
-C1382 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
-C1383 divider_2/mc2 divider_2/nor_0/A 0.04fF
-C1384 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
-C1385 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
-C1386 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
-C1387 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
-C1388 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1389 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1390 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/Out 0.21fF
-C1391 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
-C1392 divider_0/mc2 divider_0/nor_0/A 0.04fF
-C1393 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1394 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1395 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1396 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/clk 0.45fF
-C1397 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
-C1398 filter_0/v divbuf_25/OUT3 0.26fF
-C1399 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF
-C1400 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
-C1401 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
-C1402 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT 0.00fF
-C1403 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DIV 0.65fF
-C1404 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
-C1405 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
-C1406 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
-C1407 divider_1/nor_0/A divider_1/and_0/B 0.08fF
-C1408 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
-C1409 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
-C1410 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
-C1411 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
-C1412 pd_1/DOWN pd_1/UP 0.46fF
-C1413 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF
-C1414 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
-C1415 divbuf_19/OUT divbuf_19/OUT4 1.11fF
-C1416 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
-C1417 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
-C1418 pll_full_1/pd_0/DIV pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C1419 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1420 divbuf_15/OUT5 divbuf_15/IN 0.00fF
-C1421 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
-C1422 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/nor_1/B 0.03fF
-C1423 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
-C1424 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
-C1425 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1426 divider_0/prescaler_0/Out divider_0/clk 0.51fF
-C1427 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
-C1428 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
-C1429 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
-C1430 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
-C1431 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
-C1432 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
-C1433 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
-C1434 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
-C1435 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
-C1436 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
-C1437 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
-C1438 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
-C1439 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
-C1440 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
-C1441 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
-C1442 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
-C1443 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
-C1444 divider_2/and_0/OUT divider_2/clk 0.04fF
-C1445 divbuf_5/OUT divbuf_3/OUT 3.09fF
-C1446 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
-C1447 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1448 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1449 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF
-C1450 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
-C1451 divbuf_14/OUT divbuf_14/OUT5 43.38fF
-C1452 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
-C1453 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
-C1454 divbuf_5/OUT divbuf_5/OUT5 43.38fF
-C1455 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
-C1456 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
-C1457 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1458 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
-C1459 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
-C1460 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
-C1461 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
-C1462 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
-C1463 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
-C1464 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
-C1465 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
-C1466 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
-C1467 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
-C1468 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
-C1469 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
-C1470 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
-C1471 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1472 divider_2/nor_0/A divider_2/and_0/A 0.01fF
-C1473 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
-C1474 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
-C1475 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
-C1476 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1477 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1478 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/clk 0.12fF
-C1479 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
-C1480 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
-C1481 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
-C1482 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
-C1483 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
-C1484 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF
-C1485 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
-C1486 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF
-C1487 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
-C1488 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
-C1489 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
-C1490 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
-C1491 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
-C1492 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
-C1493 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
-C1494 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
-C1495 divider_2/mc2 divider_2/and_0/B 0.20fF
-C1496 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
-C1497 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1498 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF
-C1499 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
-C1500 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divbuf_0/IN 0.04fF
-C1501 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
-C1502 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
-C1503 divider_0/mc2 divider_0/and_0/B 0.20fF
-C1504 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
-C1505 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF
-C1506 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1507 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/clk 0.45fF
-C1508 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
-C1509 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
-C1510 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
-C1511 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
-C1512 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
-C1513 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
-C1514 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
-C1515 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
-C1516 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
-C1517 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
-C1518 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
-C1519 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
-C1520 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
-C1521 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
-C1522 divider_2/nor_0/B divider_2/and_0/B 0.31fF
-C1523 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
-C1524 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
-C1525 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF
-C1526 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1527 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
-C1528 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1529 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
-C1530 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
-C1531 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1532 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF
-C1533 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
-C1534 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF
-C1535 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z4 0.21fF
-C1536 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
-C1537 divbuf_7/OUT divbuf_7/OUT4 1.11fF
-C1538 divbuf_4/IN divbuf_4/OUT5 0.00fF
-C1539 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
-C1540 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
-C1541 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
-C1542 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
-C1543 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
-C1544 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
-C1545 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
-C1546 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
-C1547 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT5 0.02fF
-C1548 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT5 20.26fF
-C1549 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF
-C1550 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
-C1551 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
-C1552 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
-C1553 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/IN 0.13fF
-C1554 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C1555 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
-C1556 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
-C1557 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
-C1558 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
-C1559 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1560 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1561 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
-C1562 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
-C1563 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
-C1564 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF
-C1565 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
-C1566 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
-C1567 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
-C1568 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
-C1569 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
-C1570 divbuf_5/IN divbuf_5/OUT5 0.00fF
-C1571 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
-C1572 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
-C1573 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
-C1574 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
-C1575 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
-C1576 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
-C1577 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
-C1578 divider_2/and_0/A divider_2/and_0/B 0.18fF
-C1579 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/nor_0/B 0.20fF
-C1580 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
-C1581 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
-C1582 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1583 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/divider_0/clk 0.12fF
-C1584 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
-C1585 pll_full_1/pd_0/REF pll_full_1/pd_0/R 0.61fF
-C1586 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
-C1587 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
-C1588 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1589 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF
-C1590 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
-C1591 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
-C1592 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
-C1593 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
-C1594 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
-C1595 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
-C1596 divbuf_0/OUT divbuf_0/OUT3 0.26fF
-C1597 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
-C1598 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
-C1599 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
-C1600 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
-C1601 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z3 0.09fF
-C1602 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
-C1603 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1604 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/clk 0.60fF
-C1605 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
-C1606 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF
-C1607 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
-C1608 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1609 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
-C1610 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
-C1611 divider_1/prescaler_0/Out divider_1/clk 0.51fF
-C1612 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
-C1613 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
-C1614 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
-C1615 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1616 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
-C1617 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
-C1618 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF
-C1619 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
-C1620 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
-C1621 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
-C1622 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
-C1623 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF
-C1624 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF
-C1625 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
-C1626 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
-C1627 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
-C1628 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
-C1629 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1630 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1631 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1632 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF
-C1633 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1634 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
-C1635 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
-C1636 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
-C1637 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
-C1638 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
-C1639 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
-C1640 divbuf_21/IN divbuf_21/OUT5 0.00fF
-C1641 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
-C1642 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
-C1643 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
-C1644 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
-C1645 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1646 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
-C1647 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF
-C1648 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
-C1649 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
-C1650 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
-C1651 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF
-C1652 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z3 0.11fF
-C1653 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
-C1654 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
-C1655 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
-C1656 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
-C1657 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
-C1658 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
-C1659 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
-C1660 divbuf_15/OUT divbuf_15/OUT3 0.26fF
-C1661 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
-C1662 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF
-C1663 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
-C1664 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/clk 0.12fF
-C1665 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
-C1666 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
-C1667 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
-C1668 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
-C1669 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
-C1670 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
-C1671 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
-C1672 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
-C1673 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
-C1674 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
-C1675 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
-C1676 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
-C1677 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF
-C1678 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
-C1679 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
-C1680 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
-C1681 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
-C1682 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
-C1683 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
-C1684 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
-C1685 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF
-C1686 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
-C1687 divbuf_3/OUT divbuf_3/OUT4 1.11fF
-C1688 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
-C1689 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
-C1690 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
-C1691 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
-C1692 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
-C1693 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF
-C1694 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
-C1695 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/z5 0.04fF
-C1696 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
-C1697 divider_2/mc2 divider_2/and_0/OUT 0.05fF
-C1698 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
-C1699 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
-C1700 divbuf_8/IN divbuf_8/OUT5 0.00fF
-C1701 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT 0.26fF
-C1702 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT5 20.26fF
-C1703 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
-C1704 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
-C1705 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF
-C1706 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
-C1707 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
-C1708 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
-C1709 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
-C1710 divider_0/mc2 divider_0/and_0/OUT 0.05fF
-C1711 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
-C1712 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1713 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
-C1714 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_0/A 0.15fF
-C1715 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1716 pll_full_1/pd_0/REF pll_full_1/divbuf_1/a_492_n240# 0.13fF
-C1717 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/divider_0/clk 1.36fF
-C1718 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
-C1719 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF
-C1720 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
-C1721 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
-C1722 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
-C1723 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
-C1724 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
-C1725 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
-C1726 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
-C1727 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
-C1728 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
-C1729 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
-C1730 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
-C1731 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1732 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
-C1733 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_1/Q 0.01fF
-C1734 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C1735 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
-C1736 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
-C1737 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
-C1738 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
-C1739 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF
-C1740 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
-C1741 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
-C1742 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
-C1743 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DOWN 0.03fF
-C1744 io_clamp_low[2] io_analog[6] 0.53fF
-C1745 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
-C1746 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
-C1747 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
-C1748 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
-C1749 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
-C1750 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
-C1751 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
-C1752 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
-C1753 pd_1/R pd_1/UP 0.45fF
-C1754 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
-C1755 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
-C1756 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
-C1757 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
-C1758 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT2 0.02fF
-C1759 divbuf_0/OUT divbuf_0/OUT4 1.11fF
-C1760 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
-C1761 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divbuf_0/IN 0.05fF
-C1762 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C1763 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/A 0.80fF
-C1764 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/divider_0/clk 1.46fF
-C1765 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
-C1766 divbuf_14/IN divbuf_14/OUT5 0.00fF
-C1767 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF
-C1768 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/clk 0.05fF
-C1769 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF
-C1770 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
-C1771 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Z3 0.38fF
-C1772 pll_full_1/pd_0/DIV pll_full_1/pd_0/R 0.51fF
-C1773 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
-C1774 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
-C1775 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
-C1776 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
-C1777 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
-C1778 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF
-C1779 cp_0/a_1710_0# cp_0/out 0.84fF
-C1780 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
-C1781 divbuf_13/IN divbuf_13/OUT5 0.00fF
-C1782 divbuf_5/OUT divbuf_6/OUT 3.23fF
-C1783 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
-C1784 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF
-C1785 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF
-C1786 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
-C1787 divider_1/mc2 divider_1/nor_1/B 0.15fF
-C1788 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
-C1789 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
-C1790 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
-C1791 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
-C1792 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
-C1793 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
-C1794 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
-C1795 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
-C1796 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
-C1797 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
-C1798 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
-C1799 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
-C1800 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
-C1801 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C1802 divbuf_2/OUT divbuf_2/OUT3 0.26fF
-C1803 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
-C1804 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
-C1805 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1806 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/clk 0.01fF
-C1807 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
-C1808 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
-C1809 divbuf_6/OUT divbuf_6/OUT3 0.26fF
-C1810 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
-C1811 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
-C1812 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF
-C1813 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
-C1814 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DOWN 0.03fF
-C1815 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
-C1816 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
-C1817 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
-C1818 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
-C1819 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
-C1820 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
-C1821 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF
-C1822 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
-C1823 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
-C1824 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
-C1825 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
-C1826 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
-C1827 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
-C1828 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF
-C1829 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
-C1830 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
-C1831 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
-C1832 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
-C1833 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z3 0.25fF
-C1834 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
-C1835 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
-C1836 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
-C1837 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/DIV 0.19fF
-C1838 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
-C1839 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
-C1840 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
-C1841 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
-C1842 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
-C1843 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
-C1844 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
-C1845 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1846 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
-C1847 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
-C1848 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
-C1849 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
-C1850 divbuf_4/OUT divbuf_4/OUT2 0.06fF
-C1851 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
-C1852 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
-C1853 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
-C1854 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
-C1855 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1856 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
-C1857 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
-C1858 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
-C1859 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
-C1860 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
-C1861 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1862 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF
-C1863 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
-C1864 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
-C1865 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
-C1866 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1867 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
-C1868 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z2 0.11fF
-C1869 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/clk 0.01fF
-C1870 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
-C1871 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF
-C1872 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
-C1873 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
-C1874 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
-C1875 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1876 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
-C1877 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
-C1878 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
-C1879 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
-C1880 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF
-C1881 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1882 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1883 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
-C1884 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
-C1885 divbuf_0/OUT5 divbuf_0/IN 0.00fF
-C1886 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1887 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
-C1888 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1889 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/clk 0.01fF
-C1890 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
-C1891 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
-C1892 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
-C1893 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C1894 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
-C1895 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
-C1896 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
-C1897 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1898 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
-C1899 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
-C1900 divbuf_0/OUT divbuf_0/OUT5 43.38fF
-C1901 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
-C1902 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
-C1903 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
-C1904 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Q 0.22fF
-C1905 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF
-C1906 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C1907 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C1908 divbuf_1/OUT5 divbuf_1/IN 0.00fF
-C1909 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
-C1910 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
-C1911 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
-C1912 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
-C1913 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/A 0.35fF
-C1914 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/clk 0.29fF
-C1915 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
-C1916 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
-C1917 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
-C1918 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT2 0.42fF
-C1919 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
-C1920 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
-C1921 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.21fF
-C1922 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
-C1923 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C1924 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
-C1925 pd_0/DOWN pd_0/R 0.36fF
-C1926 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
-C1927 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
-C1928 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
-C1929 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
-C1930 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
-C1931 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
-C1932 cp_0/a_1710_0# cp_0/down 0.32fF
-C1933 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
-C1934 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
-C1935 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1936 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.00fF
-C1937 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
-C1938 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C1939 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C1940 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF
-C1941 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
-C1942 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
-C1943 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF
-C1944 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
-C1945 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
-C1946 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
-C1947 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
-C1948 divider_2/prescaler_0/Out divider_2/clk 0.51fF
-C1949 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
-C1950 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF
-C1951 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z4 0.02fF
-C1952 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
-C1953 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
-C1954 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
-C1955 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
-C1956 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
-C1957 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
-C1958 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
-C1959 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
-C1960 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
-C1961 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
-C1962 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/IN 5.26fF
-C1963 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/a_492_n240# 0.01fF
-C1964 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C1965 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
-C1966 divbuf_2/OUT divbuf_2/OUT5 43.38fF
-C1967 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF
-C1968 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/clk 0.01fF
-C1969 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/A 0.26fF
-C1970 divbuf_6/OUT divbuf_6/OUT5 43.38fF
-C1971 divbuf_3/IN divbuf_3/OUT5 0.00fF
-C1972 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
-C1973 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
-C1974 divider_1/mc2 divider_1/nor_0/A 0.04fF
-C1975 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
-C1976 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
-C1977 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
-C1978 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
-C1979 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
-C1980 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
-C1981 divider_1/nor_0/B divider_1/nor_1/B 0.47fF
-C1982 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
-C1983 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
-C1984 divbuf_16/OUT divbuf_16/OUT5 43.38fF
-C1985 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
-C1986 filter_0/v divbuf_25/OUT5 43.38fF
-C1987 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
-C1988 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
-C1989 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
-C1990 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF
-C1991 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
-C1992 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
-C1993 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z4 0.00fF
-C1994 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/divider_0/clk 1.46fF
-C1995 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
-C1996 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
-C1997 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
-C1998 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
-C1999 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
-C2000 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.29fF
-C2001 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
-C2002 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF
-C2003 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
-C2004 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
-C2005 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
-C2006 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
-C2007 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
-C2008 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
-C2009 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
-C2010 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
-C2011 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
-C2012 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF
-C2013 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF
-C2014 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
-C2015 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
-C2016 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
-C2017 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/OUT2 0.42fF
-C2018 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
-C2019 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
-C2020 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
-C2021 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
-C2022 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF
-C2023 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z3 0.38fF
-C2024 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_1/B 0.22fF
-C2025 divbuf_4/OUT divbuf_4/OUT4 1.11fF
-C2026 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF
-C2027 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
-C2028 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
-C2029 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
-C2030 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
-C2031 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
-C2032 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
-C2033 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
-C2034 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
-C2035 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
-C2036 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT3 5.16fF
-C2037 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
-C2038 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
+C0 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
+C1 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
+C2 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
+C3 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/clk 0.06fF
+C4 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/z5 0.03fF
+C5 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
+C6 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C7 divbuf_19/IN divbuf_19/OUT5 0.00fF
+C8 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
+C9 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
+C10 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
+C11 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
+C12 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
+C13 divider_2/mc2 divider_2/nor_1/B 0.15fF
+C14 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/prescaler_0/Out 0.15fF
+C15 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF
+C16 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
+C17 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
+C18 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C19 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
+C20 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
+C21 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
+C22 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
+C23 divbuf_4/OUT divbuf_4/OUT5 43.38fF
+C24 io_clamp_low[2] io_analog[6] 0.53fF
+C25 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C26 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C27 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
+C28 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
+C29 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
+C30 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
+C31 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
+C32 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
+C33 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
+C34 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
+C35 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
+C36 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
+C37 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
+C38 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
+C39 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
+C40 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
+C41 pd_1/DIV pd_1/R 0.51fF
+C42 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
+C43 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
+C44 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
+C45 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
+C46 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
+C47 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
+C48 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C49 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C50 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
+C51 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C52 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C53 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF
+C54 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
+C55 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
+C56 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C57 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF
+C58 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
+C59 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
+C60 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
+C61 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
+C62 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
+C63 filter_0/v divbuf_25/OUT2 0.06fF
+C64 divbuf_7/IN divbuf_7/OUT5 0.00fF
+C65 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
+C66 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
+C67 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
+C68 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/nor_0/Z1 0.18fF
+C69 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
+C70 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C71 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C72 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
+C73 divbuf_15/OUT4 divbuf_15/OUT 1.11fF
+C74 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C75 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF
+C76 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
+C77 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
+C78 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
+C79 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C80 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C81 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
+C82 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF
+C83 divider_2/Out divider_2/tspc_0/Z3 0.05fF
+C84 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
+C85 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
+C86 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
+C87 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.04fF
+C88 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z4 0.65fF
+C89 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
+C90 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
+C91 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
+C92 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
+C93 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
+C94 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
+C95 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
+C96 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
+C97 divbuf_18/IN divbuf_18/OUT5 0.00fF
+C98 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF
+C99 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
+C100 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
+C101 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
+C102 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C103 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C104 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C105 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
+C106 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
+C107 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF
+C108 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z3 0.65fF
+C109 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C110 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
+C111 divider_1/nor_0/B divider_1/and_0/A 0.26fF
+C112 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
+C113 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
+C114 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
+C115 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C116 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
+C117 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
+C118 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
+C119 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
+C120 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
+C121 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C122 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
+C123 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
+C124 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF
+C125 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C126 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF
+C127 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C128 divider_0/mc2 divider_0/nor_1/B 0.15fF
+C129 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
+C130 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
+C131 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C132 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF
+C133 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF
+C134 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C135 divider_1/nor_1/B divider_1/and_0/B 0.29fF
+C136 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF
+C137 divbuf_12/IN divbuf_12/OUT5 0.00fF
+C138 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
+C139 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
+C140 filter_0/a_4216_n5230# filter_0/v 0.91fF
+C141 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF
+C142 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C143 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
+C144 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
+C145 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF
+C146 divbuf_1/OUT divbuf_1/OUT3 0.26fF
+C147 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
+C148 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C149 divider_0/nor_0/A divider_0/and_0/B 0.08fF
+C150 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_1/B 0.22fF
+C151 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
+C152 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
+C153 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF
+C154 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
+C155 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C156 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
+C157 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
+C158 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C159 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
+C160 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C161 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
+C162 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
+C163 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
+C164 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
+C165 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C166 pll_full_1/ro_complete_0/a5 pll_full_1/divider_0/clk 0.15fF
+C167 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF
+C168 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
+C169 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
+C170 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
+C171 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/clk 0.26fF
+C172 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z4 0.14fF
+C173 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C174 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
+C175 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
+C176 divbuf_19/OUT2 divbuf_19/OUT 0.06fF
+C177 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
+C178 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C179 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
+C180 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
+C181 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
+C182 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
+C183 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/Out 0.11fF
+C184 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
+C185 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
+C186 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
+C187 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF
+C188 pll_full_1/pd_0/DIV pll_full_1/divider_0/clk 2.26fF
+C189 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C190 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
+C191 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
+C192 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
+C193 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
+C194 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C195 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
+C196 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C197 divbuf_5/OUT divbuf_5/OUT3 0.26fF
+C198 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Qbar1 0.12fF
+C199 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/DIV 0.17fF
+C200 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
+C201 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C202 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
+C203 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
+C204 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
+C205 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
+C206 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
+C207 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
+C208 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
+C209 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
+C210 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
+C211 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
+C212 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
+C213 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
+C214 divbuf_24/IN divbuf_24/OUT5 0.00fF
+C215 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
+C216 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
+C217 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
+C218 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C219 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
+C220 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF
+C221 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF
+C222 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF
+C223 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/clk 0.64fF
+C224 pll_full_1/pd_0/REF pll_full_1/pd_0/DOWN 1.48fF
+C225 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/R 0.03fF
+C226 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
+C227 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
+C228 pll_full_1/pd_0/REF pll_full_1/divbuf_1/OUT5 0.00fF
+C229 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF
+C230 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C231 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
+C232 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
+C233 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
+C234 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
+C235 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
+C236 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C237 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
+C238 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
+C239 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
+C240 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
+C241 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF
+C242 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C243 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C244 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/divider_0/clk 1.46fF
+C245 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
+C246 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
+C247 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
+C248 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C249 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C250 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
+C251 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
+C252 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
+C253 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF
+C254 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DIV 0.04fF
+C255 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C256 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
+C257 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
+C258 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.51fF
+C259 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
+C260 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
+C261 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
+C262 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
+C263 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
+C264 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
+C265 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
+C266 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
+C267 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
+C268 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
+C269 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
+C270 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
+C271 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
+C272 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C273 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/divider_0/clk 1.27fF
+C274 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/REF 0.19fF
+C275 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C276 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C277 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
+C278 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
+C279 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
+C280 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
+C281 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
+C282 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C283 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
+C284 divbuf_7/OUT divbuf_7/OUT2 0.06fF
+C285 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C286 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.04fF
+C287 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF
+C288 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
+C289 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
+C290 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
+C291 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
+C292 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
+C293 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
+C294 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
+C295 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
+C296 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C297 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C298 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
+C299 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
+C300 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C301 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C302 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C303 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
+C304 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
+C305 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C306 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C307 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
+C308 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
+C309 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
+C310 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF
+C311 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
+C312 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
+C313 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
+C314 pd_0/R pd_0/and_pd_0/Out1 0.33fF
+C315 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
+C316 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
+C317 divider_2/mc2 divider_2/nor_0/A 0.04fF
+C318 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
+C319 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
+C320 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
+C321 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
+C322 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C323 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C324 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
+C325 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/Out 0.21fF
+C326 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C327 divider_0/mc2 divider_0/nor_0/A 0.04fF
+C328 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C329 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C330 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/clk 0.45fF
+C331 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
+C332 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z2 0.14fF
+C333 filter_0/v divbuf_25/OUT3 0.26fF
+C334 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT 0.00fF
+C335 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DIV 0.65fF
+C336 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
+C337 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C338 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
+C339 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF
+C340 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
+C341 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
+C342 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
+C343 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
+C344 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
+C345 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
+C346 divider_1/nor_0/A divider_1/and_0/B 0.08fF
+C347 pd_1/DOWN pd_1/UP 0.46fF
+C348 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF
+C349 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
+C350 divbuf_19/OUT divbuf_19/OUT4 1.11fF
+C351 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
+C352 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
+C353 pll_full_1/pd_0/DIV pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C354 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C355 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
+C356 divbuf_15/OUT5 divbuf_15/IN 0.00fF
+C357 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
+C358 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
+C359 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
+C360 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
+C361 divider_0/prescaler_0/Out divider_0/clk 0.51fF
+C362 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
+C363 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/B 0.22fF
+C364 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
+C365 pll_full_1/divbuf_0/IN pll_full_1/divbuf_0/OUT5 0.00fF
+C366 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
+C367 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C368 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
+C369 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
+C370 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
+C371 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
+C372 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
+C373 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
+C374 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
+C375 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
+C376 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
+C377 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
+C378 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
+C379 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
+C380 divider_2/and_0/OUT divider_2/clk 0.04fF
+C381 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C382 divbuf_5/OUT divbuf_3/OUT 3.09fF
+C383 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C384 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
+C385 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
+C386 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C387 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF
+C388 divbuf_5/OUT divbuf_5/OUT5 43.38fF
+C389 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
+C390 divbuf_14/OUT divbuf_14/OUT5 43.38fF
+C391 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
+C392 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
+C393 io_clamp_high[1] io_analog[5] 0.53fF
+C394 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
+C395 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C396 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
+C397 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
+C398 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
+C399 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
+C400 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
+C401 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
+C402 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C403 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
+C404 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
+C405 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
+C406 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
+C407 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
+C408 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C409 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
+C410 divider_2/nor_0/A divider_2/and_0/A 0.01fF
+C411 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
+C412 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
+C413 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C414 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C415 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF
+C416 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/clk 0.12fF
+C417 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
+C418 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
+C419 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
+C420 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF
+C421 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
+C422 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
+C423 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
+C424 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF
+C425 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
+C426 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
+C427 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
+C428 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
+C429 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C430 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
+C431 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
+C432 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
+C433 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
+C434 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
+C435 divider_2/mc2 divider_2/and_0/B 0.20fF
+C436 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
+C437 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF
+C438 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
+C439 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF
+C440 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C441 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C442 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
+C443 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C444 divider_0/mc2 divider_0/and_0/B 0.20fF
+C445 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/clk 0.45fF
+C446 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
+C447 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
+C448 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
+C449 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
+C450 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
+C451 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
+C452 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
+C453 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
+C454 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
+C455 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
+C456 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
+C457 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
+C458 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
+C459 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
+C460 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF
+C461 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C462 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C463 divider_2/nor_0/B divider_2/and_0/B 0.31fF
+C464 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
+C465 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
+C466 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C467 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
+C468 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C469 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF
+C470 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
+C471 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
+C472 divbuf_7/OUT divbuf_7/OUT4 1.11fF
+C473 divbuf_4/IN divbuf_4/OUT5 0.00fF
+C474 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
+C475 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/A 0.55fF
+C476 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
+C477 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
+C478 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
+C479 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
+C480 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
+C481 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
+C482 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
+C483 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT5 0.02fF
+C484 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT5 20.26fF
+C485 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF
+C486 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
+C487 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C488 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
+C489 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
+C490 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
+C491 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
+C492 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C493 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C494 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C495 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
+C496 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
+C497 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
+C498 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
+C499 divbuf_5/IN divbuf_5/OUT5 0.00fF
+C500 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
+C501 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
+C502 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
+C503 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C504 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF
+C505 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
+C506 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
+C507 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_1/Z1 0.06fF
+C508 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
+C509 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
+C510 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
+C511 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
+C512 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/OUT 0.31fF
+C513 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
+C514 divider_2/and_0/A divider_2/and_0/B 0.18fF
+C515 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
+C516 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C517 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
+C518 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/divider_0/clk 0.12fF
+C519 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
+C520 pll_full_1/pd_0/REF pll_full_1/pd_0/R 0.61fF
+C521 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
+C522 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
+C523 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z1 0.03fF
+C524 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF
+C525 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C526 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF
+C527 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C528 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
+C529 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
+C530 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
+C531 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
+C532 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
+C533 divbuf_0/OUT divbuf_0/OUT3 0.26fF
+C534 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
+C535 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
+C536 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
+C537 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
+C538 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z3 0.09fF
+C539 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
+C540 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C541 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/clk 0.60fF
+C542 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
+C543 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF
+C544 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
+C545 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C546 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z2 0.14fF
+C547 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
+C548 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
+C549 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
+C550 divider_1/prescaler_0/Out divider_1/clk 0.51fF
+C551 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C552 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C553 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C554 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
+C555 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
+C556 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
+C557 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF
+C558 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
+C559 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
+C560 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
+C561 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF
+C562 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
+C563 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
+C564 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
+C565 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
+C566 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C567 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C568 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C569 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF
+C570 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF
+C571 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
+C572 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
+C573 io_clamp_low[0] io_analog[4] 0.53fF
+C574 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
+C575 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
+C576 divbuf_21/IN divbuf_21/OUT5 0.00fF
+C577 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
+C578 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
+C579 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
+C580 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
+C581 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
+C582 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
+C583 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF
+C584 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
+C585 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C586 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
+C587 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
+C588 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
+C589 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
+C590 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF
+C591 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z3 0.11fF
+C592 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
+C593 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF
+C594 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
+C595 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_1/Z1 0.18fF
+C596 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
+C597 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
+C598 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
+C599 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
+C600 divbuf_15/OUT divbuf_15/OUT3 0.26fF
+C601 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C602 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
+C603 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF
+C604 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/clk 0.12fF
+C605 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
+C606 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
+C607 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
+C608 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
+C609 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
+C610 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
+C611 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
+C612 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
+C613 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
+C614 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
+C615 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
+C616 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
+C617 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF
+C618 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
+C619 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
+C620 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
+C621 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
+C622 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
+C623 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF
+C624 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
+C625 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
+C626 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C627 divbuf_3/OUT divbuf_3/OUT4 1.11fF
+C628 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
+C629 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
+C630 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
+C631 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
+C632 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C633 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
+C634 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
+C635 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.29fF
+C636 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/z5 0.04fF
+C637 pll_full_1/divbuf_0/IN pll_full_1/divbuf_0/a_492_n240# 0.13fF
+C638 divbuf_8/IN divbuf_8/OUT5 0.00fF
+C639 divider_2/mc2 divider_2/and_0/OUT 0.05fF
+C640 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
+C641 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
+C642 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT 0.26fF
+C643 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT5 20.26fF
+C644 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
+C645 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
+C646 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
+C647 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
+C648 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
+C649 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
+C650 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF
+C651 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C652 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
+C653 pll_full_1/pd_0/REF pll_full_1/divbuf_1/a_492_n240# 0.13fF
+C654 divider_0/mc2 divider_0/and_0/OUT 0.05fF
+C655 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
+C656 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C657 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/divider_0/clk 1.36fF
+C658 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
+C659 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF
+C660 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
+C661 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
+C662 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
+C663 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
+C664 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
+C665 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
+C666 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
+C667 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
+C668 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
+C669 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
+C670 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
+C671 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C672 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C673 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C674 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
+C675 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
+C676 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF
+C677 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
+C678 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
+C679 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
+C680 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
+C681 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
+C682 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF
+C683 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z3 0.38fF
+C684 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z4 0.12fF
+C685 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DOWN 0.03fF
+C686 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
+C687 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
+C688 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C689 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
+C690 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
+C691 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
+C692 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
+C693 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
+C694 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
+C695 pd_1/R pd_1/UP 0.45fF
+C696 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
+C697 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
+C698 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
+C699 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT2 0.02fF
+C700 divbuf_0/OUT divbuf_0/OUT4 1.11fF
+C701 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
+C702 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
+C703 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C704 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/divider_0/clk 1.46fF
+C705 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF
+C706 divbuf_14/IN divbuf_14/OUT5 0.00fF
+C707 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/clk 0.05fF
+C708 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z1 0.03fF
+C709 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z3 0.05fF
+C710 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
+C711 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Z3 0.38fF
+C712 pll_full_1/pd_0/DIV pll_full_1/pd_0/R 0.51fF
+C713 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
+C714 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C715 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
+C716 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
+C717 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
+C718 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF
+C719 divbuf_13/IN divbuf_13/OUT5 0.00fF
+C720 cp_0/a_1710_0# cp_0/out 0.84fF
+C721 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
+C722 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C723 divbuf_5/OUT divbuf_6/OUT 3.23fF
+C724 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C725 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C726 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF
+C727 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF
+C728 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C729 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
+C730 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
+C731 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C732 divider_1/mc2 divider_1/nor_1/B 0.15fF
+C733 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C734 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
+C735 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.31fF
+C736 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
+C737 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C738 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
+C739 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
+C740 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
+C741 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
+C742 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
+C743 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C744 divbuf_2/OUT divbuf_2/OUT3 0.26fF
+C745 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
+C746 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
+C747 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C748 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/clk 0.01fF
+C749 divbuf_6/OUT divbuf_6/OUT3 0.26fF
+C750 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
+C751 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
+C752 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
+C753 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
+C754 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF
+C755 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
+C756 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF
+C757 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DOWN 0.03fF
+C758 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
+C759 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C760 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
+C761 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
+C762 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF
+C763 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
+C764 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
+C765 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
+C766 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
+C767 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
+C768 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
+C769 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
+C770 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
+C771 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF
+C772 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
+C773 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
+C774 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
+C775 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z3 0.25fF
+C776 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
+C777 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
+C778 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
+C779 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
+C780 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/DIV 0.19fF
+C781 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
+C782 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
+C783 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
+C784 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
+C785 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
+C786 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
+C787 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
+C788 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
+C789 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
+C790 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C791 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
+C792 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
+C793 divbuf_4/OUT divbuf_4/OUT2 0.06fF
+C794 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
+C795 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
+C796 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C797 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
+C798 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
+C799 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
+C800 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
+C801 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
+C802 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF
+C803 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
+C804 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
+C805 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
+C806 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C807 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
+C808 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
+C809 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C810 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C811 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/clk 0.01fF
+C812 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
+C813 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF
+C814 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/B 0.08fF
+C815 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
+C816 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
+C817 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
+C818 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
+C819 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
+C820 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C821 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C822 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C823 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
+C824 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
+C825 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
+C826 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
+C827 divbuf_0/OUT5 divbuf_0/IN 0.00fF
+C828 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C829 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
+C830 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C831 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/clk 0.01fF
+C832 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
+C833 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z4 0.22fF
+C834 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF
+C835 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C836 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
+C837 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
+C838 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
+C839 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
+C840 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
+C841 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
+C842 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C843 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C844 divbuf_0/OUT divbuf_0/OUT5 43.38fF
+C845 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C846 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C847 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
+C848 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
+C849 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
+C850 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
+C851 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
+C852 divbuf_1/OUT5 divbuf_1/IN 0.00fF
+C853 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/clk 0.29fF
+C854 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
+C855 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C856 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
+C857 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
+C858 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT2 0.42fF
+C859 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
+C860 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF
+C861 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z3 0.38fF
+C862 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF
+C863 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
+C864 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.21fF
+C865 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
+C866 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C867 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
+C868 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
+C869 pd_0/DOWN pd_0/R 0.36fF
+C870 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
+C871 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
+C872 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
+C873 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
+C874 cp_0/a_1710_0# cp_0/down 0.32fF
+C875 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
+C876 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
+C877 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
+C878 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C879 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
+C880 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
+C881 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C882 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C883 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF
+C884 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
+C885 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
+C886 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
+C887 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C888 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C889 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
+C890 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z1 0.03fF
+C891 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF
+C892 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
+C893 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF
+C894 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z4 0.02fF
+C895 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
+C896 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
+C897 divider_2/prescaler_0/Out divider_2/clk 0.51fF
+C898 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
+C899 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
+C900 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
+C901 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
+C902 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
+C903 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
+C904 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
+C905 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
+C906 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/a_492_n240# 0.01fF
+C907 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C908 divbuf_2/OUT divbuf_2/OUT5 43.38fF
+C909 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF
+C910 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
+C911 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/clk 0.01fF
+C912 divider_1/mc2 divider_1/nor_0/A 0.04fF
+C913 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
+C914 divbuf_6/OUT divbuf_6/OUT5 43.38fF
+C915 divbuf_3/IN divbuf_3/OUT5 0.00fF
+C916 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
+C917 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C918 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
+C919 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
+C920 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
+C921 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C922 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C923 divider_1/nor_0/B divider_1/nor_1/B 0.47fF
+C924 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
+C925 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
+C926 filter_0/v divbuf_25/OUT5 43.38fF
+C927 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
+C928 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
+C929 divbuf_16/OUT divbuf_16/OUT5 43.38fF
+C930 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
+C931 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
+C932 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
+C933 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
+C934 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF
+C935 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
+C936 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/divider_0/clk 1.46fF
+C937 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
+C938 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
+C939 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
+C940 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
+C941 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF
+C942 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
+C943 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_0/B 0.02fF
+C944 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
+C945 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
+C946 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
+C947 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C948 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
+C949 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
+C950 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
+C951 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
+C952 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
+C953 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF
+C954 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF
+C955 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
+C956 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
+C957 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
+C958 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/OUT2 0.42fF
+C959 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
+C960 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
+C961 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
+C962 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C963 divbuf_4/OUT divbuf_4/OUT4 1.11fF
+C964 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF
+C965 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
+C966 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
+C967 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
+C968 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
+C969 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
+C970 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/Z1 0.06fF
+C971 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C972 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
+C973 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
+C974 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
+C975 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT3 5.16fF
+C976 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
+C977 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
+C978 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
+C979 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C980 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
+C981 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
+C982 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
+C983 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
+C984 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF
+C985 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
+C986 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
+C987 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
+C988 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
+C989 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
+C990 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/nor_0/Z1 0.80fF
+C991 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.29fF
+C992 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
+C993 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
+C994 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C995 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C996 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
+C997 pll_full_1/divider_0/and_0/Z1 pll_full_1/divider_0/and_0/OUT 0.04fF
+C998 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
+C999 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1000 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF
+C1001 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF
+C1002 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
+C1003 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
+C1004 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C1005 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1006 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/clk 0.01fF
+C1007 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
+C1008 divider_1/mc2 divider_1/and_0/B 0.20fF
+C1009 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
+C1010 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z4 0.36fF
+C1011 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divbuf_0/IN 0.05fF
+C1012 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
+C1013 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
+C1014 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.27fF
+C1015 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
+C1016 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
+C1017 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
+C1018 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
+C1019 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
+C1020 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
+C1021 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1022 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
+C1023 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
+C1024 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1025 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C1026 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/divider_0/clk 1.46fF
+C1027 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C1028 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Out1 0.33fF
+C1029 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
+C1030 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
+C1031 divider_0/nor_0/B divider_0/and_0/B 0.31fF
+C1032 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
+C1033 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
+C1034 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
+C1035 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
+C1036 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z4 0.21fF
+C1037 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF
+C1038 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
+C1039 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
+C1040 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
+C1041 divbuf_20/IN divbuf_20/OUT5 0.00fF
+C1042 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
+C1043 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
+C1044 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
+C1045 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1046 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C1047 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF
+C1048 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
+C1049 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
+C1050 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
+C1051 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C1052 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
+C1053 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
+C1054 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
+C1055 divbuf_4/OUT divbuf_3/OUT 2.71fF
+C1056 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
+C1057 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
+C1058 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Z1 0.06fF
+C1059 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1060 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1061 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C1062 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
+C1063 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
+C1064 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1065 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
+C1066 divider_0/and_0/OUT divider_0/clk 0.04fF
+C1067 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF
+C1068 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
+C1069 pll_full_1/divbuf_0/IN pll_full_1/pd_0/DIV 5.26fF
+C1070 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF
+C1071 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z3 0.38fF
+C1072 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF
+C1073 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF
+C1074 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
+C1075 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
+C1076 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
+C1077 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
+C1078 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
+C1079 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
+C1080 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
+C1081 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
+C1082 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
+C1083 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
+C1084 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
+C1085 divbuf_6/OUT divbuf_7/OUT 2.98fF
+C1086 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
+C1087 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
+C1088 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1089 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C1090 divider_0/nor_0/A divider_0/and_0/A 0.01fF
+C1091 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
+C1092 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
+C1093 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
+C1094 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF
+C1095 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.30fF
+C1096 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF
+C1097 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
+C1098 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
+C1099 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
+C1100 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
+C1101 divbuf_16/OUT divbuf_16/OUT4 1.11fF
+C1102 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
+C1103 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
+C1104 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
+C1105 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
+C1106 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
+C1107 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
+C1108 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1109 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1110 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
+C1111 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
+C1112 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
+C1113 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
+C1114 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
+C1115 divbuf_3/OUT divbuf_3/OUT2 0.06fF
+C1116 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
+C1117 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
+C1118 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
+C1119 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
+C1120 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
+C1121 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
+C1122 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
+C1123 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
+C1124 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
+C1125 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF
+C1126 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
+C1127 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
+C1128 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
+C1129 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
+C1130 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
+C1131 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
+C1132 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
+C1133 divbuf_22/IN divbuf_22/OUT5 0.00fF
+C1134 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF
+C1135 pd_1/R pd_1/and_pd_0/Z1 0.02fF
+C1136 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
+C1137 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
+C1138 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
+C1139 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
+C1140 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
+C1141 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
+C1142 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1143 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
+C1144 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
+C1145 divbuf_5/OUT divbuf_5/OUT2 0.06fF
+C1146 io_clamp_high[2] io_analog[6] 0.53fF
+C1147 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
+C1148 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z4 0.04fF
+C1149 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
+C1150 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
+C1151 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
+C1152 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/nor_0/A 0.02fF
+C1153 pd_0/R pd_0/UP 0.45fF
+C1154 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
+C1155 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
+C1156 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
+C1157 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF
+C1158 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT3 0.01fF
+C1159 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1160 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
+C1161 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
+C1162 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
+C1163 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1164 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1165 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/clk 0.11fF
+C1166 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1167 divbuf_25/IN divbuf_25/OUT5 0.00fF
+C1168 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
+C1169 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
+C1170 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF
+C1171 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
+C1172 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
+C1173 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
+C1174 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF
+C1175 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF
+C1176 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
+C1177 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
+C1178 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT3 1.37fF
+C1179 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT4 1.11fF
+C1180 pd_1/DOWN pd_1/R 0.36fF
+C1181 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
+C1182 divider_2/mc2 divider_2/and_0/out1 0.06fF
+C1183 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
+C1184 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
+C1185 divbuf_15/OUT5 divbuf_15/OUT 43.38fF
+C1186 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1187 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF
+C1188 pll_full_1/ro_complete_0/a2 pll_full_1/divider_0/clk 0.11fF
+C1189 divider_0/mc2 divider_0/and_0/out1 0.06fF
+C1190 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
+C1191 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1192 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1193 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
+C1194 divider_0/and_0/A divider_0/and_0/B 0.18fF
+C1195 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
+C1196 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
+C1197 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
+C1198 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
+C1199 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
+C1200 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
+C1201 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
+C1202 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
+C1203 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
+C1204 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
+C1205 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
+C1206 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
+C1207 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
+C1208 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
+C1209 divider_2/nor_1/B divider_2/and_0/B 0.29fF
+C1210 divbuf_9/IN divbuf_9/OUT5 0.00fF
+C1211 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT2 1.37fF
+C1212 divbuf_0/OUT divbuf_0/OUT2 0.06fF
+C1213 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF
+C1214 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1215 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
+C1216 divider_0/mc2 divider_0/nor_0/B 0.06fF
+C1217 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1218 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/divider_0/clk 1.58fF
+C1219 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
+C1220 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
+C1221 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
+C1222 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
+C1223 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
+C1224 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF
+C1225 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
+C1226 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
+C1227 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
+C1228 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF
+C1229 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF
+C1230 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
+C1231 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
+C1232 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
+C1233 divider_1/nor_0/B divider_1/and_0/B 0.31fF
+C1234 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
+C1235 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
+C1236 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1237 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
+C1238 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF
+C1239 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
+C1240 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
+C1241 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
+C1242 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
+C1243 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1244 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
+C1245 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
+C1246 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
+C1247 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1248 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1249 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF
+C1250 divider_1/mc2 divider_1/and_0/OUT 0.05fF
+C1251 divbuf_14/OUT divbuf_14/OUT4 1.11fF
+C1252 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
+C1253 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
+C1254 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
+C1255 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
+C1256 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
+C1257 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z4 0.21fF
+C1258 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF
+C1259 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
+C1260 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
+C1261 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
+C1262 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
+C1263 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
+C1264 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
+C1265 divider_1/and_0/OUT divider_1/clk 0.04fF
+C1266 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
+C1267 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
+C1268 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
+C1269 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1270 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
+C1271 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
+C1272 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
+C1273 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
+C1274 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
+C1275 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
+C1276 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
+C1277 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
+C1278 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1279 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF
+C1280 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF
+C1281 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
+C1282 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
+C1283 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
+C1284 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
+C1285 divider_0/Out divider_0/nor_1/B 0.22fF
+C1286 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/clk 0.11fF
+C1287 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
+C1288 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z1 0.01fF
+C1289 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF
+C1290 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
+C1291 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
+C1292 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
+C1293 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
+C1294 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT5 0.01fF
+C1295 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
+C1296 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
+C1297 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
+C1298 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
+C1299 divider_1/nor_0/A divider_1/and_0/A 0.01fF
+C1300 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
+C1301 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF
+C1302 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
+C1303 divbuf_19/OUT divbuf_19/OUT3 0.26fF
+C1304 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF
+C1305 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
+C1306 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1307 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1308 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
+C1309 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
+C1310 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
+C1311 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
+C1312 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
+C1313 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
+C1314 divbuf_17/IN divbuf_17/OUT5 0.00fF
+C1315 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
+C1316 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
+C1317 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
+C1318 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
+C1319 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
+C1320 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
+C1321 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
+C1322 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
+C1323 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
+C1324 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
+C1325 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
+C1326 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
+C1327 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/Out 0.45fF
+C1328 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
+C1329 divider_2/mc2 divider_2/nor_0/B 0.06fF
+C1330 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
+C1331 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
+C1332 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
+C1333 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
+C1334 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
+C1335 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
+C1336 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
+C1337 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
+C1338 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF
+C1339 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
+C1340 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1341 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/divider_0/clk 1.46fF
+C1342 divbuf_5/OUT divbuf_5/OUT4 1.11fF
+C1343 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
+C1344 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
+C1345 io_clamp_low[1] io_analog[5] 0.53fF
+C1346 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
+C1347 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
+C1348 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1349 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
+C1350 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
+C1351 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
+C1352 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
+C1353 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
+C1354 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
+C1355 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
+C1356 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
+C1357 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
+C1358 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
+C1359 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
+C1360 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
+C1361 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
+C1362 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1363 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/clk 0.51fF
+C1364 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF
+C1365 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
+C1366 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
+C1367 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
+C1368 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
+C1369 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
+C1370 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
+C1371 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
+C1372 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1373 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
+C1374 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
+C1375 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
+C1376 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT4 5.16fF
+C1377 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT5 43.38fF
+C1378 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
+C1379 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
+C1380 divider_2/mc2 divider_2/and_0/A 0.16fF
+C1381 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
+C1382 divbuf_2/IN divbuf_2/OUT5 0.00fF
+C1383 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1384 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
+C1385 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
+C1386 divider_0/mc2 divider_0/and_0/A 0.16fF
+C1387 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
+C1388 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
+C1389 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF
+C1390 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/clk 0.11fF
+C1391 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
+C1392 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
+C1393 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
+C1394 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/a_630_n680# 0.00fF
+C1395 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
+C1396 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
+C1397 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1398 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
+C1399 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
+C1400 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
+C1401 divider_1/and_0/A divider_1/and_0/B 0.18fF
+C1402 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
+C1403 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
+C1404 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1405 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
+C1406 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
+C1407 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
+C1408 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
+C1409 divider_2/nor_0/B divider_2/and_0/A 0.26fF
+C1410 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1411 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C1412 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
+C1413 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
+C1414 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
+C1415 divbuf_1/OUT divbuf_1/OUT4 1.11fF
+C1416 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
+C1417 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF
+C1418 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
+C1419 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
+C1420 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1421 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
+C1422 divbuf_7/OUT divbuf_7/OUT3 0.26fF
+C1423 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
+C1424 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
+C1425 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
+C1426 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
+C1427 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
+C1428 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
+C1429 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
+C1430 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C1431 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
+C1432 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
+C1433 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
+C1434 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT2 0.06fF
+C1435 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1436 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
+C1437 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
+C1438 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
+C1439 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
+C1440 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
+C1441 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
+C1442 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1443 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C1444 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/clk 0.14fF
+C1445 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF
+C1446 divbuf_14/OUT divbuf_14/OUT3 0.26fF
+C1447 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
+C1448 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
+C1449 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
+C1450 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
+C1451 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
+C1452 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF
+C1453 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
+C1454 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
+C1455 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
+C1456 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
+C1457 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
+C1458 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
+C1459 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
+C1460 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
+C1461 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
+C1462 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
+C1463 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
+C1464 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
+C1465 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
+C1466 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
+C1467 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
+C1468 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
+C1469 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1470 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
+C1471 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
+C1472 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
+C1473 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
+C1474 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
+C1475 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF
+C1476 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
+C1477 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
+C1478 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF
+C1479 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z3 0.45fF
+C1480 filter_0/v divbuf_25/OUT4 1.11fF
+C1481 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
+C1482 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
+C1483 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
+C1484 divider_1/Out divider_1/nor_1/B 0.22fF
+C1485 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
+C1486 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
+C1487 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
+C1488 pd_1/R pd_1/REF 0.61fF
+C1489 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
+C1490 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
+C1491 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1492 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C1493 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C1494 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
+C1495 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
+C1496 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
+C1497 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
+C1498 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
+C1499 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF
+C1500 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z1 0.01fF
+C1501 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF
+C1502 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
+C1503 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF
+C1504 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF
+C1505 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
+C1506 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
+C1507 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
+C1508 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
+C1509 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
+C1510 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
+C1511 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
+C1512 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
+C1513 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
+C1514 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
+C1515 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
+C1516 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
+C1517 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF
+C1518 pll_full_1/divider_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/Out 0.12fF
+C1519 cp_0/upbar cp_0/down 0.02fF
+C1520 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
+C1521 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
+C1522 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
+C1523 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
+C1524 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
+C1525 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C1526 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1527 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
+C1528 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
+C1529 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
+C1530 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
+C1531 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
+C1532 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
+C1533 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1534 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
+C1535 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
+C1536 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF
+C1537 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
+C1538 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
+C1539 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
+C1540 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
+C1541 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
+C1542 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
+C1543 divider_2/nor_0/A divider_2/and_0/B 0.08fF
+C1544 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
+C1545 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
+C1546 divbuf_2/OUT divbuf_2/OUT2 0.06fF
+C1547 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
+C1548 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
+C1549 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
+C1550 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
+C1551 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
+C1552 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
+C1553 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C1554 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
+C1555 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
+C1556 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
+C1557 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
+C1558 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
+C1559 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF
+C1560 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
+C1561 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF
+C1562 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
+C1563 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
+C1564 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
+C1565 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
+C1566 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
+C1567 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
+C1568 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
+C1569 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
+C1570 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
+C1571 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
+C1572 divbuf_15/OUT divbuf_15/OUT2 0.06fF
+C1573 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1574 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
+C1575 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
+C1576 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1577 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF
+C1578 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
+C1579 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
+C1580 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
+C1581 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF
+C1582 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/Z3 0.05fF
+C1583 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Z3 0.03fF
+C1584 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
+C1585 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
+C1586 divbuf_10/IN divbuf_10/OUT5 0.00fF
+C1587 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
+C1588 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1589 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
+C1590 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
+C1591 cp_0/a_1710_n2840# cp_0/out 0.61fF
+C1592 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
+C1593 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
+C1594 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
+C1595 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
+C1596 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1597 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF
+C1598 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF
+C1599 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
+C1600 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
+C1601 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
+C1602 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
+C1603 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1604 pll_full_1/ro_complete_0/a0 pll_full_1/divider_0/clk 0.11fF
+C1605 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF
+C1606 divbuf_3/OUT divbuf_3/OUT3 0.26fF
+C1607 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
+C1608 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
+C1609 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
+C1610 divbuf_7/OUT divbuf_7/OUT5 43.38fF
+C1611 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
+C1612 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
+C1613 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
+C1614 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
+C1615 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
+C1616 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
+C1617 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
+C1618 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT5 0.01fF
+C1619 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT 0.06fF
+C1620 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1621 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
+C1622 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF
+C1623 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
+C1624 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
+C1625 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
+C1626 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C1627 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
+C1628 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
+C1629 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
+C1630 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
+C1631 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
+C1632 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1633 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
+C1634 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
+C1635 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
+C1636 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
+C1637 pd_0/R pd_0/and_pd_0/Z1 0.02fF
+C1638 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
+C1639 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
+C1640 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
+C1641 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
+C1642 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
+C1643 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
+C1644 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C1645 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
+C1646 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
+C1647 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF
+C1648 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
+C1649 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
+C1650 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
+C1651 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
+C1652 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
+C1653 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
+C1654 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z4 0.15fF
+C1655 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z2 0.40fF
+C1656 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divbuf_0/IN 0.04fF
+C1657 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
+C1658 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
+C1659 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
+C1660 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1661 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
+C1662 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
+C1663 divbuf_11/IN divbuf_11/OUT5 0.00fF
+C1664 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/a_492_n240# 0.00fF
+C1665 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
+C1666 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
+C1667 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
+C1668 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
+C1669 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
+C1670 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
+C1671 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
+C1672 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
+C1673 pll_full_1/ro_complete_0/a3 pll_full_1/divider_0/clk 0.11fF
+C1674 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C1675 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF
+C1676 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
+C1677 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
+C1678 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
+C1679 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z2 0.01fF
+C1680 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z3 0.45fF
+C1681 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
+C1682 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
+C1683 filter_0/v divbuf_25/a_492_n240# 0.00fF
+C1684 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
+C1685 pd_0/DIV pd_0/R 0.51fF
+C1686 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
+C1687 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C1688 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
+C1689 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
+C1690 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
+C1691 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C1692 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
+C1693 divbuf_4/OUT divbuf_2/OUT 1.95fF
+C1694 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
+C1695 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
+C1696 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF
+C1697 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
+C1698 pll_full_1/pd_0/UP pll_full_1/pd_0/DOWN 4.58fF
+C1699 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
+C1700 io_clamp_high[0] io_analog[4] 0.53fF
+C1701 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
+C1702 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
+C1703 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/A 0.35fF
+C1704 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/A 0.26fF
+C1705 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
+C1706 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
+C1707 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
+C1708 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
+C1709 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
+C1710 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z4 0.14fF
+C1711 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
+C1712 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
+C1713 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
+C1714 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
+C1715 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
+C1716 filter_0/a_4216_n2998# filter_0/v 0.36fF
+C1717 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
+C1718 divbuf_6/OUT divbuf_6/OUT2 0.06fF
+C1719 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
+C1720 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF
+C1721 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
+C1722 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
+C1723 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
+C1724 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
+C1725 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
+C1726 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
+C1727 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
+C1728 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
+C1729 divbuf_23/IN divbuf_23/OUT5 0.00fF
+C1730 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C1731 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
+C1732 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
+C1733 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
+C1734 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
+C1735 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
+C1736 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
+C1737 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
+C1738 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
+C1739 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/nor_0/B 0.20fF
+C1740 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
+C1741 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
+C1742 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
+C1743 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
+C1744 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
+C1745 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C1746 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
+C1747 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
+C1748 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/nor_1/Z1 0.78fF
+C1749 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
+C1750 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
+C1751 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
+C1752 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
+C1753 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
+C1754 divbuf_3/OUT divbuf_3/OUT5 43.38fF
+C1755 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
+C1756 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
+C1757 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
+C1758 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
+C1759 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
+C1760 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF
+C1761 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
+C1762 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
+C1763 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
+C1764 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/Z3 0.05fF
+C1765 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/A 1.21fF
+C1766 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF
+C1767 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
+C1768 pd_0/DOWN pd_0/UP 0.46fF
+C1769 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
+C1770 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
+C1771 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF
+C1772 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
+C1773 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
+C1774 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
+C1775 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
+C1776 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT 1.11fF
+C1777 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
+C1778 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
+C1779 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
+C1780 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
+C1781 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
+C1782 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1783 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
+C1784 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
+C1785 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
+C1786 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
+C1787 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
+C1788 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF
+C1789 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/A 0.01fF
+C1790 divbuf_16/IN divbuf_16/OUT5 0.00fF
+C1791 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
+C1792 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
+C1793 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
+C1794 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
+C1795 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/OUT 0.01fF
+C1796 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1797 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.04fF
+C1798 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
+C1799 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
+C1800 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
+C1801 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
+C1802 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
+C1803 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
+C1804 divider_1/mc2 divider_1/and_0/out1 0.06fF
+C1805 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
+C1806 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
+C1807 pll_full_1/divider_0/nor_1/B pll_full_1/divbuf_0/IN 0.27fF
+C1808 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF
+C1809 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
+C1810 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
+C1811 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
+C1812 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
+C1813 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
+C1814 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
+C1815 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
+C1816 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
+C1817 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
+C1818 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
+C1819 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
+C1820 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1821 divider_1/mc2 divider_1/nor_0/B 0.06fF
+C1822 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
+C1823 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
+C1824 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
+C1825 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF
+C1826 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z4 0.15fF
+C1827 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z2 0.30fF
+C1828 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
+C1829 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF
+C1830 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
+C1831 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF
+C1832 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
+C1833 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
+C1834 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
+C1835 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
+C1836 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
+C1837 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
+C1838 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
+C1839 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
+C1840 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF
+C1841 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1842 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
+C1843 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
+C1844 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
+C1845 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
+C1846 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
+C1847 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF
+C1848 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
+C1849 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
+C1850 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
+C1851 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
+C1852 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
+C1853 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
+C1854 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
+C1855 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
+C1856 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
+C1857 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1858 divbuf_2/OUT divbuf_2/OUT4 1.11fF
+C1859 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1860 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
+C1861 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
+C1862 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF
+C1863 divbuf_6/OUT divbuf_6/OUT4 1.11fF
+C1864 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
+C1865 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
+C1866 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF
+C1867 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF
+C1868 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
+C1869 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
+C1870 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT3 0.26fF
+C1871 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
+C1872 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
+C1873 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
+C1874 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
+C1875 pll_full_1/pd_0/DIV pll_full_1/divider_0/and_0/OUT 0.01fF
+C1876 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1877 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
+C1878 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
+C1879 pll_full_1/ro_complete_0/a4 pll_full_1/divider_0/clk 0.01fF
+C1880 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
+C1881 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF
+C1882 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
+C1883 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
+C1884 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
+C1885 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
+C1886 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
+C1887 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
+C1888 divider_2/Out divider_2/nor_1/B 0.22fF
+C1889 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
+C1890 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C1891 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
+C1892 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
+C1893 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
+C1894 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
+C1895 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
+C1896 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
+C1897 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.01fF
+C1898 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
+C1899 cp_0/a_10_n50# cp_0/vbias 0.19fF
+C1900 pd_1/R pd_1/and_pd_0/Out1 0.33fF
+C1901 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
+C1902 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
+C1903 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
+C1904 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
+C1905 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
+C1906 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
+C1907 divbuf_4/OUT divbuf_4/OUT3 0.26fF
+C1908 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
+C1909 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
+C1910 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
+C1911 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
+C1912 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
+C1913 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/A 0.15fF
+C1914 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
+C1915 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
+C1916 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar1 0.11fF
+C1917 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
+C1918 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
+C1919 pd_0/R pd_0/REF 0.61fF
+C1920 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
+C1921 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
+C1922 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
+C1923 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C1924 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
+C1925 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
+C1926 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
+C1927 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
+C1928 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
+C1929 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF
+C1930 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
+C1931 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
+C1932 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
+C1933 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
+C1934 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
+C1935 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
+C1936 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
+C1937 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
+C1938 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
+C1939 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
+C1940 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF
+C1941 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
+C1942 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C1943 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
+C1944 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C1945 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
+C1946 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C1947 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
+C1948 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
+C1949 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
+C1950 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
+C1951 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
+C1952 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
+C1953 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
+C1954 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
+C1955 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
+C1956 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z1 0.17fF
+C1957 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
+C1958 divider_1/mc2 divider_1/and_0/A 0.16fF
+C1959 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
+C1960 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z4 0.00fF
+C1961 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
+C1962 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
+C1963 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
+C1964 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
+C1965 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
+C1966 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
+C1967 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
+C1968 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
+C1969 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
+C1970 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
+C1971 pll_full_1/divbuf_1/OUT5 pll_full_1/divbuf_1/OUT 43.38fF
+C1972 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C1973 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
+C1974 pll_full_1/ro_complete_0/a1 pll_full_1/divider_0/clk 0.11fF
+C1975 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
+C1976 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
+C1977 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF
+C1978 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
+C1979 divider_0/nor_0/B divider_0/and_0/A 0.26fF
+C1980 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF
+C1981 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
+C1982 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF
+C1983 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
+C1984 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
+C1985 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF
+C1986 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
+C1987 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
+C1988 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
+C1989 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
+C1990 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
+C1991 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF
+C1992 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
+C1993 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
+C1994 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF
+C1995 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
+C1996 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF
+C1997 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF
+C1998 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
+C1999 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.02fF
+C2000 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
+C2001 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
+C2002 divider_0/nor_1/B divider_0/and_0/B 0.29fF
+C2003 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
+C2004 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
+C2005 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
+C2006 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF
+C2007 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
+C2008 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z2 0.23fF
+C2009 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
+C2010 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
+C2011 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
+C2012 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
+C2013 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
+C2014 pll_full_1/filter_0/a_4216_n5230# pll_full_1/divider_0/clk 1.58fF
+C2015 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
+C2016 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF
+C2017 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
+C2018 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
+C2019 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
+C2020 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
+C2021 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
+C2022 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF
+C2023 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
+C2024 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
+C2025 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
+C2026 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
+C2027 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
+C2028 divbuf_6/IN divbuf_6/OUT5 0.00fF
+C2029 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
+C2030 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
+C2031 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
+C2032 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
+C2033 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
+C2034 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
+C2035 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
+C2036 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
+C2037 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
+C2038 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
 Xpd_0 vdda1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
 Xpd_1 vdda1 vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd
 Xcp_0 cp_0/vbias vdda1 gnd cp_0/out cp_0/down cp_0/upbar cp