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/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ahb_tb.files
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/axi_tb.files
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/sky130_sram_2kbyte_1rw1r_32x512_8.v
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/uprj_netlists.v
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/wb_tb.files
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr2_top_tb_ahb.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr2_top_tb_axi.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr2_top_tb_wb.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr_dmem_tb_wb.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr_memory_tb_ahb.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr_memory_tb_axi.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr_memory_tb_wb.sv
/root/riscduino-dual_core__rd0_/verilog/rtl/yifive/ycr2c/tb/ycr_top_tb_runtests.sv