)]}'
{
  "id": "0dcb3067133e88d5598fd7cafc174b7cb9cbcc92",
  "entries": [
    {
      "mode": 16384,
      "type": "tree",
      "id": "fe348bc15bc43e85b98a1ab521d48e7628fa1910",
      "name": "BB"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "4d88493042341558d2fd56c86b269ed7ab2f6ae0",
      "name": "Config.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "35c40c66be672f7e4a826d164bbe2bb462d3499e",
      "name": "ConfigFSM.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "42b8e9254eb25df3c3d541558dea5d688d3d647e",
      "name": "Config_access.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "ae987bb996a73ad2ca3ba4d292bb3a245ec2aeb6",
      "name": "Frame_Data_Reg_Pack.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "de9fc7cce889f954a239cdf6c5bbf0a6c6d7d51c",
      "name": "Frame_Select_Pack.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "d700b235c5f14e1fb1ef541fe48b8137e1746e7a",
      "name": "bitbang.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "43dded1671fd7f21b36fcaaa9335d00d3714c476",
      "name": "config_UART.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "6213b6c266596355201b85145e40fcdb99e9ac83",
      "name": "defines.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "04d673f03426ceb70381c29b18fe83fcbe69946a",
      "name": "eFPGA_v3_top_sky130.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "325d480b3c99b00610737295b06d2ff12b594b25",
      "name": "fabric_DSP_tile.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "d5e3361036030634d4590583321369084dc30bff",
      "name": "models_pack.v"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "5711bc04cfd5f0d62eb1a69de93ba5768d0ca45b",
      "name": "user_project_wrapper.v"
    }
  ]
}