mpw_precheck/logs/spdx_compliance_report.log

/root/microwatt_mpw5/Makefile
/root/microwatt_mpw5/docs/Makefile
/root/microwatt_mpw5/docs/environment.yml
/root/microwatt_mpw5/docs/source/conf.py
/root/microwatt_mpw5/docs/source/index.rst
/root/microwatt_mpw5/docs/source/quickstart.rst
/root/microwatt_mpw5/openlane/Microwatt_FP_DFFRFile/config.tcl
/root/microwatt_mpw5/openlane/multiply_add_64x64/config.tcl
/root/microwatt_mpw5/openlane/multiply_add_64x64/src/multiply_add_64x64.v
/root/microwatt_mpw5/openlane/user_proj_example/config.json
/root/microwatt_mpw5/openlane/user_proj_example/config.tcl
/root/microwatt_mpw5/openlane/user_project_wrapper/Microwatt_FP_DFFRFile.lib
/root/microwatt_mpw5/openlane/user_project_wrapper/RAM32_1RW1R.lib
/root/microwatt_mpw5/openlane/user_project_wrapper/RAM512.lib
/root/microwatt_mpw5/openlane/user_project_wrapper/base.sdc
/root/microwatt_mpw5/openlane/user_project_wrapper/config.json
/root/microwatt_mpw5/openlane/user_project_wrapper/config.tcl
/root/microwatt_mpw5/openlane/user_project_wrapper/multiply_add_64x64.lib
/root/microwatt_mpw5/openlane/user_project_wrapper/scripts/layout.py
/root/microwatt_mpw5/sdc/Microwatt_FP_DFFRFile.sdc
/root/microwatt_mpw5/sdc/RAM32_1RW1R.sdc
/root/microwatt_mpw5/sdc/RAM512.sdc
/root/microwatt_mpw5/sdc/multiply_add_64x64.sdc
/root/microwatt_mpw5/sdc/user_project_wrapper.sdc
/root/microwatt_mpw5/sdf/Microwatt_FP_DFFRFile.sdf
/root/microwatt_mpw5/sdf/RAM32_1RW1R.sdf
/root/microwatt_mpw5/sdf/RAM512.sdf
/root/microwatt_mpw5/sdf/multiply_add_64x64.sdf
/root/microwatt_mpw5/sdf/user_project_wrapper.sdf
/root/microwatt_mpw5/spef/Microwatt_FP_DFFRFile.spef
/root/microwatt_mpw5/spef/RAM32_1RW1R.spef
/root/microwatt_mpw5/spef/RAM512.spef
/root/microwatt_mpw5/spef/multiply_add_64x64.spef
/root/microwatt_mpw5/spef/user_project_wrapper.spef
/root/microwatt_mpw5/verilog/dv/Makefile
/root/microwatt_mpw5/verilog/dv/io_ports/Makefile
/root/microwatt_mpw5/verilog/dv/io_ports/io_ports.c
/root/microwatt_mpw5/verilog/dv/io_ports/io_ports_tb.v
/root/microwatt_mpw5/verilog/dv/la_test1/Makefile
/root/microwatt_mpw5/verilog/dv/la_test1/la_test1.c
/root/microwatt_mpw5/verilog/dv/la_test1/la_test1_tb.v
/root/microwatt_mpw5/verilog/dv/la_test2/Makefile
/root/microwatt_mpw5/verilog/dv/la_test2/la_test2.c
/root/microwatt_mpw5/verilog/dv/la_test2/la_test2_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/make.env
/root/microwatt_mpw5/verilog/dv/microwatt/make.rules
/root/microwatt_mpw5/verilog/dv/microwatt/microwatt.lds
/root/microwatt_mpw5/verilog/dv/microwatt/include/console.h
/root/microwatt_mpw5/verilog/dv/microwatt/include/io.h
/root/microwatt_mpw5/verilog/dv/microwatt/include/microwatt_soc.h
/root/microwatt_mpw5/verilog/dv/microwatt/include/microwatt_util.h
/root/microwatt_mpw5/verilog/dv/microwatt/jtag/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/jtag/jtag_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/jtag/microwatt.c
/root/microwatt_mpw5/verilog/dv/microwatt/lib/console.c
/root/microwatt_mpw5/verilog/dv/microwatt/lib/head.S
/root/microwatt_mpw5/verilog/dv/microwatt/memory_test/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/memory_test/hash.h
/root/microwatt_mpw5/verilog/dv/microwatt/memory_test/memory_test_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/memory_test/microwatt.c
/root/microwatt_mpw5/verilog/dv/microwatt/memory_test/tbuart_modified.v
/root/microwatt_mpw5/verilog/dv/microwatt/minimal/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/minimal/head.S
/root/microwatt_mpw5/verilog/dv/microwatt/minimal/minimal_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_micropython/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_micropython/bin2hex.py
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_micropython/microwatt.c
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_micropython/simplebus_micropython_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_micropython/tbuart_modified.v
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_minimal/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_minimal/microwatt.c
/root/microwatt_mpw5/verilog/dv/microwatt/simplebus_minimal/simplebus_minimal_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/gen_hash.c
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/hash.h
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/lfsr32.c
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/lfsr32.h
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/microwatt.c
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/spi_flash_tb.v
/root/microwatt_mpw5/verilog/dv/microwatt/spi_flash/tbuart_modified.v
/root/microwatt_mpw5/verilog/dv/microwatt/uart/Makefile
/root/microwatt_mpw5/verilog/dv/microwatt/uart/microwatt.c
/root/microwatt_mpw5/verilog/dv/microwatt/uart/uart_tb.v
/root/microwatt_mpw5/verilog/dv/mprj_stimulus/Makefile
/root/microwatt_mpw5/verilog/dv/mprj_stimulus/mprj_stimulus.c
/root/microwatt_mpw5/verilog/dv/mprj_stimulus/mprj_stimulus_tb.v
/root/microwatt_mpw5/verilog/dv/wb_port/Makefile
/root/microwatt_mpw5/verilog/dv/wb_port/wb_port.c
/root/microwatt_mpw5/verilog/dv/wb_port/wb_port_tb.v
/root/microwatt_mpw5/verilog/includes/includes.gl+sdf.caravel_user_project
/root/microwatt_mpw5/verilog/includes/includes.gl.caravel_user_project
/root/microwatt_mpw5/verilog/includes/includes.rtl.caravel_user_project
/root/microwatt_mpw5/verilog/rtl/Microwatt_FP_DFFRFile.v
/root/microwatt_mpw5/verilog/rtl/RAM32_1RW1R.v
/root/microwatt_mpw5/verilog/rtl/RAM512.v
/root/microwatt_mpw5/verilog/rtl/microwatt.v
/root/microwatt_mpw5/verilog/rtl/multiply_add_64x64.v
/root/microwatt_mpw5/verilog/rtl/raminfr.v
/root/microwatt_mpw5/verilog/rtl/simplebus_host.v
/root/microwatt_mpw5/verilog/rtl/tap_top.v
/root/microwatt_mpw5/verilog/rtl/uart_defines.v
/root/microwatt_mpw5/verilog/rtl/uart_receiver.v
/root/microwatt_mpw5/verilog/rtl/uart_regs.v
/root/microwatt_mpw5/verilog/rtl/uart_rfifo.v
/root/microwatt_mpw5/verilog/rtl/uart_sync_flops.v
/root/microwatt_mpw5/verilog/rtl/uart_tfifo.v
/root/microwatt_mpw5/verilog/rtl/uart_top.v
/root/microwatt_mpw5/verilog/rtl/uart_transmitter.v
/root/microwatt_mpw5/verilog/rtl/uart_wb.v
/root/microwatt_mpw5/verilog/rtl/uprj_netlists.v
/root/microwatt_mpw5/verilog/rtl/user_defines.v
/root/microwatt_mpw5/verilog/rtl/user_proj_example.v
/root/microwatt_mpw5/verilog/rtl/user_project_wrapper.v
/root/microwatt_mpw5/verilog/rtl/wrapper/Microwatt_FP_DFFRFile.v
/root/microwatt_mpw5/verilog/rtl/wrapper/RAM32_1RW1R.v
/root/microwatt_mpw5/verilog/rtl/wrapper/RAM512.v
/root/microwatt_mpw5/verilog/rtl/wrapper/multiply_add_64x64.v