| # Caravel Analog User |
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| [](https://opensource.org/licenses/Apache-2.0) [](https://github.com/efabless/caravel_user_project_analog/actions/workflows/user_project_ci.yml) [](https://github.com/efabless/caravel_user_project_analog/actions/workflows/caravan_build.yml) |
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| PLL-BASED CAPACITIVE SENSOR INTERFACE |
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| This project involves the design of a capacitive sensor-to-digital converter using time-based circuit techniques. It uses basic digitally-oriented building blocks (two oscillators, a D-flipflop and a feedback loop including a capacitive element and a switch) to convert input capacitive values into digital single bit traces in the time domain. The basic block diagram can be seen below: |
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| The architecture has been tested for a DC sweep of input capacitive values. The characteristic plot for an average window of 10us is seen below: |
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| Refer to [README](docs/source/index.rst) for this sample project documentation. |