diff --git a/mag/BUFFMIN_v1p1.ext b/mag/BUFFMIN_v1p1.ext
new file mode 100644
index 0000000..b9d66fe
--- /dev/null
+++ b/mag/BUFFMIN_v1p1.ext
@@ -0,0 +1,31 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use invmin_magic_v1p1 invmin_magic_v1p1_0 1 0 270 0 1 140
+use invmin_magic_v1p1 invmin_magic_v1p1_1 1 0 740 0 1 140
+port "VSS" 4 -14 216 -14 216 m1
+port "VDD" 3 -6 532 -6 532 m1
+port "VOUT" 2 870 62 870 62 li
+port "VIN" 1 -4 68 -4 68 li
+node "VSS" 0 105.42 -14 216 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10800 480 0 0 0 0 0 0 0 0 0 0
+node "VDD" 0 105.42 -6 532 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10800 480 0 0 0 0 0 0 0 0 0 0
+node "VOUT" 12 57.3125 870 62 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2500 200 0 0 0 0 0 0 0 0 0 0 0 0
+node "VIN" 12 57.3125 -4 68 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2500 200 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "VDD" "VSS" 20.7692
+cap "invmin_magic_v1p1_0/VOUT" "VSS" 59.4
+cap "VSS" "VDD" -20.7692
+cap "VIN" "invmin_magic_v1p1_0/VOUT" 10.6757
+cap "VOUT" "invmin_magic_v1p1_0/VOUT" 32.1081
+cap "invmin_magic_v1p1_0/VOUT" "VDD" 59.4
+merge "invmin_magic_v1p1_1/VSS" "invmin_magic_v1p1_0/VSS" -179.22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -10800 -840 0 0 0 0 0 0 0 0 0 0
+merge "invmin_magic_v1p1_0/VSS" "VSUBS"
+merge "VSUBS" "VSS"
+merge "invmin_magic_v1p1_1/VOUT" "VOUT" -57.3125 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2500 -200 0 0 0 0 0 0 0 0 0 0 0 0
+merge "invmin_magic_v1p1_1/VDD" "invmin_magic_v1p1_0/VDD" -179.22 0 0 0 0 0 -560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -10800 -840 0 0 0 0 0 0 0 0 0 0
+merge "invmin_magic_v1p1_0/VDD" "VDD"
+merge "invmin_magic_v1p1_1/VIN" "invmin_magic_v1p1_0/VOUT" -27.5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -100 0 0 0 0 0 0 0 0 0 0 0 0
+merge "invmin_magic_v1p1_0/VIN" "VIN" -57.3125 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2500 -200 0 0 0 0 0 0 0 0 0 0 0 0
diff --git a/mag/CAPOSC_v1p1.ext b/mag/CAPOSC_v1p1.ext
new file mode 100644
index 0000000..5e92c82
--- /dev/null
+++ b/mag/CAPOSC_v1p1.ext
@@ -0,0 +1,74 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use sky130_fd_pr__cap_mim_m3_2_7PBNAZ sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0 1 0 3739 0 1 2320
+use sky130_fd_pr__cap_mim_m3_1_9K4XRG sky130_fd_pr__cap_mim_m3_1_9K4XRG_0 1 0 4560 0 1 2320
+use sky130_fd_pr__cap_mim_m3_2_4SGG6N sky130_fd_pr__cap_mim_m3_2_4SGG6N_0 1 0 7323 0 1 2320
+parameters sky130_fd_pr__cap_mim_m3_1 w=w l=l
+port "TOP_V" 2 4110 4986 4110 4986 m4
+port "TOP_B" 3 9210 5152 9210 5152 m4
+port "BOT" 1 6140 4764 6140 4764 m4
+node "TOP_V" 0 918.221 4110 4986 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 366112 3464 197936 1920 0 0
+node "TOP_B" 1 1053.34 9210 5152 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1265152 12756 330460 2432 0 0
+node "m3_4130_n432#" 0 597.017 4130 -432 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 123256 1436 123256 1436 0 0 0 0
+node "BOT" 7 12161.4 6140 4764 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 386736 9376 19146224 20412 176000 1740 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "TOP_B" "BOT" 5353.37
+device csubckt sky130_fd_pr__cap_mim_m3_1 6100 100 6101 101 w=3760 l=4440 "None" "TOP_B" 8896 0 "BOT" 200 0
+cap "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" 342.858
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" 800.65
+cap "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" 342.858
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" 2785.71
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" 461.64
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" -23.18
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" 2617.35
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "TOP_B" 695.125
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" -3479.03
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" -3905.66
+cap "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 2469.04
+cap "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" 579.012
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" 1172.5
+cap "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" 579.012
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" 196
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" 4028.92
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" 3887.43
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" -164.41
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" -6640.98
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "TOP_B" 1172.5
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" -5540.76
+cap "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" 2469.04
+cap "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" 579.012
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" 1172.5
+cap "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 579.012
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" 4028.92
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" 196
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" 3887.43
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" -164.41
+cap "TOP_B" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" 1172.5
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" -5540.76
+cap "BOT" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" -6183.84
+cap "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 1582.66
+cap "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "TOP_V" 848.197
+cap "TOP_V" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 361.376
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" 311.1
+cap "TOP_V" "BOT" 134.222
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "BOT" 316.91
+cap "BOT" "TOP_B" -116.28
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" 2335.11
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "TOP_B" -51.0662
+cap "TOP_B" "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" 833.56
+cap "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "BOT" -3714.11
+cap "TOP_B" "BOT" -3251.61
+merge "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/m4_n2231_n2320#" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" -2295.93 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 47814 -1747 405764 -4685 45308 -1204 0 0 0 0
+merge "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/m3_n456_n2320#" "BOT"
+merge "BOT" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#"
+merge "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "m3_4130_n432#"
+merge "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/c1_n356_n2220#" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/c2_n571_n2220#" -76.3598 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 462071 -138 138704 -688 0 0
+merge "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/c2_n571_n2220#" "TOP_V"
+merge "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/VSUBS" "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__cap_mim_m3_1_9K4XRG_0/VSUBS" "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/VSUBS" "VSUBS"
+merge "sky130_fd_pr__cap_mim_m3_2_4SGG6N_0/c2_n2131_n2220#" "TOP_B" 1274.97 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 163212 -122 -3912 -1386 0 0
diff --git a/mag/DFF_v4p1.ext b/mag/DFF_v4p1.ext
new file mode 100644
index 0000000..083ae2a
--- /dev/null
+++ b/mag/DFF_v4p1.ext
@@ -0,0 +1,219 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use sky130_fd_pr__pfet_01v8_MA8JHN sky130_fd_pr__pfet_01v8_MA8JHN_0 1 0 909 0 1 198
+use sky130_fd_pr__nfet_01v8_6H9P4D sky130_fd_pr__nfet_01v8_6H9P4D_0 1 0 909 0 1 -168
+use sky130_fd_pr__nfet_01v8_59MFY5 sky130_fd_pr__nfet_01v8_59MFY5_0 1 0 709 0 1 -199
+use sky130_fd_pr__pfet_01v8_MA8JHN sky130_fd_pr__pfet_01v8_MA8JHN_1 1 0 709 0 1 198
+use sky130_fd_pr__nfet_01v8_59MFY5 sky130_fd_pr__nfet_01v8_59MFY5_1 1 0 509 0 1 -199
+use sky130_fd_pr__nfet_01v8_6H9P4D sky130_fd_pr__nfet_01v8_6H9P4D_1 1 0 309 0 1 -168
+use sky130_fd_pr__pfet_01v8_MA8JHN sky130_fd_pr__pfet_01v8_MA8JHN_2 1 0 309 0 1 198
+use sky130_fd_pr__nfet_01v8_6H9P4D sky130_fd_pr__nfet_01v8_6H9P4D_2 1 0 109 0 1 -168
+use sky130_fd_pr__pfet_01v8_MA8JHN sky130_fd_pr__pfet_01v8_MA8JHN_3 1 0 109 0 1 198
+use sky130_fd_pr__nfet_01v8_59MFY5 sky130_fd_pr__nfet_01v8_59MFY5_2 1 0 -91 0 1 -199
+use sky130_fd_pr__nfet_01v8_59MFY5 sky130_fd_pr__nfet_01v8_59MFY5_3 1 0 -291 0 1 -199
+use sky130_fd_pr__pfet_01v8_MA8JHN sky130_fd_pr__pfet_01v8_MA8JHN_4 1 0 -491 0 1 198
+use sky130_fd_pr__nfet_01v8_6H9P4D sky130_fd_pr__nfet_01v8_6H9P4D_3 1 0 -491 0 1 -168
+use sky130_fd_pr__pfet_01v8_MA8JHN sky130_fd_pr__pfet_01v8_MA8JHN_5 1 0 -291 0 1 198
+port "IN" 4 904 328 904 328 m1
+port "CLK" 3 -284 -436 -284 -436 m2
+port "ND" 5 8 320 8 320 m1
+port "D" 6 400 320 400 320 li
+port "VDD" 1 208 506 208 506 m2
+port "GND" 2 216 -542 216 -542 m1
+node "m1_576_n268#" 0 229.933 576 -268 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13200 532 0 0 0 0 0 0 0 0 0 0
+node "m1_376_n268#" 0 260.737 376 -268 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13200 532 0 0 0 0 0 0 0 0 0 0
+node "m1_n24_n268#" 0 260.737 -24 -268 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13200 532 0 0 0 0 0 0 0 0 0 0
+node "m1_n224_n268#" 0 229.933 -224 -268 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13200 532 0 0 0 0 0 0 0 0 0 0
+node "m1_476_n356#" 3 742.501 476 -356 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24648 1220 54780 1792 0 0 0 0 0 0 0 0
+node "m1_330_n68#" 0 59.6552 330 -68 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5980 352 0 0 0 0 0 0 0 0 0 0
+node "m1_42_n68#" 0 59.6552 42 -68 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5980 352 0 0 0 0 0 0 0 0 0 0
+node "m1_n564_n40#" 3 738.061 -564 -40 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24536 1216 54912 1796 0 0 0 0 0 0 0 0
+node "m1_776_62#" 0 131.906 776 62 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13200 532 0 0 0 0 0 0 0 0 0 0
+node "m1_n424_62#" 0 131.906 -424 62 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13200 532 0 0 0 0 0 0 0 0 0 0
+node "IN" 0 54.94 904 328 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4488 268 0 0 0 0 0 0 0 0 0 0
+node "m1_76_294#" 0 44.5417 76 294 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3696 244 0 0 0 0 0 0 0 0 0 0
+node "CLK" 8 2559.96 -284 -436 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 18528 1088 225916 6804 0 0 0 0 0 0 0 0
+node "m1_n524_292#" 0 47.97 -524 292 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4488 268 0 0 0 0 0 0 0 0 0 0
+node "ND" 2 207.312 8 320 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21648 1300 0 0 0 0 0 0 0 0 0 0
+node "li_n632_n20#" 656 997.244 -632 -20 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 62152 3724 0 0 0 0 0 0 0 0 0 0 0 0
+node "D" 191 311.3 400 320 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 18088 1132 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_894_n42#" 125 65.601 894 -42 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2340 216 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_294_n42#" 125 65.601 294 -42 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2340 216 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_94_n42#" 125 65.601 94 -42 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2340 216 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_n506_n42#" 125 65.601 -506 -42 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2340 216 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+node "VDD" 5911 3577.78 208 506 m2 0 0 0 0 1046672 4596 0 0 256000 3520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 176928 3332 222348 5524 24288 868 0 0 0 0 0 0 0 0
+substrate "GND" 0 0 216 -542 m1 350224 3728 0 0 0 0 0 0 0 0 256000 3520 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 173824 3328 291660 5856 0 0 0 0 0 0 0 0 0 0
+cap "VDD" "CLK" 317.617
+cap "D" "m1_76_294#" 19.5552
+cap "m1_476_n356#" "m1_776_62#" 70.7143
+cap "m1_330_n68#" "li_n632_n20#" 40.6174
+cap "m1_n564_n40#" "CLK" 446.158
+cap "m1_476_n356#" "li_n632_n20#" 53.5196
+cap "ND" "CLK" 22.2066
+cap "a_94_n42#" "li_n632_n20#" 26.497
+cap "m1_n224_n268#" "m1_n564_n40#" 64.5918
+cap "m1_330_n68#" "CLK" 40.4002
+cap "m1_76_294#" "m1_42_n68#" 2.32759
+cap "m1_n524_292#" "li_n632_n20#" 39.5254
+cap "m1_576_n268#" "m1_376_n268#" 67.1642
+cap "m1_476_n356#" "CLK" 444.679
+cap "m1_n564_n40#" "a_n506_n42#" 54.121
+cap "D" "VDD" 348.814
+cap "m1_n524_292#" "CLK" 23.1818
+cap "m1_76_294#" "VDD" 31.3432
+cap "ND" "D" 148.844
+cap "IN" "VDD" 125.2
+cap "CLK" "li_n632_n20#" 48.821
+cap "m1_42_n68#" "VDD" 6.74289
+cap "m1_476_n356#" "a_894_n42#" 55.2685
+cap "m1_376_n268#" "m1_n24_n268#" 26.9461
+cap "m1_n424_62#" "VDD" 91.3758
+cap "ND" "m1_76_294#" 175.277
+cap "m1_476_n356#" "m1_576_n268#" 64.5918
+cap "m1_n564_n40#" "m1_42_n68#" 14.8872
+cap "m1_n564_n40#" "m1_n424_62#" 70.7143
+cap "ND" "m1_42_n68#" 6.55063
+cap "ND" "m1_n24_n268#" 7.60135
+cap "ND" "m1_n424_62#" 4.37143
+cap "a_n506_n42#" "li_n632_n20#" 26.497
+cap "m1_330_n68#" "m1_42_n68#" 24.1736
+cap "m1_476_n356#" "IN" 11.0161
+cap "m1_n564_n40#" "VDD" 15.4987
+cap "D" "li_n632_n20#" 34.1254
+cap "ND" "VDD" 502.115
+cap "a_294_n42#" "a_94_n42#" 10.5529
+cap "m1_330_n68#" "VDD" 6.74289
+cap "m1_42_n68#" "li_n632_n20#" 40.6174
+cap "m1_476_n356#" "VDD" 16.9833
+cap "m1_330_n68#" "ND" 2.32759
+cap "m1_76_294#" "CLK" 7.59036
+cap "a_294_n42#" "li_n632_n20#" 26.497
+cap "IN" "CLK" 23.1818
+cap "VDD" "m1_776_62#" 91.3758
+cap "VDD" "m1_n524_292#" 123.741
+cap "m1_42_n68#" "CLK" 40.4002
+cap "m1_n564_n40#" "m1_n524_292#" 11.0161
+cap "VDD" "li_n632_n20#" 106.174
+cap "m1_330_n68#" "m1_476_n356#" 14.8872
+cap "m1_n564_n40#" "li_n632_n20#" 202.166
+cap "m1_n224_n268#" "m1_n24_n268#" 67.1642
+cap "D" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" 44.6629
+cap "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "D" 7.09938
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "GND" 19.343
+cap "D" "GND" 114.551
+cap "CLK" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" 260.906
+cap "CLK" "D" 104.997
+cap "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "GND" 15.338
+cap "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" 320.267
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 57.1033
+cap "D" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 388.383
+cap "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" "GND" 100.503
+cap "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "CLK" 30.0128
+cap "ND" "D" 267.38
+cap "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 7.61538
+cap "CLK" "GND" 111.296
+cap "GND" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 165.073
+cap "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 51
+cap "CLK" "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" 7.91561
+cap "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "ND" 251.266
+cap "ND" "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" 40.2253
+cap "ND" "GND" 35.6791
+cap "CLK" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 290.783
+cap "VDD" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" 50.8654
+cap "ND" "CLK" 100.614
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" 58.4824
+cap "VDD" "D" 86.9145
+cap "ND" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 90.9824
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "CLK" 254.199
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 25.5
+cap "VDD" "GND" 50.2396
+cap "ND" "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" 59.8567
+cap "VDD" "CLK" 123.517
+cap "VDD" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 135.968
+cap "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "D" 40.2253
+cap "ND" "VDD" 102.494
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "VDD" 55.7087
+cap "IN" "CLK" 17.2563
+cap "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "GND" 141.291
+cap "IN" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 1.62257
+cap "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "CLK" 7.91561
+cap "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 465.102
+cap "IN" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 10.6654
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 82.8176
+cap "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 41.4839
+cap "IN" "sky130_fd_pr__nfet_01v8_59MFY5_0/a_n33_n157#" 3.54969
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/w_n109_n198#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" 98.8036
+cap "IN" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" 9.21951
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "D" 16.5723
+cap "IN" "sky130_fd_pr__pfet_01v8_MA8JHN_1/w_n109_n198#" 26.3503
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "sky130_fd_pr__pfet_01v8_MA8JHN_1/w_n109_n198#" -6.54117
+cap "IN" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n33_95#" 13.7066
+cap "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" -165.54
+cap "IN" "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#" 2.03083
+cap "D" "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#" 27.5457
+cap "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#" 30.8966
+cap "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#" 17.1287
+merge "sky130_fd_pr__nfet_01v8_59MFY5_0/a_n73_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" -43.26 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 62000 -800 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__nfet_01v8_59MFY5_1/a_15_n69#" "m1_576_n268#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_1/a_n15_n126#" "sky130_fd_pr__pfet_01v8_MA8JHN_2/a_n33_95#" -158.468 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -120 0 0 0 0 -2668 -1260 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_2/a_n33_95#" "a_294_n42#"
+merge "a_294_n42#" "sky130_fd_pr__nfet_01v8_6H9P4D_2/a_n73_n100#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_2/a_n73_n100#" "sky130_fd_pr__nfet_01v8_59MFY5_2/a_15_n69#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_2/a_15_n69#" "m1_n24_n268#"
+merge "m1_n24_n268#" "sky130_fd_pr__pfet_01v8_MA8JHN_3/a_n73_n136#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_3/a_n73_n136#" "m1_42_n68#"
+merge "m1_42_n68#" "ND"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n33_n157#" "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" -298.068 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2668 -300 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" "m1_n564_n40#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_0/a_n33_95#" "IN" -21.7416 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -120 0 0 0 0 2668 -208 0 0 0 0 0 0 0 0 0 0
+merge "IN" "sky130_fd_pr__nfet_01v8_6H9P4D_0/a_n15_n126#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_0/a_n15_n126#" "a_894_n42#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_0/VSUBS" "sky130_fd_pr__nfet_01v8_6H9P4D_0/w_n99_n126#" -30.6168 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -400 -1784 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_0/w_n99_n126#" "sky130_fd_pr__nfet_01v8_6H9P4D_0/a_n73_n100#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_0/a_n73_n100#" "sky130_fd_pr__nfet_01v8_59MFY5_0/w_n99_n95#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_0/w_n99_n95#" "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_0/a_15_n69#" "sky130_fd_pr__pfet_01v8_MA8JHN_1/VSUBS"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_1/VSUBS" "sky130_fd_pr__nfet_01v8_59MFY5_1/w_n99_n95#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_1/w_n99_n95#" "sky130_fd_pr__nfet_01v8_6H9P4D_1/w_n99_n126#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_1/w_n99_n126#" "sky130_fd_pr__nfet_01v8_6H9P4D_1/a_n73_n100#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_1/a_n73_n100#" "sky130_fd_pr__pfet_01v8_MA8JHN_2/VSUBS"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_2/VSUBS" "sky130_fd_pr__nfet_01v8_6H9P4D_2/w_n99_n126#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_2/w_n99_n126#" "sky130_fd_pr__nfet_01v8_6H9P4D_2/a_15_n100#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_2/a_15_n100#" "sky130_fd_pr__pfet_01v8_MA8JHN_3/VSUBS"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_3/VSUBS" "sky130_fd_pr__nfet_01v8_59MFY5_2/w_n99_n95#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_2/w_n99_n95#" "sky130_fd_pr__nfet_01v8_59MFY5_3/w_n99_n95#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_3/w_n99_n95#" "sky130_fd_pr__pfet_01v8_MA8JHN_5/VSUBS"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_5/VSUBS" "GND"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_0/a_15_n100#" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" -147.741 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -68 7728 -392 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" "li_n632_n20#"
+merge "li_n632_n20#" "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n33_n157#" "m1_476_n356#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_0/a_15_n136#" "sky130_fd_pr__pfet_01v8_MA8JHN_0/w_n109_n198#" -812.972 0 0 0 0 -214304 -5568 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42400 -1200 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_0/w_n109_n198#" "sky130_fd_pr__pfet_01v8_MA8JHN_1/w_n109_n198#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_1/w_n109_n198#" "sky130_fd_pr__pfet_01v8_MA8JHN_2/a_n73_n136#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_2/a_n73_n136#" "sky130_fd_pr__pfet_01v8_MA8JHN_2/w_n109_n198#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_2/w_n109_n198#" "sky130_fd_pr__pfet_01v8_MA8JHN_3/a_15_n136#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_3/a_15_n136#" "sky130_fd_pr__pfet_01v8_MA8JHN_3/w_n109_n198#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_3/w_n109_n198#" "sky130_fd_pr__pfet_01v8_MA8JHN_5/w_n109_n198#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_5/w_n109_n198#" "VDD"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_1/a_n73_n69#" "sky130_fd_pr__nfet_01v8_6H9P4D_1/a_15_n100#" -94.1539 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -120 0 0 7452 -138 139332 -1192 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_1/a_15_n100#" "m1_376_n268#"
+merge "m1_376_n268#" "sky130_fd_pr__pfet_01v8_MA8JHN_2/a_15_n136#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_2/a_15_n136#" "m1_330_n68#"
+merge "m1_330_n68#" "sky130_fd_pr__nfet_01v8_6H9P4D_2/a_n15_n126#"
+merge "sky130_fd_pr__nfet_01v8_6H9P4D_2/a_n15_n126#" "sky130_fd_pr__pfet_01v8_MA8JHN_3/a_n33_95#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_3/a_n33_95#" "m1_76_294#"
+merge "m1_76_294#" "a_94_n42#"
+merge "a_94_n42#" "D"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_0/a_n33_n157#" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n33_95#" -622.534 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4968 -688 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n33_95#" "sky130_fd_pr__nfet_01v8_59MFY5_3/a_n33_n157#"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_3/a_n33_n157#" "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_n33_95#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_5/a_n33_95#" "CLK"
+merge "sky130_fd_pr__nfet_01v8_59MFY5_2/a_n73_n69#" "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" -83.56 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -800 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__nfet_01v8_59MFY5_3/a_15_n69#" "m1_n224_n268#"
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_0/a_n73_n136#" "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" 90.42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 18000 -800 0 0 0 0 0 0 0 0 0 0
+merge "sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "m1_776_62#"
diff --git a/mag/INVMIN_v1p1.ext b/mag/INVMIN_v1p1.ext
new file mode 100644
index 0000000..f3e48ba
--- /dev/null
+++ b/mag/INVMIN_v1p1.ext
@@ -0,0 +1,21 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sky130_fd_pr__pfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+port "VOUT" 2 170 -80 170 -80 li
+port "VIN" 1 -300 -80 -300 -80 li
+port "VDD" 3 -300 390 -300 390 m1
+port "VSS" 4 -300 80 -300 80 m1
+node "VOUT" 653 469.14 170 -80 li 0 0 0 0 0 0 0 0 24000 640 24000 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 49500 1560 0 0 0 0 0 0 0 0 0 0 0 0
+node "VIN" 1029 672.152 -300 -80 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27100 1540 0 0 20500 820 0 0 0 0 0 0 0 0 0 0 0 0
+node "VDD" 3397 709.688 -300 390 m1 0 0 0 0 131600 1500 0 0 24000 640 24000 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 39600 800 84600 1300 0 0 0 0 0 0 0 0 0 0
+substrate "VSS" 0 0 -300 80 m1 111384 1388 0 0 0 0 0 0 24000 640 24000 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 39600 800 84600 1300 0 0 0 0 0 0 0 0 0 0
+cap "VIN" "VDD" 40.9179
+cap "VOUT" "VDD" 301.24
+cap "VOUT" "VIN" 27.5
+device msubckt sky130_fd_pr__nfet_01v8 -20 -20 -19 -19 l=30 w=200 "VSS" "VIN" 60 0 "VSS" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 -20 290 -19 291 l=30 w=200 "VDD" "VIN" 60 0 "VDD" 200 0 "VOUT" 200 0
diff --git a/mag/INV_v1p1.ext b/mag/INV_v1p1.ext
new file mode 100644
index 0000000..276a48a
--- /dev/null
+++ b/mag/INV_v1p1.ext
@@ -0,0 +1,27 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sky130_fd_pr__pfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+port "VOUT" 2 1838 430 1838 430 m1
+port "VIN" 1 1674 432 1674 432 m1
+port "VDD" 3 2224 1024 2224 1024 li
+port "VSS" 4 1838 -122 1838 -122 li
+node "VOUT" 5553 1202.21 1838 430 m1 0 0 0 0 0 0 0 0 24800 1048 51200 2112 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 42432 2904 111362 5994 0 0 0 0 0 0 0 0 0 0
+node "VIN" 5004 1401.75 1674 432 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 109464 6676 0 0 8976 800 31976 1644 0 0 0 0 0 0 0 0 0 0
+node "VDD" 15688 3635.95 2224 1024 li 0 0 0 0 580580 3096 0 0 90848 5344 39600 1596 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 126854 7462 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "VSS" 0 0 1838 -122 li 303600 2212 0 0 0 0 0 0 13200 532 63512 3736 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 75208 4424 0 0 0 0 0 0 0 0 0 0 0 0
+cap "VOUT" "VIN" 589.766
+cap "VOUT" "VDD" 1291.77
+cap "VDD" "VIN" 284.593
+device msubckt sky130_fd_pr__nfet_01v8 1662 32 1663 33 l=30 w=200 "VSS" "VIN" 60 0 "VSS" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__nfet_01v8 1566 32 1567 33 l=30 w=200 "VSS" "VIN" 60 0 "VOUT" 200 0 "VSS" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 2046 661 2047 662 l=30 w=200 "VDD" "VIN" 60 0 "VDD" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1950 661 1951 662 l=30 w=200 "VDD" "VIN" 60 0 "VOUT" 200 0 "VDD" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1854 661 1855 662 l=30 w=200 "VDD" "VIN" 60 0 "VDD" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1758 661 1759 662 l=30 w=200 "VDD" "VIN" 60 0 "VOUT" 200 0 "VDD" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1662 661 1663 662 l=30 w=200 "VDD" "VIN" 60 0 "VDD" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1566 661 1567 662 l=30 w=200 "VDD" "VIN" 60 0 "VOUT" 200 0 "VDD" 200 0
diff --git a/mag/INVandCAP_v1p1.ext b/mag/INVandCAP_v1p1.ext
new file mode 100644
index 0000000..9bc81ec
--- /dev/null
+++ b/mag/INVandCAP_v1p1.ext
@@ -0,0 +1,33 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use CAPOSC_v1p1 CAPOSC_v1p1_0 1 0 -3068 0 1 432
+use INV_v1p1 INV_v1p1_0 1 0 2818 0 1 5366
+port "VOUT" 1 5220 5580 5220 5580 m3
+port "VSS" 3 4984 5204 4984 5204 m1
+port "VDD" 2 5034 6392 5034 6392 m1
+node "VOUT" 1 708.748 5220 5580 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 106848 1608 30976 704 101808 1548 24336 624 0 0 0 0
+node "m1_3976_5498#" 1 499.797 3976 5498 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 91472 1644 28224 672 0 0 0 0 0 0 0 0
+node "VSS" 15 1380.9 4984 5204 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7744 352 235992 4916 24640 664 0 0 0 0 0 0 0 0
+node "VDD" 12 212.744 5034 6392 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10000 400 12544 448 0 0 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "VSS" "VOUT" 119.587
+cap "INV_v1p1_0/VOUT" "INV_v1p1_0/VIN" 18.2123
+cap "VOUT" "VSS" -97.7578
+cap "VOUT" "INV_v1p1_0/VIN" 41.5188
+cap "VOUT" "VSS" -23.95
+cap "INV_v1p1_0/VIN" "INV_v1p1_0/VSS" -156
+cap "VSS" "VOUT" 11.55
+cap "VOUT" "INV_v1p1_0/VIN" 54.4893
+cap "VSS" "INV_v1p1_0/VIN" 147.477
+merge "CAPOSC_v1p1_0/BOT" "INV_v1p1_0/VSS" -233.524 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -68776 -112 866088 -2860 53984 -664 0 0 0 0 0 0 0 0
+merge "INV_v1p1_0/VSS" "VSS"
+merge "VSS" "CAPOSC_v1p1_0/VSUBS"
+merge "CAPOSC_v1p1_0/VSUBS" "VSUBS"
+merge "INV_v1p1_0/VOUT" "CAPOSC_v1p1_0/TOP_B" -33.3148 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -9656 -336 0 0 0 0 -35856 -624 0 0 0 0
+merge "CAPOSC_v1p1_0/TOP_B" "VOUT"
+merge "INV_v1p1_0/VDD" "VDD" -77.839 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1564 -160 0 0 0 0 0 0 0 0 0 0 0 0
+merge "INV_v1p1_0/VIN" "m1_3976_5498#" 165.647 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -36508 -328 0 0 0 0 0 0 0 0 0 0
diff --git a/mag/OSC_v3p2.ext b/mag/OSC_v3p2.ext
new file mode 100644
index 0000000..abe6c73
--- /dev/null
+++ b/mag/OSC_v3p2.ext
@@ -0,0 +1,163 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use BUFFMIN_v1p1 BUFFMIN_v1p1_0 1 0 19494 0 1 5938
+use INVandCAP_v1p1 INVandCAP_v1p1_2 1 0 -12 0 1 10
+use INVandCAP_v1p1 INVandCAP_v1p1_1 1 0 6988 0 1 10
+use INVandCAP_v1p1 INVandCAP_v1p1_0 1 0 13988 0 1 10
+port "CON_CV" 5 16012 5754 16012 5754 m5
+port "N1" 4 7040 5580 7040 5580 m2
+port "SENS_IN" 3 4048 6666 4048 6666 m2
+port "VSS" 2 5512 5204 5512 5204 m1
+port "VDD" 1 5626 6424 5626 6424 m1
+port "N2" 6 20362 6000 20362 6000 li
+node "CON_CV" 0 1314.71 16012 5754 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1454080 9728 0 0
+node "m5_7392_5582#" 0 1546.69 7392 5582 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1748480 11568 0 0
+node "m5_392_5582#" 0 2273.47 392 5582 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1748480 11568 0 0
+node "m3_16840_5002#" 0 138.88 16840 5002 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 25600 640 0 0 0 0 0 0
+node "m3_9840_5002#" 0 138.88 9840 5002 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 25600 640 0 0 0 0 0 0
+node "m3_2840_5002#" 0 138.88 2840 5002 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 25600 640 0 0 0 0 0 0
+node "N1" 4 2972.02 7040 5580 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1033032 12356 0 0 0 0 0 0 0 0
+node "SENS_IN" 13 8404.8 4048 6666 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2940336 35340 0 0 0 0 0 0 0 0
+node "VSS" 21 8510.04 5512 5204 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1891176 35516 0 0 0 0 0 0 0 0 0 0
+node "VDD" 16 7076.41 5626 6424 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1646016 29300 0 0 0 0 0 0 0 0 0 0
+node "N2" 15 479.13 20362 6000 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40768 812 34496 756 34496 756 0 0 0 0 0 0 0 0
+node "li_19462_5802#" 19 4065.01 19462 5802 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 47912 876 31376 720 1460008 17332 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "li_19462_5802#" "CON_CV" 1285.22
+cap "SENS_IN" "m5_392_5582#" 143.264
+cap "VDD" "SENS_IN" 309.941
+cap "N1" "m5_392_5582#" 274.31
+cap "li_19462_5802#" "VSS" 1654.85
+cap "N1" "m5_7392_5582#" 1285.22
+cap "li_19462_5802#" "m5_7392_5582#" 274.31
+cap "SENS_IN" "li_19462_5802#" 174.837
+cap "N2" "VSS" 130.515
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" 113.028
+cap "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 113.028
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 113.028
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 113.028
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" 190.65
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" 190.65
+cap "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" 190.65
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 190.65
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" 190.65
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" 190.65
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 190.65
+cap "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" 190.65
+cap "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_V" "m5_392_5582#" -201.374
+cap "m5_392_5582#" "INVandCAP_v1p1_2/INV_v1p1_0/VIN" 39.48
+cap "m5_392_5582#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/BOT" 375.432
+cap "INVandCAP_v1p1_2/VOUT" "VSS" 55.6256
+cap "INVandCAP_v1p1_2/INV_v1p1_0/VIN" "INVandCAP_v1p1_2/VOUT" 12.534
+cap "N1" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 118.748
+cap "N1" "VSS" 24.3478
+cap "N1" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" 343.572
+cap "INVandCAP_v1p1_2/VSS" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" 383.01
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_B" 118.748
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" "N1" -83.74
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" "m5_7392_5582#" -201.374
+cap "m5_7392_5582#" "N1" -0.0495
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" "VSS" 62.92
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/BOT" "m5_7392_5582#" 375.432
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/BOT" "VSS" 263.6
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/BOT" "INVandCAP_v1p1_1/INV_v1p1_0/VIN" 487.088
+cap "INVandCAP_v1p1_1/INV_v1p1_0/VIN" "VSS" 31.5
+cap "INVandCAP_v1p1_1/INV_v1p1_0/VIN" "m5_7392_5582#" -70.504
+cap "INVandCAP_v1p1_1/VOUT" "INVandCAP_v1p1_1/INV_v1p1_0/VIN" 12.534
+cap "INVandCAP_v1p1_1/VSS" "INVandCAP_v1p1_1/INV_v1p1_0/VIN" 3.50806
+cap "INVandCAP_v1p1_1/VOUT" "INVandCAP_v1p1_1/VSS" 168.21
+cap "INVandCAP_v1p1_1/VSS" "INVandCAP_v1p1_1/VOUT" 24.3478
+cap "INVandCAP_v1p1_1/VOUT" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 118.748
+cap "INVandCAP_v1p1_1/VSS" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" 383.01
+cap "li_19462_5802#" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" 343.572
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_B" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/sky130_fd_pr__cap_mim_m3_2_7PBNAZ_0/m4_n671_n2320#" 118.748
+cap "CON_CV" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" -201.374
+cap "li_19462_5802#" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" -83.74
+cap "li_19462_5802#" "CON_CV" -0.0495
+cap "VSS" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" 62.92
+cap "INVandCAP_v1p1_0/INV_v1p1_0/VIN" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/BOT" 487.088
+cap "INVandCAP_v1p1_0/INV_v1p1_0/VIN" "CON_CV" -70.504
+cap "INVandCAP_v1p1_0/INV_v1p1_0/VIN" "VSS" 31.5
+cap "INVandCAP_v1p1_0/CAPOSC_v1p1_0/BOT" "CON_CV" 375.432
+cap "VSS" "INVandCAP_v1p1_0/CAPOSC_v1p1_0/BOT" 263.6
+cap "INVandCAP_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VIN" 127.674
+cap "CON_CV" "BUFFMIN_v1p1_0/VIN" 12.534
+cap "INVandCAP_v1p1_0/VSS" "BUFFMIN_v1p1_0/VIN" -159.006
+cap "INVandCAP_v1p1_0/VOUT" "CON_CV" 153.411
+cap "INVandCAP_v1p1_0/VOUT" "INVandCAP_v1p1_0/VSS" 52.4722
+cap "CON_CV" "INVandCAP_v1p1_0/VSS" 55.6256
+cap "INVandCAP_v1p1_0/VOUT" "INVandCAP_v1p1_0/VSS" 201.919
+cap "INVandCAP_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VIN" -182.025
+cap "INVandCAP_v1p1_0/VSS" "BUFFMIN_v1p1_0/VIN" -461.15
+cap "INVandCAP_v1p1_2/CAPOSC_v1p1_0/BOT" "m5_392_5582#" 367.668
+cap "m5_392_5582#" "SENS_IN" 31.2468
+cap "m5_392_5582#" "INVandCAP_v1p1_2/INV_v1p1_0/VDD" 0.2016
+cap "VDD" "INVandCAP_v1p1_2/VOUT" 106.342
+cap "INVandCAP_v1p1_2/VOUT" "INVandCAP_v1p1_2/VSS" 108.293
+cap "SENS_IN" "INVandCAP_v1p1_2/VOUT" -286.477
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" "N1" -48
+cap "INVandCAP_v1p1_1/INV_v1p1_0/VDD" "m5_7392_5582#" 0.2016
+cap "INVandCAP_v1p1_1/INV_v1p1_0/VDD" "VDD" 0.8528
+cap "INVandCAP_v1p1_1/INV_v1p1_0/VIN" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/BOT" 226.256
+cap "INVandCAP_v1p1_1/CAPOSC_v1p1_0/BOT" "m5_7392_5582#" 367.668
+cap "INVandCAP_v1p1_1/INV_v1p1_0/VIN" "m5_7392_5582#" -90.5388
+cap "INVandCAP_v1p1_1/VOUT" "INVandCAP_v1p1_1/INV_v1p1_0/VIN" -286.477
+cap "INVandCAP_v1p1_1/VOUT" "INVandCAP_v1p1_1/VDD" 335.284
+cap "INVandCAP_v1p1_1/VSS" "INVandCAP_v1p1_1/VOUT" 108.293
+cap "INVandCAP_v1p1_1/VSS" "INVandCAP_v1p1_1/INV_v1p1_0/VIN" 3.50806
+cap "INVandCAP_v1p1_1/VDD" "INVandCAP_v1p1_1/INV_v1p1_0/VIN" 52.619
+cap "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" "li_19462_5802#" -48
+cap "VDD" "INVandCAP_v1p1_0/INV_v1p1_0/VDD" 0.8528
+cap "CON_CV" "INVandCAP_v1p1_0/INV_v1p1_0/VDD" 0.2016
+cap "INVandCAP_v1p1_0/CAPOSC_v1p1_0/BOT" "CON_CV" 367.668
+cap "INVandCAP_v1p1_0/INV_v1p1_0/VIN" "CON_CV" -90.5388
+cap "INVandCAP_v1p1_0/CAPOSC_v1p1_0/BOT" "INVandCAP_v1p1_0/INV_v1p1_0/VIN" 226.256
+cap "BUFFMIN_v1p1_0/VSS" "INVandCAP_v1p1_0/VOUT" -57.62
+cap "BUFFMIN_v1p1_0/VSS" "CON_CV" 108.293
+cap "BUFFMIN_v1p1_0/VSS" "BUFFMIN_v1p1_0/VDD" -7.10543e-15
+cap "INVandCAP_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VIN" 38.4942
+cap "CON_CV" "BUFFMIN_v1p1_0/VIN" -186.822
+cap "BUFFMIN_v1p1_0/VDD" "BUFFMIN_v1p1_0/VIN" 52.619
+cap "INVandCAP_v1p1_0/VOUT" "CON_CV" 160.507
+cap "INVandCAP_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VDD" 228.942
+cap "BUFFMIN_v1p1_0/VSS" "BUFFMIN_v1p1_0/VIN" 3.50806
+cap "CON_CV" "BUFFMIN_v1p1_0/VDD" 94.3896
+cap "N2" "BUFFMIN_v1p1_0/invmin_magic_v1p1_0/VOUT" 27.5
+cap "INVandCAP_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VSS" 161.523
+cap "N2" "BUFFMIN_v1p1_0/VDD" 11.9048
+cap "INVandCAP_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VIN" -165.544
+cap "BUFFMIN_v1p1_0/invmin_magic_v1p1_0/VOUT" "BUFFMIN_v1p1_0/VSS" 134.152
+cap "BUFFMIN_v1p1_0/VIN" "BUFFMIN_v1p1_0/VSS" 3.19
+cap "N2" "BUFFMIN_v1p1_0/VSS" -4.56
+merge "BUFFMIN_v1p1_0/VSUBS" "INVandCAP_v1p1_0/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+merge "INVandCAP_v1p1_0/VSUBS" "INVandCAP_v1p1_1/VSUBS"
+merge "INVandCAP_v1p1_1/VSUBS" "INVandCAP_v1p1_2/VSUBS"
+merge "INVandCAP_v1p1_2/VSUBS" "VSUBS"
+merge "INVandCAP_v1p1_1/INV_v1p1_0/VIN" "INVandCAP_v1p1_2/VOUT" -2937.04 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -638044 -4168 0 0 0 0 -1090700 -7392 0 0
+merge "INVandCAP_v1p1_2/VOUT" "N1"
+merge "N1" "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_V"
+merge "INVandCAP_v1p1_2/CAPOSC_v1p1_0/TOP_V" "m5_392_5582#"
+merge "INVandCAP_v1p1_0/VDD" "BUFFMIN_v1p1_0/VDD" -4651.24 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1112912 -21304 0 0 0 0 0 0 0 0 0 0
+merge "BUFFMIN_v1p1_0/VDD" "INVandCAP_v1p1_1/VDD"
+merge "INVandCAP_v1p1_1/VDD" "INVandCAP_v1p1_2/VDD"
+merge "INVandCAP_v1p1_2/VDD" "VDD"
+merge "BUFFMIN_v1p1_0/VIN" "INVandCAP_v1p1_0/INV_v1p1_0/VIN" -3225.63 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -49492 -620 0 0 -878844 -6968 0 0 0 0 -1090700 -7392 0 0
+merge "INVandCAP_v1p1_0/INV_v1p1_0/VIN" "INVandCAP_v1p1_1/VOUT"
+merge "INVandCAP_v1p1_1/VOUT" "li_19462_5802#"
+merge "li_19462_5802#" "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V"
+merge "INVandCAP_v1p1_1/CAPOSC_v1p1_0/TOP_V" "m5_7392_5582#"
+merge "BUFFMIN_v1p1_0/VSS" "INVandCAP_v1p1_0/VSS" -4526.83 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1612848 -27484 0 0 0 0 0 0 0 0 0 0
+merge "INVandCAP_v1p1_0/VSS" "INVandCAP_v1p1_1/VSS"
+merge "INVandCAP_v1p1_1/VSS" "INVandCAP_v1p1_2/VSS"
+merge "INVandCAP_v1p1_2/VSS" "VSS"
+merge "INVandCAP_v1p1_1/CAPOSC_v1p1_0/BOT" "m3_9840_5002#" -467.4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4480 -640 0 0 0 0 0 0
+merge "INVandCAP_v1p1_2/CAPOSC_v1p1_0/BOT" "m3_2840_5002#" -162.144 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4480 -640 0 0 0 0 0 0
+merge "BUFFMIN_v1p1_0/VOUT" "N2" -53.085 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31800 -300 0 0 0 0 0 0 0 0 0 0 0 0
+merge "INVandCAP_v1p1_0/CAPOSC_v1p1_0/TOP_V" "CON_CV" -1067.75 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -687360 -5256 0 0
+merge "INVandCAP_v1p1_0/CAPOSC_v1p1_0/BOT" "m3_16840_5002#" -467.4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4480 -640 0 0 0 0 0 0
+merge "INVandCAP_v1p1_0/VOUT" "INVandCAP_v1p1_2/INV_v1p1_0/VIN" -6463.24 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2104620 -26560 0 0 0 0 0 0 0 0
+merge "INVandCAP_v1p1_2/INV_v1p1_0/VIN" "SENS_IN"
diff --git a/mag/PASSGATE_v1p2.ext b/mag/PASSGATE_v1p2.ext
new file mode 100644
index 0000000..06b67e8
--- /dev/null
+++ b/mag/PASSGATE_v1p2.ext
@@ -0,0 +1,52 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use INVMIN_v1p1 INVMIN_v1p1_0 1 0 2576 0 1 192
+parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sky130_fd_pr__pfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+port "CTR" 3 1766 288 1766 288 m1
+port "VOUT" 2 1632 -54 1632 -54 m2
+port "VIN" 1 1508 940 1508 940 m2
+port "VDD" 4 2296 588 2296 588 li
+port "VSS" 5 2206 272 2206 272 li
+node "CTR" 1188 902.374 1766 288 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 25116 1588 0 0 3400 336 49880 1836 0 0 0 0 0 0 0 0 0 0
+node "VOUT" 3701 644.774 1632 -54 m2 0 0 0 0 0 0 0 0 13200 532 39600 1596 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 52088 3200 8712 528 70224 2260 0 0 0 0 0 0 0 0
+node "VIN" 5634 1013.24 1508 940 m2 0 0 0 0 0 0 0 0 24800 1048 51200 2112 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 52040 3424 86176 4708 72352 2264 0 0 0 0 0 0 0 0
+node "a_1548_564#" 3792 1677.01 1548 564 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 84348 5088 0 0 9432 808 106764 3972 0 0 0 0 0 0 0 0 0 0
+node "VDD" 12462 3606.12 2296 588 li 0 0 0 0 580580 3096 0 0 90848 5344 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 106328 5516 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "VSS" 0 0 2206 272 li 303600 2212 0 0 0 0 0 0 0 0 63512 3736 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 148112 4676 0 0 0 0 0 0 0 0 0 0 0 0
+cap "VIN" "VDD" 471.803
+cap "VIN" "a_1548_564#" 317.779
+cap "a_1548_564#" "VDD" 203.101
+cap "CTR" "VIN" 165.197
+cap "CTR" "VDD" 15.6513
+cap "CTR" "a_1548_564#" 193.769
+cap "VOUT" "VIN" 2760.92
+cap "VOUT" "VDD" 505.601
+cap "VOUT" "a_1548_564#" 501.874
+cap "CTR" "VOUT" 247.372
+device msubckt sky130_fd_pr__nfet_01v8 1662 32 1663 33 l=30 w=200 "VSS" "CTR" 60 0 "VOUT" 200 0 "VIN" 200 0
+device msubckt sky130_fd_pr__nfet_01v8 1566 32 1567 33 l=30 w=200 "VSS" "CTR" 60 0 "VIN" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 2046 662 2047 663 l=30 w=200 "VDD" "a_1548_564#" 60 0 "VOUT" 200 0 "VIN" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1950 662 1951 663 l=30 w=200 "VDD" "a_1548_564#" 60 0 "VIN" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1854 662 1855 663 l=30 w=200 "VDD" "a_1548_564#" 60 0 "VOUT" 200 0 "VIN" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1758 662 1759 663 l=30 w=200 "VDD" "a_1548_564#" 60 0 "VIN" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1662 662 1663 663 l=30 w=200 "VDD" "a_1548_564#" 60 0 "VOUT" 200 0 "VIN" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 1566 662 1567 663 l=30 w=200 "VDD" "a_1548_564#" 60 0 "VIN" 200 0 "VOUT" 200 0
+cap "VDD" "VIN" 5.35714
+cap "VDD" "CTR" 8.60333
+cap "VOUT" "VDD" -5.68434e-14
+cap "VDD" "INVMIN_v1p1_0/VOUT" 562.722
+cap "VIN" "VSS" -2.84217e-14
+cap "INVMIN_v1p1_0/VOUT" "CTR" 23.0257
+cap "VDD" "VSS" 5.68434e-14
+cap "VSS" "CTR" 122.785
+cap "INVMIN_v1p1_0/VOUT" "VSS" 767.861
+cap "INVMIN_v1p1_0/VSS" "INVMIN_v1p1_0/VOUT" 51.9231
+merge "INVMIN_v1p1_0/VSS" "VSS" -98.245 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -360 0 0 0 0 0 0 0 0 0 0 0 0
+merge "INVMIN_v1p1_0/VDD" "VDD" -100.225 0 0 0 0 0 -560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -360 0 0 0 0 0 0 0 0 0 0 0 0
+merge "INVMIN_v1p1_0/VIN" "CTR" -49.7229 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1156 -136 0 0 0 0 0 0 0 0 0 0 0 0
+merge "INVMIN_v1p1_0/VOUT" "a_1548_564#" -99.156 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1000 -180 0 0 0 0 0 0 0 0 0 0 0 0
diff --git a/mag/SDC_v2p1.ext b/mag/SDC_v2p1.ext
new file mode 100644
index 0000000..454773b
--- /dev/null
+++ b/mag/SDC_v2p1.ext
@@ -0,0 +1,141 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use OSC_v3p2 OSC_v3p2_1 1 0 1718 0 1 -374
+use OSC_v3p2 OSC_v3p2_0 1 0 1718 0 -1 14404
+use DFF_v4p1 DFF_v4p1_0 0 -1 23156 1 0 6824
+use PASSGATE_v1p2 PASSGATE_v1p2_0 1 0 19368 0 1 6586
+port "REF_IN" 4 20956 5398 20956 5398 m5
+port "SENS_IN" 3 9244 7732 9244 7732 m2
+port "VDD" 1 7808 7968 7808 7968 m1
+port "VSS" 2 7874 9190 7874 9190 m1
+port "DOUT" 5 22458 7288 22458 7288 m2
+node "REF_IN" 0 527.76 20956 5398 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 294400 2480 0 0
+node "m2_22220_5472#" 2 724.175 22220 5472 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 191004 3796 0 0 0 0 0 0 0 0
+node "m2_20998_7046#" 2 1563.4 20998 7046 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 53664 1240 53664 1240 283116 4528 118392 1460 0 0
+node "m2_20790_7562#" 0 58.1391 20790 7562 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10004 408 0 0 0 0 0 0 0 0
+node "SENS_IN" 0 156.152 9244 7732 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27840 704 0 0 0 0 0 0 0 0
+node "m1_22122_6004#" 1 633.617 22122 6004 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 217872 2400 0 0 0 0 0 0 0 0 0 0
+node "m1_22788_7692#" 1 712.532 22788 7692 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5624 300 205120 3148 0 0 0 0 0 0 0 0
+node "m1_22122_7806#" 0 450.756 22122 7806 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143440 1744 0 0 0 0 0 0 0 0 0 0
+node "VDD" 0 59.5284 7808 7968 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4536 276 0 0 0 0 0 0 0 0 0 0
+node "m1_22668_9130#" 4 1225.56 22668 9130 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 201316 5340 0 0 0 0 0 0 0 0 0 0
+node "VSS" 0 65.8638 7874 9190 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5452 304 0 0 0 0 0 0 0 0 0 0
+node "li_21224_6444#" 19 1721.42 21224 6444 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3600 240 182048 4712 120240 3484 0 0 0 0 0 0 0 0
+node "DOUT" 75 923.293 22458 7288 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8160 512 14112 672 121804 3440 0 0 0 0 0 0 0 0
+node "li_20866_7630#" 232 768.98 20866 7630 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 21964 1360 151296 1792 0 0 0 0 0 0 0 0 0 0
+node "w_20734_7666#" 5231 1213.15 20734 7666 nw 0 0 0 0 404384 2956 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "DOUT" "li_21224_6444#" 365.385
+cap "li_21224_6444#" "m1_22122_6004#" 571.486
+cap "m2_20790_7562#" "li_20866_7630#" 72.6152
+cap "DOUT" "m1_22788_7692#" 62.6923
+cap "m1_22122_6004#" "m2_22220_5472#" 237.338
+cap "m2_20998_7046#" "w_20734_7666#" 4.7424
+cap "w_20734_7666#" "li_20866_7630#" 76.7624
+cap "m2_20998_7046#" "li_20866_7630#" 149.448
+cap "li_21224_6444#" "m2_22220_5472#" 112.604
+cap "m1_22122_7806#" "m1_22788_7692#" 277.408
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" 27.6039
+cap "PASSGATE_v1p2_0/VIN" "REF_IN" 30.3571
+cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" 9.4586
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VIN" "REF_IN" 82.6221
+cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 8.13654
+cap "PASSGATE_v1p2_0/VIN" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" 9.4586
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "REF_IN" 11.9526
+cap "PASSGATE_v1p2_0/CTR" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 5.86364
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "REF_IN" -7.10543e-15
+cap "PASSGATE_v1p2_0/VIN" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 4.94092
+cap "PASSGATE_v1p2_0/VOUT" "REF_IN" 21.4286
+cap "OSC_v3p2_1/N2" "PASSGATE_v1p2_0/CTR" 0.471698
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VIN" 0.634518
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VIN" "REF_IN" -807.608
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/CTR" 14.3182
+cap "PASSGATE_v1p2_0/CTR" "PASSGATE_v1p2_0/INVMIN_v1p1_0/VOUT" 5.49419
+cap "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "PASSGATE_v1p2_0/CTR" 14.2863
+cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 0.905797
+cap "REF_IN" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 45.122
+cap "OSC_v3p2_1/N2" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" 46.005
+cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" -228.92
+cap "OSC_v3p2_1/N2" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" 14.7619
+cap "DFF_v4p1_0/CLK" "DFF_v4p1_0/VDD" 126.377
+cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#" "DFF_v4p1_0/VDD" 128.707
+cap "DFF_v4p1_0/CLK" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#" 44.124
+cap "DFF_v4p1_0/CLK" "DOUT" 0.471698
+cap "DFF_v4p1_0/sky130_fd_pr__nfet_01v8_6H9P4D_3/w_n99_n126#" "DFF_v4p1_0/CLK" 2.84217e-14
+cap "DFF_v4p1_0/CLK" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_4/a_15_n136#" 182.817
+cap "DFF_v4p1_0/CLK" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" 112.709
+cap "DFF_v4p1_0/sky130_fd_pr__nfet_01v8_6H9P4D_3/w_n99_n126#" "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_5/a_15_n136#" 57.4743
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/BUFFMIN_v1p1_0/invmin_magic_v1p1_0/VOUT" -42.64
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/SENS_IN" 507.549
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/CTR" 5.86364
+cap "PASSGATE_v1p2_0/a_1548_564#" "PASSGATE_v1p2_0/VOUT" 188.878
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 2.4869e-14
+cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_0/SENS_IN" 860.409
+cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 279.602
+cap "DOUT" "DFF_v4p1_0/CLK" 1.61765
+cap "DOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 388.633
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" -1.7053e-13
+cap "DOUT" "PASSGATE_v1p2_0/INVMIN_v1p1_0/VOUT" 11.1176
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/invmin_magic_v1p1_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 15.3462
+cap "DFF_v4p1_0/IN" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 391.245
+cap "PASSGATE_v1p2_0/VIN" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 56.5233
+cap "PASSGATE_v1p2_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 9.79355
+cap "DFF_v4p1_0/IN" "OSC_v3p2_0/N2" 109.572
+cap "PASSGATE_v1p2_0/INVMIN_v1p1_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 48.4412
+cap "DOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" 29.5312
+cap "OSC_v3p2_0/N2" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 7.38095
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VIN" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 1.95
+cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" "DFF_v4p1_0/GND" 22.3834
+cap "DFF_v4p1_0/ND" "DOUT" 46.1958
+cap "DFF_v4p1_0/VDD" "DFF_v4p1_0/IN" -382.752
+cap "DOUT" "DFF_v4p1_0/IN" 0.260526
+cap "DFF_v4p1_0/VDD" "DOUT" -191.029
+cap "DFF_v4p1_0/IN" "DFF_v4p1_0/CLK" 26.415
+cap "DFF_v4p1_0/IN" "DFF_v4p1_0/GND" 1
+cap "DOUT" "DFF_v4p1_0/CLK" 34.1333
+cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" "DFF_v4p1_0/IN" 11.2396
+cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_n73_n136#" "DOUT" 11.1692
+cap "DFF_v4p1_0/GND" "DFF_v4p1_0/CLK" 48.1213
+cap "DFF_v4p1_0/sky130_fd_pr__pfet_01v8_MA8JHN_1/a_15_n136#" "DFF_v4p1_0/IN" 12
+cap "OSC_v3p2_0/INVandCAP_v1p1_0/VOUT" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 29.4994
+cap "OSC_v3p2_0/INVandCAP_v1p1_0/INV_v1p1_0/VIN" "OSC_v3p2_0/CON_CV" 224.362
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "OSC_v3p2_0/CON_CV" 182.423
+cap "OSC_v3p2_0/INVandCAP_v1p1_0/VOUT" "OSC_v3p2_0/CON_CV" 554.705
+cap "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_0/N2" 231.82
+cap "OSC_v3p2_0/N2" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" 9.28095
+merge "OSC_v3p2_0/INVandCAP_v1p1_0/VSS" "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" -1234.53 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4920 0 -751036 -4188 0 0 0 0 0 0 0 0 0 0
+merge "OSC_v3p2_0/BUFFMIN_v1p1_0/VSS" "OSC_v3p2_0/VSUBS"
+merge "OSC_v3p2_0/VSUBS" "m1_22668_9130#"
+merge "m1_22668_9130#" "DFF_v4p1_0/GND"
+merge "DFF_v4p1_0/GND" "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS"
+merge "OSC_v3p2_1/BUFFMIN_v1p1_0/VSS" "PASSGATE_v1p2_0/VSS"
+merge "PASSGATE_v1p2_0/VSS" "li_21224_6444#"
+merge "li_21224_6444#" "OSC_v3p2_1/VSUBS"
+merge "OSC_v3p2_1/VSUBS" "VSUBS"
+merge "OSC_v3p2_0/VSS" "VSS" -52.7884 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14664 -304 0 0 0 0 0 0 0 0 0 0
+merge "DFF_v4p1_0/VDD" "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" -1783.54 0 0 0 0 -282616 -4008 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1292 -472840 -2084 0 0 0 0 0 0 0 0 0 0
+merge "OSC_v3p2_1/BUFFMIN_v1p1_0/VDD" "m1_22122_6004#"
+merge "m1_22122_6004#" "PASSGATE_v1p2_0/VDD"
+merge "PASSGATE_v1p2_0/VDD" "m1_22122_7806#"
+merge "m1_22122_7806#" "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD"
+merge "OSC_v3p2_0/BUFFMIN_v1p1_0/VDD" "li_20866_7630#"
+merge "li_20866_7630#" "w_20734_7666#"
+merge "OSC_v3p2_0/VDD" "VDD" -57.3444 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1176 -276 0 0 0 0 0 0 0 0 0 0
+merge "DFF_v4p1_0/D" "PASSGATE_v1p2_0/CTR" -36.9156 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -240 0 0 17020 0 0 0 0 0 0 0 0 0
+merge "PASSGATE_v1p2_0/CTR" "DOUT"
+merge "OSC_v3p2_0/CON_CV" "PASSGATE_v1p2_0/VOUT" -1985.99 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 125904 -1096 0 0 95064 0 14752 -1096 0 0
+merge "PASSGATE_v1p2_0/VOUT" "m2_20998_7046#"
+merge "DFF_v4p1_0/IN" "OSC_v3p2_0/N2" -122.957 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -41512 -268 75712 -508 0 0 0 0 0 0 0 0
+merge "OSC_v3p2_0/N2" "m1_22788_7692#"
+merge "OSC_v3p2_0/INVandCAP_v1p1_0/VOUT" "PASSGATE_v1p2_0/VIN" -361.749 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31552 -1084 0 0 0 0 0 0 0 0
+merge "PASSGATE_v1p2_0/VIN" "OSC_v3p2_0/SENS_IN"
+merge "OSC_v3p2_0/SENS_IN" "m2_20790_7562#"
+merge "m2_20790_7562#" "SENS_IN"
+merge "OSC_v3p2_1/CON_CV" "OSC_v3p2_1/INVandCAP_v1p1_0/VOUT" 39.2832 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -160000 -1792 0 0
+merge "OSC_v3p2_1/INVandCAP_v1p1_0/VOUT" "REF_IN"
+merge "DFF_v4p1_0/CLK" "OSC_v3p2_1/N2" -387.29 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -167612 -556 0 0 0 0 0 0 0 0
+merge "OSC_v3p2_1/N2" "m2_22220_5472#"
diff --git a/mag/SDC_v2p1.spice b/mag/SDC_v2p1.spice
new file mode 100644
index 0000000..b1f039a
--- /dev/null
+++ b/mag/SDC_v2p1.spice
@@ -0,0 +1,112 @@
+* NGSPICE file created from SDC_v2p1.ext - technology: sky130A
+
+.subckt INVMIN_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt PASSGATE_v1p2 VIN VOUT CTR VDD VSS
+XINVMIN_v1p1_0 CTR INVMIN_v1p1_0/VOUT VDD VSS INVMIN_v1p1
+X0 VIN CTR VOUT VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT CTR VIN VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X2 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X3 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X4 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X5 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X6 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X7 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt invmin_magic_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt BUFFMIN_v1p1 VIN VOUT VDD VSS
+Xinvmin_magic_v1p1_0 VIN invmin_magic_v1p1_1/VIN VDD VSS invmin_magic_v1p1
+Xinvmin_magic_v1p1_1 invmin_magic_v1p1_1/VIN VOUT VDD VSS invmin_magic_v1p1
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_4SGG6N m4_n2231_n2320# c2_n2131_n2220#
+X0 c2_n2131_n2220# m4_n2231_n2320# sky130_fd_pr__cap_mim_m3_2 l=2.22e+07u w=1.88e+07u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_7PBNAZ m4_n671_n2320# c2_n571_n2220#
+X0 c2_n571_n2220# m4_n671_n2320# sky130_fd_pr__cap_mim_m3_2 l=2.22e+07u w=3.2e+06u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_1_9K4XRG m3_n456_n2320# c1_n356_n2220#
+X0 c1_n356_n2220# m3_n456_n2320# sky130_fd_pr__cap_mim_m3_1 l=2.22e+07u w=3.2e+06u
+.ends
+
+.subckt CAPOSC_v1p1 BOT TOP_V TOP_B
+Xsky130_fd_pr__cap_mim_m3_2_4SGG6N_0 BOT TOP_B sky130_fd_pr__cap_mim_m3_2_4SGG6N
+Xsky130_fd_pr__cap_mim_m3_2_7PBNAZ_0 BOT TOP_V sky130_fd_pr__cap_mim_m3_2_7PBNAZ
+Xsky130_fd_pr__cap_mim_m3_1_9K4XRG_0 BOT TOP_V sky130_fd_pr__cap_mim_m3_1_9K4XRG
+X0 TOP_B BOT sky130_fd_pr__cap_mim_m3_1 l=2.22e+07u w=1.88e+07u
+.ends
+
+.subckt INV_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X2 VSS VIN VOUT VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X3 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X4 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X5 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X6 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X7 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt INVandCAP_v1p1 VOUT VDD VSS INV_v1p1_0/VIN CAPOSC_v1p1_0/TOP_V
+XCAPOSC_v1p1_0 VSS CAPOSC_v1p1_0/TOP_V VOUT CAPOSC_v1p1
+XINV_v1p1_0 INV_v1p1_0/VIN VOUT VDD VSS INV_v1p1
+.ends
+
+.subckt OSC_v3p2 VDD VSS SENS_IN N1 CON_CV N2
+XBUFFMIN_v1p1_0 BUFFMIN_v1p1_0/VIN N2 VDD VSS BUFFMIN_v1p1
+XINVandCAP_v1p1_0 SENS_IN VDD VSS BUFFMIN_v1p1_0/VIN CON_CV INVandCAP_v1p1
+XINVandCAP_v1p1_1 BUFFMIN_v1p1_0/VIN VDD VSS N1 BUFFMIN_v1p1_0/VIN INVandCAP_v1p1
+XINVandCAP_v1p1_2 N1 VDD VSS SENS_IN N1 INVandCAP_v1p1
+.ends
+
+.subckt sky130_fd_pr__pfet_01v8_MA8JHN a_15_n136# a_n33_95# a_n73_n136# w_n109_n198#
+X0 a_15_n136# a_n33_95# a_n73_n136# w_n109_n198# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt sky130_fd_pr__nfet_01v8_59MFY5 a_n73_n69# a_n33_n157# a_15_n69#
+X0 a_15_n69# a_n33_n157# a_n73_n69# w_n99_n95# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt sky130_fd_pr__nfet_01v8_6H9P4D a_n73_n100# a_15_n100# a_n15_n126#
+X0 a_15_n100# a_n15_n126# a_n73_n100# w_n99_n126# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt DFF_v4p1 VDD GND CLK IN ND D
+Xsky130_fd_pr__pfet_01v8_MA8JHN_0 VDD IN m1_776_62# VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_1 m1_776_62# CLK m1_476_n356# VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_2 D ND VDD VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_3 VDD D ND VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_5 m1_n564_n40# CLK sky130_fd_pr__pfet_01v8_MA8JHN_5/a_n73_n136#
++ VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_4 sky130_fd_pr__pfet_01v8_MA8JHN_4/a_15_n136# sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#
++ sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n73_n136# sky130_fd_pr__pfet_01v8_MA8JHN_4/w_n109_n198#
++ sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__nfet_01v8_59MFY5_0 m1_576_n268# CLK GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_59MFY5_1 D m1_476_n356# m1_576_n268# sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_0 GND m1_476_n356# IN sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_59MFY5_2 m1_n224_n268# m1_n564_n40# ND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_1 GND D ND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_59MFY5_3 sky130_fd_pr__nfet_01v8_59MFY5_3/a_n73_n69# CLK
++ m1_n224_n268# sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_2 ND GND D sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_6H9P4D_3 sky130_fd_pr__nfet_01v8_6H9P4D_3/a_n73_n100# sky130_fd_pr__nfet_01v8_6H9P4D_3/a_15_n100#
++ sky130_fd_pr__nfet_01v8_6H9P4D_3/a_n15_n126# sky130_fd_pr__nfet_01v8_6H9P4D
+.ends
+
+.subckt SDC_v2p1 VDD VSS SENS_IN REF_IN DOUT
+XPASSGATE_v1p2_0 SENS_IN OSC_v3p2_0/CON_CV DOUT VDD VSS PASSGATE_v1p2
+XOSC_v3p2_0 VDD VSS SENS_IN OSC_v3p2_0/N1 OSC_v3p2_0/CON_CV OSC_v3p2_0/N2 OSC_v3p2
+XOSC_v3p2_1 VDD VSS REF_IN OSC_v3p2_1/N1 REF_IN OSC_v3p2_1/N2 OSC_v3p2
+XDFF_v4p1_0 VDD VSS OSC_v3p2_1/N2 OSC_v3p2_0/N2 DFF_v4p1_0/ND DOUT DFF_v4p1
+.ends
+
diff --git a/mag/invmin_magic_v1p1.ext b/mag/invmin_magic_v1p1.ext
new file mode 100644
index 0000000..5e692c4
--- /dev/null
+++ b/mag/invmin_magic_v1p1.ext
@@ -0,0 +1,21 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+parameters sky130_fd_pr__pfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+port "VOUT" 2 170 -80 170 -80 li
+port "VIN" 1 -300 -80 -300 -80 li
+port "VDD" 3 -300 390 -300 390 m1
+port "VSS" 4 -300 80 -300 80 m1
+node "VOUT" 653 469.14 170 -80 li 0 0 0 0 0 0 0 0 24000 640 24000 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 49500 1560 0 0 0 0 0 0 0 0 0 0 0 0
+node "VIN" 1029 672.152 -300 -80 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27100 1540 0 0 20500 820 0 0 0 0 0 0 0 0 0 0 0 0
+node "VDD" 3397 709.688 -300 390 m1 0 0 0 0 131600 1500 0 0 24000 640 24000 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 39600 800 84600 1300 0 0 0 0 0 0 0 0 0 0
+substrate "VSS" 0 0 -300 80 m1 111384 1388 0 0 0 0 0 0 24000 640 24000 640 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 39600 800 84600 1300 0 0 0 0 0 0 0 0 0 0
+cap "VIN" "VOUT" 27.5
+cap "VDD" "VIN" 40.9179
+cap "VDD" "VOUT" 301.24
+device msubckt sky130_fd_pr__nfet_01v8 -20 -20 -19 -19 l=30 w=200 "VSS" "VIN" 60 0 "VSS" 200 0 "VOUT" 200 0
+device msubckt sky130_fd_pr__pfet_01v8 -20 290 -19 291 l=30 w=200 "VDD" "VIN" 60 0 "VDD" 200 0 "VOUT" 200 0
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_9K4XRG.ext b/mag/sky130_fd_pr__cap_mim_m3_1_9K4XRG.ext
new file mode 100644
index 0000000..fe72f0f
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_9K4XRG.ext
@@ -0,0 +1,12 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_1 w=w l=l
+node "c1_n356_n2220#" 3 0 -356 -2220 mim 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 287892 8856 0 0 0 0
+node "m3_n456_n2320#" 2 3545.82 -456 -2320 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4231680 11104 443136 9424 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "m3_n456_n2320#" "c1_n356_n2220#" 4562.53
+device csubckt sky130_fd_pr__cap_mim_m3_1 -356 -2220 -355 -2219 w=640 l=4440 "None" "c1_n356_n2220#" 8736 0 "m3_n456_n2320#" 200 0
diff --git a/mag/sky130_fd_pr__cap_mim_m3_2_4SGG6N.ext b/mag/sky130_fd_pr__cap_mim_m3_2_4SGG6N.ext
new file mode 100644
index 0000000..7bf7535
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_2_4SGG6N.ext
@@ -0,0 +1,12 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n2131_n2220#" 0 0 -2131 -2220 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16433024 16272 0 0
+node "m4_n2231_n2320#" 0 8554.26 -2231 -2320 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20703680 18204 1485440 9924 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "m4_n2231_n2320#" "c2_n2131_n2220#" 36438.4
+device csubckt sky130_fd_pr__cap_mim_m3_2 -2131 -2220 -2130 -2219 w=3760 l=4440 "None" "c2_n2131_n2220#" 15024 0 "m4_n2231_n2320#" 200 0
diff --git a/mag/sky130_fd_pr__cap_mim_m3_2_7PBNAZ.ext b/mag/sky130_fd_pr__cap_mim_m3_2_7PBNAZ.ext
new file mode 100644
index 0000000..cb9afcc
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_2_7PBNAZ.ext
@@ -0,0 +1,12 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__cap_mim_m3_2 w=w l=l
+node "c2_n571_n2220#" 0 0 -571 -2220 mim2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2680064 10032 0 0
+node "m4_n671_n2320#" 1 4504.5 -671 -2320 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6226880 11964 1485440 9924 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "m4_n671_n2320#" "c2_n571_n2220#" 10468.8
+device csubckt sky130_fd_pr__cap_mim_m3_2 -571 -2220 -570 -2219 w=640 l=4440 "None" "c2_n571_n2220#" 9264 0 "m4_n671_n2320#" 200 0
diff --git a/mag/sky130_fd_pr__nfet_01v8_59MFY5.ext b/mag/sky130_fd_pr__nfet_01v8_59MFY5.ext
new file mode 100644
index 0000000..2ec3d34
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_01v8_59MFY5.ext
@@ -0,0 +1,15 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+node "a_15_n69#" 489 28.2716 15 -69 ndif 0 0 0 0 0 0 0 0 11600 516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7072 484 9200 492 0 0 0 0 0 0 0 0 0 0
+node "a_n73_n69#" 489 28.2716 -73 -69 ndif 0 0 0 0 0 0 0 0 11600 516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7072 484 9200 492 0 0 0 0 0 0 0 0 0 0
+node "a_n33_n157#" 513 119.119 -33 -157 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11796 760 0 0 2244 200 2668 208 0 0 0 0 0 0 0 0 0 0
+substrate "w_n99_n95#" 0 0 -99 -95 pw 49896 900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "a_n33_n157#" "a_n73_n69#" 17.0735
+cap "a_n73_n69#" "a_15_n69#" 341.397
+cap "a_n33_n157#" "a_15_n69#" 17.0735
+device msubckt sky130_fd_pr__nfet_01v8 -15 -69 -14 -68 l=30 w=200 "w_n99_n95#" "a_n33_n157#" 60 0 "a_n73_n69#" 200 0 "a_15_n69#" 200 0
diff --git a/mag/sky130_fd_pr__nfet_01v8_6H9P4D.ext b/mag/sky130_fd_pr__nfet_01v8_6H9P4D.ext
new file mode 100644
index 0000000..6f68548
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_01v8_6H9P4D.ext
@@ -0,0 +1,13 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__nfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+node "a_15_n100#" 489 28.2716 15 -100 ndif 0 0 0 0 0 0 0 0 11600 516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7072 484 9200 492 0 0 0 0 0 0 0 0 0 0
+node "a_n73_n100#" 489 28.2716 -73 -100 ndif 0 0 0 0 0 0 0 0 11600 516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7072 484 9200 492 0 0 0 0 0 0 0 0 0 0
+node "a_n15_n126#" 405 49.234 -15 -126 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7560 564 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "w_n99_n126#" 0 0 -99 -126 pw 49896 900 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "a_n73_n100#" "a_15_n100#" 341.397
+device msubckt sky130_fd_pr__nfet_01v8 -15 -100 -14 -99 l=30 w=200 "w_n99_n126#" "a_n15_n126#" 60 0 "a_n73_n100#" 200 0 "a_15_n100#" 200 0
diff --git a/mag/sky130_fd_pr__pfet_01v8_MA8JHN.ext b/mag/sky130_fd_pr__pfet_01v8_MA8JHN.ext
new file mode 100644
index 0000000..edd5c4a
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_01v8_MA8JHN.ext
@@ -0,0 +1,18 @@
+timestamp 1641609411
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+parameters sky130_fd_pr__pfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
+node "a_15_n136#" 754 28.02 15 -136 pdif 0 0 0 0 0 0 0 0 0 0 11600 516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7072 484 9200 492 0 0 0 0 0 0 0 0 0 0
+node "a_n73_n136#" 754 28.02 -73 -136 pdif 0 0 0 0 0 0 0 0 0 0 11600 516 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7072 484 9200 492 0 0 0 0 0 0 0 0 0 0
+node "a_n33_95#" 527 124.785 -33 95 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12066 778 0 0 2244 200 2668 208 0 0 0 0 0 0 0 0 0 0
+node "w_n109_n198#" 2823 236.748 -109 -198 nw 0 0 0 0 78916 1160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "a_15_n136#" "a_n33_95#" 13.3851
+cap "a_n33_95#" "a_n73_n136#" 13.3851
+cap "a_15_n136#" "w_n109_n198#" 0.2516
+cap "a_15_n136#" "a_n73_n136#" 341.397
+cap "w_n109_n198#" "a_n73_n136#" 0.2516
+device msubckt sky130_fd_pr__pfet_01v8 -15 -136 -14 -135 l=30 w=200 "w_n109_n198#" "a_n33_95#" 60 0 "a_n73_n136#" 200 0 "a_15_n136#" 200 0
diff --git a/mag/user_analog_project_wrapper.ext b/mag/user_analog_project_wrapper.ext
new file mode 100644
index 0000000..c04499f
--- /dev/null
+++ b/mag/user_analog_project_wrapper.ext
@@ -0,0 +1,1426 @@
+timestamp 1641611256
+version 8.3
+tech sky130A
+style ngspice()
+scale 1000 1 500000
+resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
+use SDC_v2p1 SDC_v2p1_0 -1 0 579878 0 1 684648
+port "io_analog[4]" 42 329294 702300 334294 704800 m5
+port "io_analog[4]" 42 318994 702300 323994 704800 m5
+port "io_analog[5]" 43 227594 702300 232594 704800 m5
+port "io_analog[5]" 43 217294 702300 222294 704800 m5
+port "io_analog[6]" 44 175894 702300 180894 704800 m5
+port "io_analog[6]" 44 165594 702300 170594 704800 m5
+port "io_analog[4]" 42 329294 702300 334294 704800 m4
+port "io_analog[4]" 42 318994 702300 323994 704800 m4
+port "io_analog[5]" 43 227594 702300 232594 704800 m4
+port "io_analog[5]" 43 217294 702300 222294 704800 m4
+port "io_analog[6]" 44 175894 702300 180894 704800 m4
+port "io_analog[6]" 44 165594 702300 170594 704800 m4
+port "io_in_3v3[0]" 81 583520 1544 584800 1656 m3
+port "io_oeb[26]" 126 -800 1544 480 1656 m3
+port "io_in[0]" 54 583520 2726 584800 2838 m3
+port "io_out[26]" 153 -800 2726 480 2838 m3
+port "io_out[0]" 135 583520 3908 584800 4020 m3
+port "io_in[26]" 72 -800 3908 480 4020 m3
+port "io_oeb[0]" 108 583520 5090 584800 5202 m3
+port "io_in_3v3[26]" 99 -800 5090 480 5202 m3
+port "io_in_3v3[1]" 92 583520 6272 584800 6384 m3
+port "io_oeb[25]" 125 -800 6272 480 6384 m3
+port "io_in[1]" 65 583520 7454 584800 7566 m3
+port "io_out[25]" 152 -800 7454 480 7566 m3
+port "io_out[1]" 146 583520 8636 584800 8748 m3
+port "io_in[25]" 71 -800 8636 480 8748 m3
+port "io_oeb[1]" 119 583520 9818 584800 9930 m3
+port "io_in_3v3[25]" 98 -800 9818 480 9930 m3
+port "io_in_3v3[2]" 100 583520 11000 584800 11112 m3
+port "io_oeb[24]" 124 -800 11000 480 11112 m3
+port "io_in[2]" 73 583520 12182 584800 12294 m3
+port "io_out[24]" 151 -800 12182 480 12294 m3
+port "io_out[2]" 154 583520 13364 584800 13476 m3
+port "io_in[24]" 70 -800 13364 480 13476 m3
+port "io_oeb[2]" 127 583520 14546 584800 14658 m3
+port "io_in_3v3[24]" 97 -800 14546 480 14658 m3
+port "io_in_3v3[3]" 101 583520 15728 584800 15840 m3
+port "gpio_noesd[17]" 27 -800 15728 480 15840 m3
+port "io_in[3]" 74 583520 16910 584800 17022 m3
+port "gpio_analog[17]" 9 -800 16910 480 17022 m3
+port "io_out[3]" 155 583520 18092 584800 18204 m3
+port "io_oeb[3]" 128 583520 19274 584800 19386 m3
+port "io_in_3v3[4]" 102 583520 20456 584800 20568 m3
+port "io_in[4]" 75 583520 21638 584800 21750 m3
+port "io_out[4]" 156 583520 22820 584800 22932 m3
+port "io_oeb[4]" 129 583520 24002 584800 24114 m3
+port "io_oeb[23]" 123 -800 32422 480 32534 m3
+port "io_out[23]" 150 -800 33604 480 33716 m3
+port "io_in[23]" 69 -800 34786 480 34898 m3
+port "io_in_3v3[23]" 96 -800 35968 480 36080 m3
+port "gpio_noesd[16]" 26 -800 37150 480 37262 m3
+port "gpio_analog[16]" 8 -800 38332 480 38444 m3
+port "io_in_3v3[5]" 103 583520 46914 584800 47026 m3
+port "io_in[5]" 76 583520 48096 584800 48208 m3
+port "io_out[5]" 157 583520 49278 584800 49390 m3
+port "io_oeb[5]" 130 583520 50460 584800 50572 m3
+port "io_oeb[22]" 122 -800 75644 480 75756 m3
+port "io_out[22]" 149 -800 76826 480 76938 m3
+port "io_in[22]" 68 -800 78008 480 78120 m3
+port "io_in_3v3[22]" 95 -800 79190 480 79302 m3
+port "gpio_noesd[15]" 25 -800 80372 480 80484 m3
+port "gpio_analog[15]" 7 -800 81554 480 81666 m3
+port "io_in_3v3[6]" 104 583520 91572 584800 91684 m3
+port "io_in[6]" 77 583520 92754 584800 92866 m3
+port "io_out[6]" 158 583520 93936 584800 94048 m3
+port "io_oeb[6]" 131 583520 95118 584800 95230 m3
+port "io_oeb[21]" 121 -800 118866 480 118978 m3
+port "io_out[21]" 148 -800 120048 480 120160 m3
+port "io_in[21]" 67 -800 121230 480 121342 m3
+port "io_in_3v3[21]" 94 -800 122412 480 122524 m3
+port "gpio_noesd[14]" 24 -800 123594 480 123706 m3
+port "gpio_analog[14]" 6 -800 124776 480 124888 m3
+port "vssa1" 554 582340 136830 584800 141630 m3
+port "vssa1" 554 582340 146830 584800 151630 m3
+port "vssd2" 557 0 162888 1660 167688 m3
+port "vssd2" 557 0 172888 1660 177688 m3
+port "vssd1" 556 582340 181430 584800 186230 m3
+port "vssd1" 556 582340 191430 584800 196230 m3
+port "vdda2" 553 0 204888 1660 209688 m3
+port "vdda2" 553 0 214888 1660 219688 m3
+port "vdda1" 552 582340 225230 584800 230030 m3
+port "vdda1" 552 582340 235230 584800 240030 m3
+port "io_oeb[20]" 120 -800 246488 480 246600 m3
+port "io_out[20]" 147 -800 247670 480 247782 m3
+port "io_in[20]" 66 -800 248852 480 248964 m3
+port "io_in_3v3[20]" 93 -800 250034 480 250146 m3
+port "gpio_noesd[13]" 23 -800 251216 480 251328 m3
+port "gpio_analog[13]" 5 -800 252398 480 252510 m3
+port "gpio_analog[0]" 1 583520 269230 584800 269342 m3
+port "gpio_noesd[0]" 19 583520 270412 584800 270524 m3
+port "io_in_3v3[7]" 105 583520 271594 584800 271706 m3
+port "io_in[7]" 78 583520 272776 584800 272888 m3
+port "io_out[7]" 159 583520 273958 584800 274070 m3
+port "io_oeb[7]" 132 583520 275140 584800 275252 m3
+port "io_oeb[19]" 118 -800 289510 480 289622 m3
+port "io_out[19]" 145 -800 290692 480 290804 m3
+port "io_in[19]" 64 -800 291874 480 291986 m3
+port "io_in_3v3[19]" 91 -800 293056 480 293168 m3
+port "gpio_noesd[12]" 22 -800 294238 480 294350 m3
+port "gpio_analog[12]" 4 -800 295420 480 295532 m3
+port "gpio_analog[1]" 10 583520 313652 584800 313764 m3
+port "gpio_noesd[1]" 28 583520 314834 584800 314946 m3
+port "io_in_3v3[8]" 106 583520 316016 584800 316128 m3
+port "io_in[8]" 79 583520 317198 584800 317310 m3
+port "io_out[8]" 160 583520 318380 584800 318492 m3
+port "io_oeb[8]" 133 583520 319562 584800 319674 m3
+port "io_oeb[18]" 117 -800 332732 480 332844 m3
+port "io_out[18]" 144 -800 333914 480 334026 m3
+port "io_in[18]" 63 -800 335096 480 335208 m3
+port "io_in_3v3[18]" 90 -800 336278 480 336390 m3
+port "gpio_noesd[11]" 21 -800 337460 480 337572 m3
+port "gpio_analog[11]" 3 -800 338642 480 338754 m3
+port "gpio_analog[2]" 11 583520 358874 584800 358986 m3
+port "gpio_noesd[2]" 29 583520 360056 584800 360168 m3
+port "io_in_3v3[9]" 107 583520 361238 584800 361350 m3
+port "io_in[9]" 80 583520 362420 584800 362532 m3
+port "io_out[9]" 161 583520 363602 584800 363714 m3
+port "io_oeb[9]" 134 583520 364784 584800 364896 m3
+port "io_oeb[17]" 116 -800 375954 480 376066 m3
+port "io_out[17]" 143 -800 377136 480 377248 m3
+port "io_in[17]" 62 -800 378318 480 378430 m3
+port "io_in_3v3[17]" 89 -800 379500 480 379612 m3
+port "gpio_noesd[10]" 20 -800 380682 480 380794 m3
+port "gpio_analog[10]" 2 -800 381864 480 381976 m3
+port "gpio_analog[3]" 12 583520 405296 584800 405408 m3
+port "gpio_noesd[3]" 30 583520 406478 584800 406590 m3
+port "io_in_3v3[10]" 82 583520 407660 584800 407772 m3
+port "io_in[10]" 55 583520 408842 584800 408954 m3
+port "io_out[10]" 136 583520 410024 584800 410136 m3
+port "io_oeb[10]" 109 583520 411206 584800 411318 m3
+port "io_oeb[16]" 115 -800 419176 480 419288 m3
+port "io_out[16]" 142 -800 420358 480 420470 m3
+port "io_in[16]" 61 -800 421540 480 421652 m3
+port "io_in_3v3[16]" 88 -800 422722 480 422834 m3
+port "gpio_noesd[9]" 36 -800 423904 480 424016 m3
+port "gpio_analog[9]" 18 -800 425086 480 425198 m3
+port "gpio_analog[4]" 13 583520 449718 584800 449830 m3
+port "gpio_noesd[4]" 31 583520 450900 584800 451012 m3
+port "io_in_3v3[11]" 83 583520 452082 584800 452194 m3
+port "io_in[11]" 56 583520 453264 584800 453376 m3
+port "io_out[11]" 137 583520 454446 584800 454558 m3
+port "io_oeb[11]" 110 583520 455628 584800 455740 m3
+port "io_oeb[15]" 114 -800 462398 480 462510 m3
+port "io_out[15]" 141 -800 463580 480 463692 m3
+port "io_in[15]" 60 -800 464762 480 464874 m3
+port "io_in_3v3[15]" 87 -800 465944 480 466056 m3
+port "gpio_noesd[8]" 35 -800 467126 480 467238 m3
+port "gpio_analog[8]" 17 -800 468308 480 468420 m3
+port "gpio_analog[5]" 14 583520 494140 584800 494252 m3
+port "gpio_noesd[5]" 32 583520 495322 584800 495434 m3
+port "io_in_3v3[12]" 84 583520 496504 584800 496616 m3
+port "io_in[12]" 57 583520 497686 584800 497798 m3
+port "io_out[12]" 138 583520 498868 584800 498980 m3
+port "io_oeb[12]" 111 583520 500050 584800 500162 m3
+port "io_oeb[14]" 113 -800 505620 480 505732 m3
+port "io_out[14]" 140 -800 506802 480 506914 m3
+port "io_in[14]" 59 -800 507984 480 508096 m3
+port "io_in_3v3[14]" 86 -800 509166 480 509278 m3
+port "gpio_noesd[7]" 34 -800 510348 480 510460 m3
+port "gpio_analog[7]" 16 -800 511530 480 511642 m3
+port "vdda1" 552 582340 540562 584800 545362 m3
+port "vdda1" 552 582340 550562 584800 555362 m3
+port "vssa2" 555 0 549442 1660 554242 m3
+port "vssa2" 555 0 559442 1660 564242 m3
+port "gpio_analog[6]" 15 583520 583562 584800 583674 m3
+port "gpio_noesd[6]" 33 583520 584744 584800 584856 m3
+port "io_in_3v3[13]" 85 583520 585926 584800 586038 m3
+port "io_in[13]" 58 583520 587108 584800 587220 m3
+port "io_out[13]" 139 583520 588290 584800 588402 m3
+port "io_oeb[13]" 112 583520 589472 584800 589584 m3
+port "vccd1" 550 582340 629784 584800 634584 m3
+port "vccd2" 551 0 633842 1660 638642 m3
+port "vccd2" 551 0 643842 1660 648642 m3
+port "io_analog[10]" 38 0 680242 1700 685242 m3
+port "vssa1" 554 510594 702340 515394 704800 m3
+port "io_analog[3]" 41 413394 702300 418394 704800 m3
+port "io_analog[4]" 42 329294 702300 334294 704800 m3
+port "io_clamp_high[0]" 48 326794 702300 328994 704800 m3
+port "io_clamp_low[0]" 51 324294 702300 326494 704800 m3
+port "io_analog[4]" 42 318994 702300 323994 704800 m3
+port "io_analog[5]" 43 227594 702300 232594 704800 m3
+port "io_clamp_high[1]" 49 225094 702300 227294 704800 m3
+port "io_clamp_low[1]" 52 222594 702300 224794 704800 m3
+port "io_analog[5]" 43 217294 702300 222294 704800 m3
+port "io_analog[6]" 44 175894 702300 180894 704800 m3
+port "io_clamp_high[2]" 50 173394 702300 175594 704800 m3
+port "io_clamp_low[2]" 53 170894 702300 173094 704800 m3
+port "io_analog[6]" 44 165594 702300 170594 704800 m3
+port "io_analog[7]" 45 120194 702300 125194 704800 m3
+port "io_analog[8]" 46 68194 702300 73194 704800 m3
+port "io_analog[9]" 47 16194 702300 21194 704800 m3
+port "user_irq[2]" 549 583250 -800 583362 480 m2
+port "user_irq[1]" 548 582068 -800 582180 480 m2
+port "user_irq[0]" 547 580886 -800 580998 480 m2
+port "user_clock2" 546 579704 -800 579816 480 m2
+port "la_oenb[127]" 448 578522 -800 578634 480 m2
+port "la_data_out[127]" 320 577340 -800 577452 480 m2
+port "la_data_in[127]" 192 576158 -800 576270 480 m2
+port "la_oenb[126]" 447 574976 -800 575088 480 m2
+port "la_data_out[126]" 319 573794 -800 573906 480 m2
+port "la_data_in[126]" 191 572612 -800 572724 480 m2
+port "la_oenb[125]" 446 571430 -800 571542 480 m2
+port "la_data_out[125]" 318 570248 -800 570360 480 m2
+port "la_data_in[125]" 190 569066 -800 569178 480 m2
+port "la_oenb[124]" 445 567884 -800 567996 480 m2
+port "la_data_out[124]" 317 566702 -800 566814 480 m2
+port "la_data_in[124]" 189 565520 -800 565632 480 m2
+port "la_oenb[123]" 444 564338 -800 564450 480 m2
+port "la_data_out[123]" 316 563156 -800 563268 480 m2
+port "la_data_in[123]" 188 561974 -800 562086 480 m2
+port "la_oenb[122]" 443 560792 -800 560904 480 m2
+port "la_data_out[122]" 315 559610 -800 559722 480 m2
+port "la_data_in[122]" 187 558428 -800 558540 480 m2
+port "la_oenb[121]" 442 557246 -800 557358 480 m2
+port "la_data_out[121]" 314 556064 -800 556176 480 m2
+port "la_data_in[121]" 186 554882 -800 554994 480 m2
+port "la_oenb[120]" 441 553700 -800 553812 480 m2
+port "la_data_out[120]" 313 552518 -800 552630 480 m2
+port "la_data_in[120]" 185 551336 -800 551448 480 m2
+port "la_oenb[119]" 439 550154 -800 550266 480 m2
+port "la_data_out[119]" 311 548972 -800 549084 480 m2
+port "la_data_in[119]" 183 547790 -800 547902 480 m2
+port "la_oenb[118]" 438 546608 -800 546720 480 m2
+port "la_data_out[118]" 310 545426 -800 545538 480 m2
+port "la_data_in[118]" 182 544244 -800 544356 480 m2
+port "la_oenb[117]" 437 543062 -800 543174 480 m2
+port "la_data_out[117]" 309 541880 -800 541992 480 m2
+port "la_data_in[117]" 181 540698 -800 540810 480 m2
+port "la_oenb[116]" 436 539516 -800 539628 480 m2
+port "la_data_out[116]" 308 538334 -800 538446 480 m2
+port "la_data_in[116]" 180 537152 -800 537264 480 m2
+port "la_oenb[115]" 435 535970 -800 536082 480 m2
+port "la_data_out[115]" 307 534788 -800 534900 480 m2
+port "la_data_in[115]" 179 533606 -800 533718 480 m2
+port "la_oenb[114]" 434 532424 -800 532536 480 m2
+port "la_data_out[114]" 306 531242 -800 531354 480 m2
+port "la_data_in[114]" 178 530060 -800 530172 480 m2
+port "la_oenb[113]" 433 528878 -800 528990 480 m2
+port "la_data_out[113]" 305 527696 -800 527808 480 m2
+port "la_data_in[113]" 177 526514 -800 526626 480 m2
+port "la_oenb[112]" 432 525332 -800 525444 480 m2
+port "la_data_out[112]" 304 524150 -800 524262 480 m2
+port "la_data_in[112]" 176 522968 -800 523080 480 m2
+port "la_oenb[111]" 431 521786 -800 521898 480 m2
+port "la_data_out[111]" 303 520604 -800 520716 480 m2
+port "la_data_in[111]" 175 519422 -800 519534 480 m2
+port "la_oenb[110]" 430 518240 -800 518352 480 m2
+port "la_data_out[110]" 302 517058 -800 517170 480 m2
+port "la_data_in[110]" 174 515876 -800 515988 480 m2
+port "la_oenb[109]" 428 514694 -800 514806 480 m2
+port "la_data_out[109]" 300 513512 -800 513624 480 m2
+port "la_data_in[109]" 172 512330 -800 512442 480 m2
+port "la_oenb[108]" 427 511148 -800 511260 480 m2
+port "la_data_out[108]" 299 509966 -800 510078 480 m2
+port "la_data_in[108]" 171 508784 -800 508896 480 m2
+port "la_oenb[107]" 426 507602 -800 507714 480 m2
+port "la_data_out[107]" 298 506420 -800 506532 480 m2
+port "la_data_in[107]" 170 505238 -800 505350 480 m2
+port "la_oenb[106]" 425 504056 -800 504168 480 m2
+port "la_data_out[106]" 297 502874 -800 502986 480 m2
+port "la_data_in[106]" 169 501692 -800 501804 480 m2
+port "la_oenb[105]" 424 500510 -800 500622 480 m2
+port "la_data_out[105]" 296 499328 -800 499440 480 m2
+port "la_data_in[105]" 168 498146 -800 498258 480 m2
+port "la_oenb[104]" 423 496964 -800 497076 480 m2
+port "la_data_out[104]" 295 495782 -800 495894 480 m2
+port "la_data_in[104]" 167 494600 -800 494712 480 m2
+port "la_oenb[103]" 422 493418 -800 493530 480 m2
+port "la_data_out[103]" 294 492236 -800 492348 480 m2
+port "la_data_in[103]" 166 491054 -800 491166 480 m2
+port "la_oenb[102]" 421 489872 -800 489984 480 m2
+port "la_data_out[102]" 293 488690 -800 488802 480 m2
+port "la_data_in[102]" 165 487508 -800 487620 480 m2
+port "la_oenb[101]" 420 486326 -800 486438 480 m2
+port "la_data_out[101]" 292 485144 -800 485256 480 m2
+port "la_data_in[101]" 164 483962 -800 484074 480 m2
+port "la_oenb[100]" 419 482780 -800 482892 480 m2
+port "la_data_out[100]" 291 481598 -800 481710 480 m2
+port "la_data_in[100]" 163 480416 -800 480528 480 m2
+port "la_oenb[99]" 544 479234 -800 479346 480 m2
+port "la_data_out[99]" 416 478052 -800 478164 480 m2
+port "la_data_in[99]" 288 476870 -800 476982 480 m2
+port "la_oenb[98]" 543 475688 -800 475800 480 m2
+port "la_data_out[98]" 415 474506 -800 474618 480 m2
+port "la_data_in[98]" 287 473324 -800 473436 480 m2
+port "la_oenb[97]" 542 472142 -800 472254 480 m2
+port "la_data_out[97]" 414 470960 -800 471072 480 m2
+port "la_data_in[97]" 286 469778 -800 469890 480 m2
+port "la_oenb[96]" 541 468596 -800 468708 480 m2
+port "la_data_out[96]" 413 467414 -800 467526 480 m2
+port "la_data_in[96]" 285 466232 -800 466344 480 m2
+port "la_oenb[95]" 540 465050 -800 465162 480 m2
+port "la_data_out[95]" 412 463868 -800 463980 480 m2
+port "la_data_in[95]" 284 462686 -800 462798 480 m2
+port "la_oenb[94]" 539 461504 -800 461616 480 m2
+port "la_data_out[94]" 411 460322 -800 460434 480 m2
+port "la_data_in[94]" 283 459140 -800 459252 480 m2
+port "la_oenb[93]" 538 457958 -800 458070 480 m2
+port "la_data_out[93]" 410 456776 -800 456888 480 m2
+port "la_data_in[93]" 282 455594 -800 455706 480 m2
+port "la_oenb[92]" 537 454412 -800 454524 480 m2
+port "la_data_out[92]" 409 453230 -800 453342 480 m2
+port "la_data_in[92]" 281 452048 -800 452160 480 m2
+port "la_oenb[91]" 536 450866 -800 450978 480 m2
+port "la_data_out[91]" 408 449684 -800 449796 480 m2
+port "la_data_in[91]" 280 448502 -800 448614 480 m2
+port "la_oenb[90]" 535 447320 -800 447432 480 m2
+port "la_data_out[90]" 407 446138 -800 446250 480 m2
+port "la_data_in[90]" 279 444956 -800 445068 480 m2
+port "la_oenb[89]" 533 443774 -800 443886 480 m2
+port "la_data_out[89]" 405 442592 -800 442704 480 m2
+port "la_data_in[89]" 277 441410 -800 441522 480 m2
+port "la_oenb[88]" 532 440228 -800 440340 480 m2
+port "la_data_out[88]" 404 439046 -800 439158 480 m2
+port "la_data_in[88]" 276 437864 -800 437976 480 m2
+port "la_oenb[87]" 531 436682 -800 436794 480 m2
+port "la_data_out[87]" 403 435500 -800 435612 480 m2
+port "la_data_in[87]" 275 434318 -800 434430 480 m2
+port "la_oenb[86]" 530 433136 -800 433248 480 m2
+port "la_data_out[86]" 402 431954 -800 432066 480 m2
+port "la_data_in[86]" 274 430772 -800 430884 480 m2
+port "la_oenb[85]" 529 429590 -800 429702 480 m2
+port "la_data_out[85]" 401 428408 -800 428520 480 m2
+port "la_data_in[85]" 273 427226 -800 427338 480 m2
+port "la_oenb[84]" 528 426044 -800 426156 480 m2
+port "la_data_out[84]" 400 424862 -800 424974 480 m2
+port "la_data_in[84]" 272 423680 -800 423792 480 m2
+port "la_oenb[83]" 527 422498 -800 422610 480 m2
+port "la_data_out[83]" 399 421316 -800 421428 480 m2
+port "la_data_in[83]" 271 420134 -800 420246 480 m2
+port "la_oenb[82]" 526 418952 -800 419064 480 m2
+port "la_data_out[82]" 398 417770 -800 417882 480 m2
+port "la_data_in[82]" 270 416588 -800 416700 480 m2
+port "la_oenb[81]" 525 415406 -800 415518 480 m2
+port "la_data_out[81]" 397 414224 -800 414336 480 m2
+port "la_data_in[81]" 269 413042 -800 413154 480 m2
+port "la_oenb[80]" 524 411860 -800 411972 480 m2
+port "la_data_out[80]" 396 410678 -800 410790 480 m2
+port "la_data_in[80]" 268 409496 -800 409608 480 m2
+port "la_oenb[79]" 522 408314 -800 408426 480 m2
+port "la_data_out[79]" 394 407132 -800 407244 480 m2
+port "la_data_in[79]" 266 405950 -800 406062 480 m2
+port "la_oenb[78]" 521 404768 -800 404880 480 m2
+port "la_data_out[78]" 393 403586 -800 403698 480 m2
+port "la_data_in[78]" 265 402404 -800 402516 480 m2
+port "la_oenb[77]" 520 401222 -800 401334 480 m2
+port "la_data_out[77]" 392 400040 -800 400152 480 m2
+port "la_data_in[77]" 264 398858 -800 398970 480 m2
+port "la_oenb[76]" 519 397676 -800 397788 480 m2
+port "la_data_out[76]" 391 396494 -800 396606 480 m2
+port "la_data_in[76]" 263 395312 -800 395424 480 m2
+port "la_oenb[75]" 518 394130 -800 394242 480 m2
+port "la_data_out[75]" 390 392948 -800 393060 480 m2
+port "la_data_in[75]" 262 391766 -800 391878 480 m2
+port "la_oenb[74]" 517 390584 -800 390696 480 m2
+port "la_data_out[74]" 389 389402 -800 389514 480 m2
+port "la_data_in[74]" 261 388220 -800 388332 480 m2
+port "la_oenb[73]" 516 387038 -800 387150 480 m2
+port "la_data_out[73]" 388 385856 -800 385968 480 m2
+port "la_data_in[73]" 260 384674 -800 384786 480 m2
+port "la_oenb[72]" 515 383492 -800 383604 480 m2
+port "la_data_out[72]" 387 382310 -800 382422 480 m2
+port "la_data_in[72]" 259 381128 -800 381240 480 m2
+port "la_oenb[71]" 514 379946 -800 380058 480 m2
+port "la_data_out[71]" 386 378764 -800 378876 480 m2
+port "la_data_in[71]" 258 377582 -800 377694 480 m2
+port "la_oenb[70]" 513 376400 -800 376512 480 m2
+port "la_data_out[70]" 385 375218 -800 375330 480 m2
+port "la_data_in[70]" 257 374036 -800 374148 480 m2
+port "la_oenb[69]" 511 372854 -800 372966 480 m2
+port "la_data_out[69]" 383 371672 -800 371784 480 m2
+port "la_data_in[69]" 255 370490 -800 370602 480 m2
+port "la_oenb[68]" 510 369308 -800 369420 480 m2
+port "la_data_out[68]" 382 368126 -800 368238 480 m2
+port "la_data_in[68]" 254 366944 -800 367056 480 m2
+port "la_oenb[67]" 509 365762 -800 365874 480 m2
+port "la_data_out[67]" 381 364580 -800 364692 480 m2
+port "la_data_in[67]" 253 363398 -800 363510 480 m2
+port "la_oenb[66]" 508 362216 -800 362328 480 m2
+port "la_data_out[66]" 380 361034 -800 361146 480 m2
+port "la_data_in[66]" 252 359852 -800 359964 480 m2
+port "la_oenb[65]" 507 358670 -800 358782 480 m2
+port "la_data_out[65]" 379 357488 -800 357600 480 m2
+port "la_data_in[65]" 251 356306 -800 356418 480 m2
+port "la_oenb[64]" 506 355124 -800 355236 480 m2
+port "la_data_out[64]" 378 353942 -800 354054 480 m2
+port "la_data_in[64]" 250 352760 -800 352872 480 m2
+port "la_oenb[63]" 505 351578 -800 351690 480 m2
+port "la_data_out[63]" 377 350396 -800 350508 480 m2
+port "la_data_in[63]" 249 349214 -800 349326 480 m2
+port "la_oenb[62]" 504 348032 -800 348144 480 m2
+port "la_data_out[62]" 376 346850 -800 346962 480 m2
+port "la_data_in[62]" 248 345668 -800 345780 480 m2
+port "la_oenb[61]" 503 344486 -800 344598 480 m2
+port "la_data_out[61]" 375 343304 -800 343416 480 m2
+port "la_data_in[61]" 247 342122 -800 342234 480 m2
+port "la_oenb[60]" 502 340940 -800 341052 480 m2
+port "la_data_out[60]" 374 339758 -800 339870 480 m2
+port "la_data_in[60]" 246 338576 -800 338688 480 m2
+port "la_oenb[59]" 500 337394 -800 337506 480 m2
+port "la_data_out[59]" 372 336212 -800 336324 480 m2
+port "la_data_in[59]" 244 335030 -800 335142 480 m2
+port "la_oenb[58]" 499 333848 -800 333960 480 m2
+port "la_data_out[58]" 371 332666 -800 332778 480 m2
+port "la_data_in[58]" 243 331484 -800 331596 480 m2
+port "la_oenb[57]" 498 330302 -800 330414 480 m2
+port "la_data_out[57]" 370 329120 -800 329232 480 m2
+port "la_data_in[57]" 242 327938 -800 328050 480 m2
+port "la_oenb[56]" 497 326756 -800 326868 480 m2
+port "la_data_out[56]" 369 325574 -800 325686 480 m2
+port "la_data_in[56]" 241 324392 -800 324504 480 m2
+port "la_oenb[55]" 496 323210 -800 323322 480 m2
+port "la_data_out[55]" 368 322028 -800 322140 480 m2
+port "la_data_in[55]" 240 320846 -800 320958 480 m2
+port "la_oenb[54]" 495 319664 -800 319776 480 m2
+port "la_data_out[54]" 367 318482 -800 318594 480 m2
+port "la_data_in[54]" 239 317300 -800 317412 480 m2
+port "la_oenb[53]" 494 316118 -800 316230 480 m2
+port "la_data_out[53]" 366 314936 -800 315048 480 m2
+port "la_data_in[53]" 238 313754 -800 313866 480 m2
+port "la_oenb[52]" 493 312572 -800 312684 480 m2
+port "la_data_out[52]" 365 311390 -800 311502 480 m2
+port "la_data_in[52]" 237 310208 -800 310320 480 m2
+port "la_oenb[51]" 492 309026 -800 309138 480 m2
+port "la_data_out[51]" 364 307844 -800 307956 480 m2
+port "la_data_in[51]" 236 306662 -800 306774 480 m2
+port "la_oenb[50]" 491 305480 -800 305592 480 m2
+port "la_data_out[50]" 363 304298 -800 304410 480 m2
+port "la_data_in[50]" 235 303116 -800 303228 480 m2
+port "la_oenb[49]" 489 301934 -800 302046 480 m2
+port "la_data_out[49]" 361 300752 -800 300864 480 m2
+port "la_data_in[49]" 233 299570 -800 299682 480 m2
+port "la_oenb[48]" 488 298388 -800 298500 480 m2
+port "la_data_out[48]" 360 297206 -800 297318 480 m2
+port "la_data_in[48]" 232 296024 -800 296136 480 m2
+port "la_oenb[47]" 487 294842 -800 294954 480 m2
+port "la_data_out[47]" 359 293660 -800 293772 480 m2
+port "la_data_in[47]" 231 292478 -800 292590 480 m2
+port "la_oenb[46]" 486 291296 -800 291408 480 m2
+port "la_data_out[46]" 358 290114 -800 290226 480 m2
+port "la_data_in[46]" 230 288932 -800 289044 480 m2
+port "la_oenb[45]" 485 287750 -800 287862 480 m2
+port "la_data_out[45]" 357 286568 -800 286680 480 m2
+port "la_data_in[45]" 229 285386 -800 285498 480 m2
+port "la_oenb[44]" 484 284204 -800 284316 480 m2
+port "la_data_out[44]" 356 283022 -800 283134 480 m2
+port "la_data_in[44]" 228 281840 -800 281952 480 m2
+port "la_oenb[43]" 483 280658 -800 280770 480 m2
+port "la_data_out[43]" 355 279476 -800 279588 480 m2
+port "la_data_in[43]" 227 278294 -800 278406 480 m2
+port "la_oenb[42]" 482 277112 -800 277224 480 m2
+port "la_data_out[42]" 354 275930 -800 276042 480 m2
+port "la_data_in[42]" 226 274748 -800 274860 480 m2
+port "la_oenb[41]" 481 273566 -800 273678 480 m2
+port "la_data_out[41]" 353 272384 -800 272496 480 m2
+port "la_data_in[41]" 225 271202 -800 271314 480 m2
+port "la_oenb[40]" 480 270020 -800 270132 480 m2
+port "la_data_out[40]" 352 268838 -800 268950 480 m2
+port "la_data_in[40]" 224 267656 -800 267768 480 m2
+port "la_oenb[39]" 478 266474 -800 266586 480 m2
+port "la_data_out[39]" 350 265292 -800 265404 480 m2
+port "la_data_in[39]" 222 264110 -800 264222 480 m2
+port "la_oenb[38]" 477 262928 -800 263040 480 m2
+port "la_data_out[38]" 349 261746 -800 261858 480 m2
+port "la_data_in[38]" 221 260564 -800 260676 480 m2
+port "la_oenb[37]" 476 259382 -800 259494 480 m2
+port "la_data_out[37]" 348 258200 -800 258312 480 m2
+port "la_data_in[37]" 220 257018 -800 257130 480 m2
+port "la_oenb[36]" 475 255836 -800 255948 480 m2
+port "la_data_out[36]" 347 254654 -800 254766 480 m2
+port "la_data_in[36]" 219 253472 -800 253584 480 m2
+port "la_oenb[35]" 474 252290 -800 252402 480 m2
+port "la_data_out[35]" 346 251108 -800 251220 480 m2
+port "la_data_in[35]" 218 249926 -800 250038 480 m2
+port "la_oenb[34]" 473 248744 -800 248856 480 m2
+port "la_data_out[34]" 345 247562 -800 247674 480 m2
+port "la_data_in[34]" 217 246380 -800 246492 480 m2
+port "la_oenb[33]" 472 245198 -800 245310 480 m2
+port "la_data_out[33]" 344 244016 -800 244128 480 m2
+port "la_data_in[33]" 216 242834 -800 242946 480 m2
+port "la_oenb[32]" 471 241652 -800 241764 480 m2
+port "la_data_out[32]" 343 240470 -800 240582 480 m2
+port "la_data_in[32]" 215 239288 -800 239400 480 m2
+port "la_oenb[31]" 470 238106 -800 238218 480 m2
+port "la_data_out[31]" 342 236924 -800 237036 480 m2
+port "la_data_in[31]" 214 235742 -800 235854 480 m2
+port "la_oenb[30]" 469 234560 -800 234672 480 m2
+port "la_data_out[30]" 341 233378 -800 233490 480 m2
+port "la_data_in[30]" 213 232196 -800 232308 480 m2
+port "la_oenb[29]" 467 231014 -800 231126 480 m2
+port "la_data_out[29]" 339 229832 -800 229944 480 m2
+port "la_data_in[29]" 211 228650 -800 228762 480 m2
+port "la_oenb[28]" 466 227468 -800 227580 480 m2
+port "la_data_out[28]" 338 226286 -800 226398 480 m2
+port "la_data_in[28]" 210 225104 -800 225216 480 m2
+port "la_oenb[27]" 465 223922 -800 224034 480 m2
+port "la_data_out[27]" 337 222740 -800 222852 480 m2
+port "la_data_in[27]" 209 221558 -800 221670 480 m2
+port "la_oenb[26]" 464 220376 -800 220488 480 m2
+port "la_data_out[26]" 336 219194 -800 219306 480 m2
+port "la_data_in[26]" 208 218012 -800 218124 480 m2
+port "la_oenb[25]" 463 216830 -800 216942 480 m2
+port "la_data_out[25]" 335 215648 -800 215760 480 m2
+port "la_data_in[25]" 207 214466 -800 214578 480 m2
+port "la_oenb[24]" 462 213284 -800 213396 480 m2
+port "la_data_out[24]" 334 212102 -800 212214 480 m2
+port "la_data_in[24]" 206 210920 -800 211032 480 m2
+port "la_oenb[23]" 461 209738 -800 209850 480 m2
+port "la_data_out[23]" 333 208556 -800 208668 480 m2
+port "la_data_in[23]" 205 207374 -800 207486 480 m2
+port "la_oenb[22]" 460 206192 -800 206304 480 m2
+port "la_data_out[22]" 332 205010 -800 205122 480 m2
+port "la_data_in[22]" 204 203828 -800 203940 480 m2
+port "la_oenb[21]" 459 202646 -800 202758 480 m2
+port "la_data_out[21]" 331 201464 -800 201576 480 m2
+port "la_data_in[21]" 203 200282 -800 200394 480 m2
+port "la_oenb[20]" 458 199100 -800 199212 480 m2
+port "la_data_out[20]" 330 197918 -800 198030 480 m2
+port "la_data_in[20]" 202 196736 -800 196848 480 m2
+port "la_oenb[19]" 456 195554 -800 195666 480 m2
+port "la_data_out[19]" 328 194372 -800 194484 480 m2
+port "la_data_in[19]" 200 193190 -800 193302 480 m2
+port "la_oenb[18]" 455 192008 -800 192120 480 m2
+port "la_data_out[18]" 327 190826 -800 190938 480 m2
+port "la_data_in[18]" 199 189644 -800 189756 480 m2
+port "la_oenb[17]" 454 188462 -800 188574 480 m2
+port "la_data_out[17]" 326 187280 -800 187392 480 m2
+port "la_data_in[17]" 198 186098 -800 186210 480 m2
+port "la_oenb[16]" 453 184916 -800 185028 480 m2
+port "la_data_out[16]" 325 183734 -800 183846 480 m2
+port "la_data_in[16]" 197 182552 -800 182664 480 m2
+port "la_oenb[15]" 452 181370 -800 181482 480 m2
+port "la_data_out[15]" 324 180188 -800 180300 480 m2
+port "la_data_in[15]" 196 179006 -800 179118 480 m2
+port "la_oenb[14]" 451 177824 -800 177936 480 m2
+port "la_data_out[14]" 323 176642 -800 176754 480 m2
+port "la_data_in[14]" 195 175460 -800 175572 480 m2
+port "la_oenb[13]" 450 174278 -800 174390 480 m2
+port "la_data_out[13]" 322 173096 -800 173208 480 m2
+port "la_data_in[13]" 194 171914 -800 172026 480 m2
+port "la_oenb[12]" 449 170732 -800 170844 480 m2
+port "la_data_out[12]" 321 169550 -800 169662 480 m2
+port "la_data_in[12]" 193 168368 -800 168480 480 m2
+port "la_oenb[11]" 440 167186 -800 167298 480 m2
+port "la_data_out[11]" 312 166004 -800 166116 480 m2
+port "la_data_in[11]" 184 164822 -800 164934 480 m2
+port "la_oenb[10]" 429 163640 -800 163752 480 m2
+port "la_data_out[10]" 301 162458 -800 162570 480 m2
+port "la_data_in[10]" 173 161276 -800 161388 480 m2
+port "la_oenb[9]" 545 160094 -800 160206 480 m2
+port "la_data_out[9]" 417 158912 -800 159024 480 m2
+port "la_data_in[9]" 289 157730 -800 157842 480 m2
+port "la_oenb[8]" 534 156548 -800 156660 480 m2
+port "la_data_out[8]" 406 155366 -800 155478 480 m2
+port "la_data_in[8]" 278 154184 -800 154296 480 m2
+port "la_oenb[7]" 523 153002 -800 153114 480 m2
+port "la_data_out[7]" 395 151820 -800 151932 480 m2
+port "la_data_in[7]" 267 150638 -800 150750 480 m2
+port "la_oenb[6]" 512 149456 -800 149568 480 m2
+port "la_data_out[6]" 384 148274 -800 148386 480 m2
+port "la_data_in[6]" 256 147092 -800 147204 480 m2
+port "la_oenb[5]" 501 145910 -800 146022 480 m2
+port "la_data_out[5]" 373 144728 -800 144840 480 m2
+port "la_data_in[5]" 245 143546 -800 143658 480 m2
+port "la_oenb[4]" 490 142364 -800 142476 480 m2
+port "la_data_out[4]" 362 141182 -800 141294 480 m2
+port "la_data_in[4]" 234 140000 -800 140112 480 m2
+port "la_oenb[3]" 479 138818 -800 138930 480 m2
+port "la_data_out[3]" 351 137636 -800 137748 480 m2
+port "la_data_in[3]" 223 136454 -800 136566 480 m2
+port "la_oenb[2]" 468 135272 -800 135384 480 m2
+port "la_data_out[2]" 340 134090 -800 134202 480 m2
+port "la_data_in[2]" 212 132908 -800 133020 480 m2
+port "la_oenb[1]" 457 131726 -800 131838 480 m2
+port "la_data_out[1]" 329 130544 -800 130656 480 m2
+port "la_data_in[1]" 201 129362 -800 129474 480 m2
+port "la_oenb[0]" 418 128180 -800 128292 480 m2
+port "la_data_out[0]" 290 126998 -800 127110 480 m2
+port "la_data_in[0]" 162 125816 -800 125928 480 m2
+port "wbs_dat_o[31]" 650 124634 -800 124746 480 m2
+port "wbs_dat_i[31]" 618 123452 -800 123564 480 m2
+port "wbs_adr_i[31]" 585 122270 -800 122382 480 m2
+port "wbs_dat_o[30]" 649 121088 -800 121200 480 m2
+port "wbs_dat_i[30]" 617 119906 -800 120018 480 m2
+port "wbs_adr_i[30]" 584 118724 -800 118836 480 m2
+port "wbs_dat_o[29]" 647 117542 -800 117654 480 m2
+port "wbs_dat_i[29]" 615 116360 -800 116472 480 m2
+port "wbs_adr_i[29]" 582 115178 -800 115290 480 m2
+port "wbs_dat_o[28]" 646 113996 -800 114108 480 m2
+port "wbs_dat_i[28]" 614 112814 -800 112926 480 m2
+port "wbs_adr_i[28]" 581 111632 -800 111744 480 m2
+port "wbs_dat_o[27]" 645 110450 -800 110562 480 m2
+port "wbs_dat_i[27]" 613 109268 -800 109380 480 m2
+port "wbs_adr_i[27]" 580 108086 -800 108198 480 m2
+port "wbs_dat_o[26]" 644 106904 -800 107016 480 m2
+port "wbs_dat_i[26]" 612 105722 -800 105834 480 m2
+port "wbs_adr_i[26]" 579 104540 -800 104652 480 m2
+port "wbs_dat_o[25]" 643 103358 -800 103470 480 m2
+port "wbs_dat_i[25]" 611 102176 -800 102288 480 m2
+port "wbs_adr_i[25]" 578 100994 -800 101106 480 m2
+port "wbs_dat_o[24]" 642 99812 -800 99924 480 m2
+port "wbs_dat_i[24]" 610 98630 -800 98742 480 m2
+port "wbs_adr_i[24]" 577 97448 -800 97560 480 m2
+port "wbs_dat_o[23]" 641 96266 -800 96378 480 m2
+port "wbs_dat_i[23]" 609 95084 -800 95196 480 m2
+port "wbs_adr_i[23]" 576 93902 -800 94014 480 m2
+port "wbs_dat_o[22]" 640 92720 -800 92832 480 m2
+port "wbs_dat_i[22]" 608 91538 -800 91650 480 m2
+port "wbs_adr_i[22]" 575 90356 -800 90468 480 m2
+port "wbs_dat_o[21]" 639 89174 -800 89286 480 m2
+port "wbs_dat_i[21]" 607 87992 -800 88104 480 m2
+port "wbs_adr_i[21]" 574 86810 -800 86922 480 m2
+port "wbs_dat_o[20]" 638 85628 -800 85740 480 m2
+port "wbs_dat_i[20]" 606 84446 -800 84558 480 m2
+port "wbs_adr_i[20]" 573 83264 -800 83376 480 m2
+port "wbs_dat_o[19]" 636 82082 -800 82194 480 m2
+port "wbs_dat_i[19]" 604 80900 -800 81012 480 m2
+port "wbs_adr_i[19]" 571 79718 -800 79830 480 m2
+port "wbs_dat_o[18]" 635 78536 -800 78648 480 m2
+port "wbs_dat_i[18]" 603 77354 -800 77466 480 m2
+port "wbs_adr_i[18]" 570 76172 -800 76284 480 m2
+port "wbs_dat_o[17]" 634 74990 -800 75102 480 m2
+port "wbs_dat_i[17]" 602 73808 -800 73920 480 m2
+port "wbs_adr_i[17]" 569 72626 -800 72738 480 m2
+port "wbs_dat_o[16]" 633 71444 -800 71556 480 m2
+port "wbs_dat_i[16]" 601 70262 -800 70374 480 m2
+port "wbs_adr_i[16]" 568 69080 -800 69192 480 m2
+port "wbs_dat_o[15]" 632 67898 -800 68010 480 m2
+port "wbs_dat_i[15]" 600 66716 -800 66828 480 m2
+port "wbs_adr_i[15]" 567 65534 -800 65646 480 m2
+port "wbs_dat_o[14]" 631 64352 -800 64464 480 m2
+port "wbs_dat_i[14]" 599 63170 -800 63282 480 m2
+port "wbs_adr_i[14]" 566 61988 -800 62100 480 m2
+port "wbs_dat_o[13]" 630 60806 -800 60918 480 m2
+port "wbs_dat_i[13]" 598 59624 -800 59736 480 m2
+port "wbs_adr_i[13]" 565 58442 -800 58554 480 m2
+port "wbs_dat_o[12]" 629 57260 -800 57372 480 m2
+port "wbs_dat_i[12]" 597 56078 -800 56190 480 m2
+port "wbs_adr_i[12]" 564 54896 -800 55008 480 m2
+port "wbs_dat_o[11]" 628 53714 -800 53826 480 m2
+port "wbs_dat_i[11]" 596 52532 -800 52644 480 m2
+port "wbs_adr_i[11]" 563 51350 -800 51462 480 m2
+port "wbs_dat_o[10]" 627 50168 -800 50280 480 m2
+port "wbs_dat_i[10]" 595 48986 -800 49098 480 m2
+port "wbs_adr_i[10]" 562 47804 -800 47916 480 m2
+port "wbs_dat_o[9]" 657 46622 -800 46734 480 m2
+port "wbs_dat_i[9]" 625 45440 -800 45552 480 m2
+port "wbs_adr_i[9]" 592 44258 -800 44370 480 m2
+port "wbs_dat_o[8]" 656 43076 -800 43188 480 m2
+port "wbs_dat_i[8]" 624 41894 -800 42006 480 m2
+port "wbs_adr_i[8]" 591 40712 -800 40824 480 m2
+port "wbs_dat_o[7]" 655 39530 -800 39642 480 m2
+port "wbs_dat_i[7]" 623 38348 -800 38460 480 m2
+port "wbs_adr_i[7]" 590 37166 -800 37278 480 m2
+port "wbs_dat_o[6]" 654 35984 -800 36096 480 m2
+port "wbs_dat_i[6]" 622 34802 -800 34914 480 m2
+port "wbs_adr_i[6]" 589 33620 -800 33732 480 m2
+port "wbs_dat_o[5]" 653 32438 -800 32550 480 m2
+port "wbs_dat_i[5]" 621 31256 -800 31368 480 m2
+port "wbs_adr_i[5]" 588 30074 -800 30186 480 m2
+port "wbs_dat_o[4]" 652 28892 -800 29004 480 m2
+port "wbs_dat_i[4]" 620 27710 -800 27822 480 m2
+port "wbs_adr_i[4]" 587 26528 -800 26640 480 m2
+port "wbs_sel_i[3]" 661 25346 -800 25458 480 m2
+port "wbs_dat_o[3]" 651 24164 -800 24276 480 m2
+port "wbs_dat_i[3]" 619 22982 -800 23094 480 m2
+port "wbs_adr_i[3]" 586 21800 -800 21912 480 m2
+port "wbs_sel_i[2]" 660 20618 -800 20730 480 m2
+port "wbs_dat_o[2]" 648 19436 -800 19548 480 m2
+port "wbs_dat_i[2]" 616 18254 -800 18366 480 m2
+port "wbs_adr_i[2]" 583 17072 -800 17184 480 m2
+port "wbs_sel_i[1]" 659 15890 -800 16002 480 m2
+port "wbs_dat_o[1]" 637 14708 -800 14820 480 m2
+port "wbs_dat_i[1]" 605 13526 -800 13638 480 m2
+port "wbs_adr_i[1]" 572 12344 -800 12456 480 m2
+port "wbs_sel_i[0]" 658 11162 -800 11274 480 m2
+port "wbs_dat_o[0]" 626 9980 -800 10092 480 m2
+port "wbs_dat_i[0]" 594 8798 -800 8910 480 m2
+port "wbs_adr_i[0]" 561 7616 -800 7728 480 m2
+port "wbs_we_i" 663 6434 -800 6546 480 m2
+port "wbs_stb_i" 662 5252 -800 5364 480 m2
+port "wbs_cyc_i" 593 4070 -800 4182 480 m2
+port "wbs_ack_o" 560 2888 -800 3000 480 m2
+port "wb_rst_i" 559 1706 -800 1818 480 m2
+port "wb_clk_i" 558 524 -800 636 480 m2
+port "io_analog[0]" 37 582300 677984 584800 682984 m3
+port "io_analog[2]" 40 465394 702300 470394 704800 m3
+port "io_analog[1]" 39 566594 702300 571594 704800 m3
+port "vccd1" 550 582340 639784 584800 644584 m3
+port "vssa1" 554 520594 702340 525394 704800 m3
+node "io_analog[4]" 0 2925 329294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[4]" 0 2925 318994 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[5]" 0 2925 227594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[5]" 0 2925 217294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[6]" 0 2925 175894 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[6]" 0 2925 165594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
+node "io_analog[4]" 0 2775 329294 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[4]" 0 2775 318994 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[5]" 0 2775 227594 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[5]" 0 2775 217294 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[6]" 0 2775 175894 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_analog[6]" 0 2775 165594 702300 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0
+node "io_in_3v3[0]" 1 613.728 583520 1544 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[26]" 1 613.728 -800 1544 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[0]" 1 613.728 583520 2726 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[26]" 1 613.728 -800 2726 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[0]" 1 613.728 583520 3908 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[26]" 1 613.728 -800 3908 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[0]" 1 613.728 583520 5090 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[26]" 1 613.728 -800 5090 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[1]" 1 613.728 583520 6272 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[25]" 1 613.728 -800 6272 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[1]" 1 613.728 583520 7454 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[25]" 1 613.728 -800 7454 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[1]" 1 613.728 583520 8636 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[25]" 1 613.728 -800 8636 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[1]" 1 613.728 583520 9818 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[25]" 1 613.728 -800 9818 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[2]" 1 613.728 583520 11000 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[24]" 1 613.728 -800 11000 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[2]" 1 613.728 583520 12182 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[24]" 1 613.728 -800 12182 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[2]" 1 613.728 583520 13364 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[24]" 1 613.728 -800 13364 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[2]" 1 613.728 583520 14546 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[24]" 1 613.728 -800 14546 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[3]" 1 613.728 583520 15728 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "gpio_noesd[17]" 1 613.728 -800 15728 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[3]" 1 613.728 583520 16910 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "gpio_analog[17]" 1 613.728 -800 16910 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[3]" 1 613.728 583520 18092 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[3]" 1 613.728 583520 19274 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in_3v3[4]" 1 613.728 583520 20456 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[4]" 1 613.728 583520 21638 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[4]" 1 613.728 583520 22820 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[4]" 1 613.728 583520 24002 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_oeb[23]" 1 613.728 -800 32422 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_out[23]" 1 613.728 -800 33604 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
+node "io_in[23]" 1 613.728 -800 34786 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
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+node "io_analog[1]" 0 18043.5 566594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19872 564 15494000 64900 0 0 0 0 0 0
+node "vccd1" 1 34798.6 582340 639784 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 744072 4436 6676800 111520 12156000 20320 0 0 0 0 0 0
+node "vssa1" 0 25496.1 520594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 28676 696 10000 400 16872240 98924 0 0 0 0 0 0
+substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "io_analog[6]" "io_analog[6]" 26250
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_clamp_high[0]" "io_clamp_low[0]" 525
+cap "io_analog[0]" "vccd1" 167.76
+cap "io_analog[6]" "io_analog[6]" 26250
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_clamp_high[1]" "io_analog[5]" 525
+cap "io_analog[4]" "io_clamp_high[0]" 525
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_analog[6]" "io_analog[6]" 21250
+cap "io_analog[6]" "io_analog[6]" 21250
+cap "io_clamp_high[2]" "io_analog[6]" 525
+cap "io_analog[4]" "io_clamp_low[0]" 525
+cap "io_clamp_low[2]" "io_analog[6]" 525
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_analog[4]" "io_analog[4]" 21250
+cap "io_clamp_low[1]" "io_analog[5]" 525
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_clamp_high[1]" "io_clamp_low[1]" 525
+cap "io_analog[4]" "io_analog[4]" 21250
+cap "io_clamp_high[2]" "io_clamp_low[2]" 525
+cap "SDC_v2p1_0/DFF_v4p1_0/VDD" "SDC_v2p1_0/DOUT" 2.27374e-13
+cap "SDC_v2p1_0/OSC_v3p2_1/VDD" "SDC_v2p1_0/OSC_v3p2_1/SENS_IN" 588.554
+cap "vssa1" "io_analog[2]" 70.39
+cap "SDC_v2p1_0/OSC_v3p2_0/N2" "SDC_v2p1_0/DOUT" 91.008
+cap "SDC_v2p1_0/DOUT" "SDC_v2p1_0/DFF_v4p1_0/VDD" 158
+cap "SDC_v2p1_0/OSC_v3p2_0/SENS_IN" "SDC_v2p1_0/OSC_v3p2_0/VDD" 588.554
+merge "SDC_v2p1_0/VSUBS" "VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+merge "SDC_v2p1_0/OSC_v3p2_0/INVandCAP_v1p1_2/VDD" "SDC_v2p1_0/OSC_v3p2_0/VDD" -758.33 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1648 361200 -2800 0 0 0 0 0 0 0 0
+merge "SDC_v2p1_0/OSC_v3p2_0/VDD" "SDC_v2p1_0/OSC_v3p2_1/INVandCAP_v1p1_2/VDD"
+merge "SDC_v2p1_0/OSC_v3p2_1/INVandCAP_v1p1_2/VDD" "SDC_v2p1_0/OSC_v3p2_1/VDD"
+merge "SDC_v2p1_0/OSC_v3p2_1/VDD" "vccd1"
+merge "SDC_v2p1_0/OSC_v3p2_0/SENS_IN" "io_analog[1]" -7706.51 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -312624 -564 -12505600 -17800 0 0 0 0 0 0
+merge "SDC_v2p1_0/OSC_v3p2_0/INVandCAP_v1p1_0/VSS" "SDC_v2p1_0/m1_22668_9130#" -13365.2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -68172 -696 60000 -400 -23316586 -30338 0 0 0 0 0 0
+merge "SDC_v2p1_0/m1_22668_9130#" "vssa1"
+merge "SDC_v2p1_0/DOUT" "io_analog[2]" -7616.58 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 86096 -1576 -12586760 -16566 0 0 0 0 0 0
+merge "SDC_v2p1_0/OSC_v3p2_1/SENS_IN" "io_analog[0]" -871.24 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -264852 -564 -42000 -2800 0 0 0 0 0 0
diff --git a/mag/user_analog_project_wrapper.spice b/mag/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..8d31cde
--- /dev/null
+++ b/mag/user_analog_project_wrapper.spice
@@ -0,0 +1,221 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt INVMIN_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt PASSGATE_v1p2 VIN VOUT CTR VDD VSS
+XINVMIN_v1p1_0 CTR INVMIN_v1p1_0/VOUT VDD VSS INVMIN_v1p1
+X0 VIN CTR VOUT VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT CTR VIN VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X2 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X3 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X4 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X5 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X6 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X7 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt invmin_magic_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt BUFFMIN_v1p1 VIN VOUT VDD VSS
+Xinvmin_magic_v1p1_0 VIN invmin_magic_v1p1_1/VIN VDD VSS invmin_magic_v1p1
+Xinvmin_magic_v1p1_1 invmin_magic_v1p1_1/VIN VOUT VDD VSS invmin_magic_v1p1
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_4SGG6N m4_n2231_n2320# c2_n2131_n2220#
+X0 c2_n2131_n2220# m4_n2231_n2320# sky130_fd_pr__cap_mim_m3_2 l=2.22e+07u w=1.88e+07u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_7PBNAZ m4_n671_n2320# c2_n571_n2220#
+X0 c2_n571_n2220# m4_n671_n2320# sky130_fd_pr__cap_mim_m3_2 l=2.22e+07u w=3.2e+06u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_1_9K4XRG m3_n456_n2320# c1_n356_n2220#
+X0 c1_n356_n2220# m3_n456_n2320# sky130_fd_pr__cap_mim_m3_1 l=2.22e+07u w=3.2e+06u
+.ends
+
+.subckt CAPOSC_v1p1 BOT TOP_V TOP_B
+Xsky130_fd_pr__cap_mim_m3_2_4SGG6N_0 BOT TOP_B sky130_fd_pr__cap_mim_m3_2_4SGG6N
+Xsky130_fd_pr__cap_mim_m3_2_7PBNAZ_0 BOT TOP_V sky130_fd_pr__cap_mim_m3_2_7PBNAZ
+Xsky130_fd_pr__cap_mim_m3_1_9K4XRG_0 BOT TOP_V sky130_fd_pr__cap_mim_m3_1_9K4XRG
+X0 TOP_B BOT sky130_fd_pr__cap_mim_m3_1 l=2.22e+07u w=1.88e+07u
+.ends
+
+.subckt INV_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X2 VSS VIN VOUT VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X3 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X4 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X5 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X6 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X7 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt INVandCAP_v1p1 VOUT VDD VSS INV_v1p1_0/VIN CAPOSC_v1p1_0/TOP_V
+XCAPOSC_v1p1_0 VSS CAPOSC_v1p1_0/TOP_V VOUT CAPOSC_v1p1
+XINV_v1p1_0 INV_v1p1_0/VIN VOUT VDD VSS INV_v1p1
+.ends
+
+.subckt OSC_v3p2 VSS SENS_IN N1 CON_CV N2 VDD
+XBUFFMIN_v1p1_0 BUFFMIN_v1p1_0/VIN N2 VDD VSS BUFFMIN_v1p1
+XINVandCAP_v1p1_0 SENS_IN VDD VSS BUFFMIN_v1p1_0/VIN CON_CV INVandCAP_v1p1
+XINVandCAP_v1p1_1 BUFFMIN_v1p1_0/VIN VDD VSS N1 BUFFMIN_v1p1_0/VIN INVandCAP_v1p1
+XINVandCAP_v1p1_2 N1 VDD VSS SENS_IN N1 INVandCAP_v1p1
+.ends
+
+.subckt sky130_fd_pr__pfet_01v8_MA8JHN a_15_n136# a_n33_95# a_n73_n136# w_n109_n198#
+X0 a_15_n136# a_n33_95# a_n73_n136# w_n109_n198# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt sky130_fd_pr__nfet_01v8_59MFY5 a_n73_n69# a_n33_n157# a_15_n69# GND
+X0 a_15_n69# a_n33_n157# a_n73_n69# w_n99_n95# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt sky130_fd_pr__nfet_01v8_6H9P4D a_n73_n100# a_15_n100# a_n15_n126# GND
+X0 a_15_n100# a_n15_n126# a_n73_n100# w_n99_n126# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt DFF_v4p1 VDD GND CLK IN ND D
+Xsky130_fd_pr__pfet_01v8_MA8JHN_0 VDD IN m1_776_62# VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_1 m1_776_62# CLK m1_476_n356# VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_2 D ND VDD VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_3 VDD D ND VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_5 m1_n564_n40# CLK sky130_fd_pr__pfet_01v8_MA8JHN_5/a_n73_n136#
++ VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_4 sky130_fd_pr__pfet_01v8_MA8JHN_4/a_15_n136# sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#
++ sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n73_n136# sky130_fd_pr__pfet_01v8_MA8JHN_4/w_n109_n198#
++ sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__nfet_01v8_59MFY5_0 m1_576_n268# CLK GND GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_59MFY5_1 D m1_476_n356# m1_576_n268# GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_0 GND m1_476_n356# IN GND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_59MFY5_2 m1_n224_n268# m1_n564_n40# ND GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_1 GND D ND GND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_59MFY5_3 sky130_fd_pr__nfet_01v8_59MFY5_3/a_n73_n69# CLK
++ m1_n224_n268# GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_2 ND GND D GND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_6H9P4D_3 sky130_fd_pr__nfet_01v8_6H9P4D_3/a_n73_n100# sky130_fd_pr__nfet_01v8_6H9P4D_3/a_15_n100#
++ sky130_fd_pr__nfet_01v8_6H9P4D_3/a_n15_n126# GND sky130_fd_pr__nfet_01v8_6H9P4D
+.ends
+
+.subckt SDC_v2p1 VSS DOUT SENS_IN REF_IN VDD
+XPASSGATE_v1p2_0 SENS_IN OSC_v3p2_0/CON_CV DOUT VDD VSS PASSGATE_v1p2
+XOSC_v3p2_0 VSS SENS_IN OSC_v3p2_0/N1 OSC_v3p2_0/CON_CV OSC_v3p2_0/N2 VDD OSC_v3p2
+XOSC_v3p2_1 VSS REF_IN OSC_v3p2_1/N1 REF_IN OSC_v3p2_1/N2 VDD OSC_v3p2
+XDFF_v4p1_0 VDD VSS OSC_v3p2_1/N2 OSC_v3p2_0/N2 DFF_v4p1_0/ND DOUT DFF_v4p1
+.ends
+
+*.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+*+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+*+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+*+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+*+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+*+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+*+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+*+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+*+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+*+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+*+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+*+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+*+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+*+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+*+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+*+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+*+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+*+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+*+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+*+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+*+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+*+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+*+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+*+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+*+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+*+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+*+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+*+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+*+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+*+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+*+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+*+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+*+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+*+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+*+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+*+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+*+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+*+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+*+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+*+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+*+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+*+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+*+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+*+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+*+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+*+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+*+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+*+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+*+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+*+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+*+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+*+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+*+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+*+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+*+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+*+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+*+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+*+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+*+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+*+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+*+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+*+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+*+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+*+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+*+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+*+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+*+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+*+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+*+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+*+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+*+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+*+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+*+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+*+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+*+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+*+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+*+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+*+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+*+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+*+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+*+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+*+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+*+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+*+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+*+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+*+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+*+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+*+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+*+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+*+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+*+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+*+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+*+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+*+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+*+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+*+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+*+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+*+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+*+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+*+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+*+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+*+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+*+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+*+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+*+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+*+ wbs_stb_i wbs_we_i
+XSDC_v2p1_0 vssa1 io_analog[2] io_analog[1] io_analog[0] vccd1 SDC_v2p1
+*.ends
+
diff --git a/mag/user_analog_project_wrapper_expor.spice b/mag/user_analog_project_wrapper_expor.spice
new file mode 100644
index 0000000..8d31cde
--- /dev/null
+++ b/mag/user_analog_project_wrapper_expor.spice
@@ -0,0 +1,221 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt INVMIN_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt PASSGATE_v1p2 VIN VOUT CTR VDD VSS
+XINVMIN_v1p1_0 CTR INVMIN_v1p1_0/VOUT VDD VSS INVMIN_v1p1
+X0 VIN CTR VOUT VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT CTR VIN VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X2 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X3 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X4 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X5 VIN INVMIN_v1p1_0/VOUT VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X6 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X7 VOUT INVMIN_v1p1_0/VOUT VIN VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt invmin_magic_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt BUFFMIN_v1p1 VIN VOUT VDD VSS
+Xinvmin_magic_v1p1_0 VIN invmin_magic_v1p1_1/VIN VDD VSS invmin_magic_v1p1
+Xinvmin_magic_v1p1_1 invmin_magic_v1p1_1/VIN VOUT VDD VSS invmin_magic_v1p1
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_4SGG6N m4_n2231_n2320# c2_n2131_n2220#
+X0 c2_n2131_n2220# m4_n2231_n2320# sky130_fd_pr__cap_mim_m3_2 l=2.22e+07u w=1.88e+07u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_2_7PBNAZ m4_n671_n2320# c2_n571_n2220#
+X0 c2_n571_n2220# m4_n671_n2320# sky130_fd_pr__cap_mim_m3_2 l=2.22e+07u w=3.2e+06u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_1_9K4XRG m3_n456_n2320# c1_n356_n2220#
+X0 c1_n356_n2220# m3_n456_n2320# sky130_fd_pr__cap_mim_m3_1 l=2.22e+07u w=3.2e+06u
+.ends
+
+.subckt CAPOSC_v1p1 BOT TOP_V TOP_B
+Xsky130_fd_pr__cap_mim_m3_2_4SGG6N_0 BOT TOP_B sky130_fd_pr__cap_mim_m3_2_4SGG6N
+Xsky130_fd_pr__cap_mim_m3_2_7PBNAZ_0 BOT TOP_V sky130_fd_pr__cap_mim_m3_2_7PBNAZ
+Xsky130_fd_pr__cap_mim_m3_1_9K4XRG_0 BOT TOP_V sky130_fd_pr__cap_mim_m3_1_9K4XRG
+X0 TOP_B BOT sky130_fd_pr__cap_mim_m3_1 l=2.22e+07u w=1.88e+07u
+.ends
+
+.subckt INV_v1p1 VIN VOUT VDD VSS
+X0 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X1 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X2 VSS VIN VOUT VSS sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X3 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X4 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X5 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X6 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+X7 VDD VIN VOUT VDD sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt INVandCAP_v1p1 VOUT VDD VSS INV_v1p1_0/VIN CAPOSC_v1p1_0/TOP_V
+XCAPOSC_v1p1_0 VSS CAPOSC_v1p1_0/TOP_V VOUT CAPOSC_v1p1
+XINV_v1p1_0 INV_v1p1_0/VIN VOUT VDD VSS INV_v1p1
+.ends
+
+.subckt OSC_v3p2 VSS SENS_IN N1 CON_CV N2 VDD
+XBUFFMIN_v1p1_0 BUFFMIN_v1p1_0/VIN N2 VDD VSS BUFFMIN_v1p1
+XINVandCAP_v1p1_0 SENS_IN VDD VSS BUFFMIN_v1p1_0/VIN CON_CV INVandCAP_v1p1
+XINVandCAP_v1p1_1 BUFFMIN_v1p1_0/VIN VDD VSS N1 BUFFMIN_v1p1_0/VIN INVandCAP_v1p1
+XINVandCAP_v1p1_2 N1 VDD VSS SENS_IN N1 INVandCAP_v1p1
+.ends
+
+.subckt sky130_fd_pr__pfet_01v8_MA8JHN a_15_n136# a_n33_95# a_n73_n136# w_n109_n198#
+X0 a_15_n136# a_n33_95# a_n73_n136# w_n109_n198# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt sky130_fd_pr__nfet_01v8_59MFY5 a_n73_n69# a_n33_n157# a_15_n69# GND
+X0 a_15_n69# a_n33_n157# a_n73_n69# w_n99_n95# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt sky130_fd_pr__nfet_01v8_6H9P4D a_n73_n100# a_15_n100# a_n15_n126# GND
+X0 a_15_n100# a_n15_n126# a_n73_n100# w_n99_n126# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
+.ends
+
+.subckt DFF_v4p1 VDD GND CLK IN ND D
+Xsky130_fd_pr__pfet_01v8_MA8JHN_0 VDD IN m1_776_62# VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_1 m1_776_62# CLK m1_476_n356# VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_2 D ND VDD VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_3 VDD D ND VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_5 m1_n564_n40# CLK sky130_fd_pr__pfet_01v8_MA8JHN_5/a_n73_n136#
++ VDD sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__pfet_01v8_MA8JHN_4 sky130_fd_pr__pfet_01v8_MA8JHN_4/a_15_n136# sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n33_95#
++ sky130_fd_pr__pfet_01v8_MA8JHN_4/a_n73_n136# sky130_fd_pr__pfet_01v8_MA8JHN_4/w_n109_n198#
++ sky130_fd_pr__pfet_01v8_MA8JHN
+Xsky130_fd_pr__nfet_01v8_59MFY5_0 m1_576_n268# CLK GND GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_59MFY5_1 D m1_476_n356# m1_576_n268# GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_0 GND m1_476_n356# IN GND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_59MFY5_2 m1_n224_n268# m1_n564_n40# ND GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_1 GND D ND GND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_59MFY5_3 sky130_fd_pr__nfet_01v8_59MFY5_3/a_n73_n69# CLK
++ m1_n224_n268# GND sky130_fd_pr__nfet_01v8_59MFY5
+Xsky130_fd_pr__nfet_01v8_6H9P4D_2 ND GND D GND sky130_fd_pr__nfet_01v8_6H9P4D
+Xsky130_fd_pr__nfet_01v8_6H9P4D_3 sky130_fd_pr__nfet_01v8_6H9P4D_3/a_n73_n100# sky130_fd_pr__nfet_01v8_6H9P4D_3/a_15_n100#
++ sky130_fd_pr__nfet_01v8_6H9P4D_3/a_n15_n126# GND sky130_fd_pr__nfet_01v8_6H9P4D
+.ends
+
+.subckt SDC_v2p1 VSS DOUT SENS_IN REF_IN VDD
+XPASSGATE_v1p2_0 SENS_IN OSC_v3p2_0/CON_CV DOUT VDD VSS PASSGATE_v1p2
+XOSC_v3p2_0 VSS SENS_IN OSC_v3p2_0/N1 OSC_v3p2_0/CON_CV OSC_v3p2_0/N2 VDD OSC_v3p2
+XOSC_v3p2_1 VSS REF_IN OSC_v3p2_1/N1 REF_IN OSC_v3p2_1/N2 VDD OSC_v3p2
+XDFF_v4p1_0 VDD VSS OSC_v3p2_1/N2 OSC_v3p2_0/N2 DFF_v4p1_0/ND DOUT DFF_v4p1
+.ends
+
+*.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+*+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+*+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+*+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+*+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+*+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+*+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+*+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+*+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+*+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+*+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+*+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+*+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+*+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+*+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+*+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+*+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+*+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+*+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+*+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+*+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+*+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+*+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+*+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+*+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+*+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+*+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+*+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+*+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+*+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+*+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+*+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+*+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+*+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+*+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+*+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+*+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+*+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+*+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+*+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+*+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+*+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+*+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+*+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+*+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+*+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+*+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+*+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+*+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+*+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+*+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+*+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+*+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+*+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+*+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+*+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+*+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+*+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+*+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+*+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+*+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+*+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+*+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+*+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+*+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+*+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+*+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+*+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+*+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+*+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+*+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+*+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+*+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+*+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+*+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+*+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+*+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+*+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+*+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+*+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+*+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+*+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+*+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+*+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+*+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+*+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+*+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+*+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+*+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+*+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+*+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+*+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+*+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+*+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+*+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+*+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+*+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+*+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+*+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+*+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+*+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+*+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+*+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+*+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+*+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+*+ wbs_stb_i wbs_we_i
+XSDC_v2p1_0 vssa1 io_analog[2] io_analog[1] io_analog[0] vccd1 SDC_v2p1
+*.ends
+
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice
index c3851a3..458490a 100644
--- a/netgen/user_analog_project_wrapper.spice
+++ b/netgen/user_analog_project_wrapper.spice
@@ -1,336 +1,256 @@
-* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+**.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
+*+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0] wbs_ack_o
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0] user_clock2
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0] io_clamp_high[2],io_clamp_high[1],io_clamp_high[0] io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*+ user_irq[2],user_irq[1],user_irq[0]
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
+*.iopin vdda1
+*.iopin vdda2
+*.iopin vssa1
+*.iopin vssa2
+*.iopin vccd1
+*.iopin vccd2
+*.iopin vssd1
+*.iopin vssd2
+*.ipin wb_clk_i
+*.ipin wb_rst_i
+*.ipin wbs_stb_i
+*.ipin wbs_cyc_i
+*.ipin wbs_we_i
+*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*.ipin
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*.ipin
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
+*.opin wbs_ack_o
+*.opin
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*.ipin
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*.opin
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*.ipin
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*.ipin
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
+*.ipin user_clock2
+*.opin
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*.opin
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*.iopin
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*.iopin
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*.iopin
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
+*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
+*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*.opin user_irq[2],user_irq[1],user_irq[0]
+*.ipin
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
+R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R8 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=0.56 L=0.49 m=1
+R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=0.56 L=0.31 m=1
+R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=0.56 L=0.58 m=1
+R12 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=0.56 L=0.6 m=1
+X1 io_analog[1] io_analog[0] io_analog[2] vccd1 vssa1 SDC_v2p1
+**.ends
 
-.subckt sky130_fd_pr__cap_mim_m3_2_W5U4AW c2_n3079_n3000# m4_n3179_n3100#
-X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+* expanding   symbol:  SDC_v2p1.sym # of pins=5
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/SDC_v2p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/SDC_v2p1.sch
+.subckt SDC_v2p1  SENS_IN REF_IN DOUT VDD VSS
+*.iopin VDD
+*.iopin VSS
+*.ipin SENS_IN
+*.ipin REF_IN
+*.opin DOUT
+XOSC_SENS SENS_IN N1_S N2_S VDD VSS net1 OSC_v3p2
+XOSC_REF REF_IN N1_R N2_R VDD VSS REF_IN OSC_v3p2
+XDFF N2_S N2_R DOUT NDOUT VDD VSS DFF_v4p1
+XPG SENS_IN DOUT net1 VDD VSS PASSGATE_v1p2
 .ends
 
-.subckt sky130_fd_sc_hvl__buf_8 A VGND VPWR X VNB VPB
-X0 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X2 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X3 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X4 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X5 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X6 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X8 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X9 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X10 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X12 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X14 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X15 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X16 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X18 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X19 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X20 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X21 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+
+* expanding   symbol:  OSC_v3p2.sym # of pins=6
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/OSC_v3p2.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/OSC_v3p2.sch
+.subckt OSC_v3p2  SENS_IN N1 N2 VDD VSS CON_CV
+*.ipin SENS_IN
+*.iopin VDD
+*.iopin VSS
+*.opin N1
+*.opin N2
+*.iopin CON_CV
+XST1 SENS_IN VDD VSS N1 N1 INVandCAP_v1p1
+XST2 N1 VDD VSS net1 net1 INVandCAP_v1p1
+XST3 net1 VDD VSS SENS_IN CON_CV INVandCAP_v1p1
+XBUFFS net1 N2 VDD VSS BUFFMIN_v1p1
 .ends
 
-.subckt sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ a_n683_n200# a_n189_n297# a_29_n297# a_189_n200#
-+ a_n901_n200# a_247_n297# a_n407_n297# a_465_n297# a_407_n200# a_n625_n297# a_683_n297#
-+ a_625_n200# a_n843_n297# w_n1101_n497# a_843_n200# a_n29_n200# a_n247_n200# a_n465_n200#
-X0 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X2 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X4 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X5 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X6 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X7 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+
+* expanding   symbol:  DFF_v4p1.sym # of pins=6
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/DFF_v4p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/DFF_v4p1.sch
+.subckt DFF_v4p1  IN CLK D ND VDD GND
+*.ipin IN
+*.ipin CLK
+*.iopin VDD
+*.iopin GND
+*.opin ND
+*.opin D
+XMN_NIN NDIFF IN GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NINCLK NDIFF CLK net1 VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN net1 IN VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_NIN1 PDIFF NDIFF GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NINCLK1 PDIFF CLK net2 VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN1 net2 NDIFF VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMN_NIN2 net3 CLK GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT ND PDIFF net3 GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT1 D NDIFF net4 GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT2 D ND GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN2 D ND VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT3 ND D GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN3 ND D VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_NIN3 net4 CLK GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
 .ends
 
-.subckt sky130_fd_pr__nfet_g5v0d10v5_TGFUGS a_n792_n200# a_298_n200# a_516_n200# a_734_n200#
-+ w_n962_n458# a_138_n288# a_n298_n288# a_80_n200# a_356_n288# a_n516_n288# a_574_n288#
-+ a_n734_n288# a_n138_n200# a_n356_n200# a_n574_n200# a_n80_n288#
-X0 a_80_n200# a_n80_n288# a_n138_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X1 a_n574_n200# a_n734_n288# a_n792_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X2 a_734_n200# a_574_n288# a_516_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X3 a_298_n200# a_138_n288# a_80_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X4 a_n138_n200# a_n298_n288# a_n356_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X5 a_n356_n200# a_n516_n288# a_n574_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X6 a_516_n200# a_356_n288# a_298_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+
+* expanding   symbol:  PASSGATE_v1p2.sym # of pins=5
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/PASSGATE_v1p2.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/PASSGATE_v1p2.sch
+.subckt PASSGATE_v1p2  VIN CTR VOUT VDD VSS
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.ipin CTR
+*.opin VOUT
+XMNSW VOUT CTR VIN VSS sky130_fd_pr__nfet_01v8 L=0.15 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMPSW VOUT net1 VIN VDD sky130_fd_pr__pfet_01v8 L=0.15 W=6 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+X1 CTR net1 VDD VSS INVMIN_v1p1
 .ends
 
-.subckt sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 a_n1806_2500# a_n4122_n2932# a_n5280_2500#
-+ a_2054_n2932# a_896_n2932# a_4756_2500# a_3598_n2932# a_3212_2500# a_n3736_n2932#
-+ a_1668_n2932# a_n1806_n2932# a_5142_n2932# a_896_2500# a_510_n2932# a_n3350_2500#
-+ a_n4508_2500# a_3212_n2932# a_n4894_2500# a_1282_2500# w_n5446_n3098# a_4756_n2932#
-+ a_2826_2500# a_2826_n2932# a_n2192_n2932# a_n1034_2500# a_n2578_2500# a_n1420_2500#
-+ a_n2964_2500# a_n648_n2932# a_n648_2500# a_n5280_n2932# a_n3350_n2932# a_4370_2500#
-+ a_1282_n2932# a_124_n2932# a_n1420_n2932# a_n4894_n2932# a_124_2500# a_n2964_n2932#
-+ a_n4122_2500# a_2054_2500# a_510_2500# a_n4508_n2932# a_4370_n2932# a_3598_2500#
-+ a_3984_2500# a_2440_n2932# a_2440_2500# a_3984_n2932# a_n2192_2500# a_n3736_2500#
-+ a_1668_2500# a_n262_n2932# a_n262_2500# a_n1034_n2932# a_5142_2500# a_n2578_n2932#
-X0 a_n2578_n2932# a_n2578_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X1 a_n1420_n2932# a_n1420_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X2 a_n1806_n2932# a_n1806_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X3 a_3212_n2932# a_3212_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X4 a_3598_n2932# a_3598_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X5 a_n2964_n2932# a_n2964_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X6 a_2826_n2932# a_2826_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X7 a_4370_n2932# a_4370_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X8 a_3984_n2932# a_3984_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X9 a_n262_n2932# a_n262_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X10 a_n3350_n2932# a_n3350_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X11 a_n4122_n2932# a_n4122_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X12 a_n3736_n2932# a_n3736_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X13 a_5142_n2932# a_5142_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X14 a_n4894_n2932# a_n4894_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X15 a_1282_n2932# a_1282_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X16 a_4756_n2932# a_4756_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X17 a_124_n2932# a_124_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X18 a_510_n2932# a_510_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X19 a_896_n2932# a_896_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X20 a_n648_n2932# a_n648_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X21 a_n5280_n2932# a_n5280_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X22 a_n4508_n2932# a_n4508_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X23 a_n1034_n2932# a_n1034_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X24 a_n2192_n2932# a_n2192_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X25 a_2054_n2932# a_2054_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X26 a_1668_n2932# a_1668_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
-X27 a_2440_n2932# a_2440_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+
+* expanding   symbol:  INVandCAP_v1p1.sym # of pins=5
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVandCAP_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVandCAP_v1p1.sch
+.subckt INVandCAP_v1p1  VIN VDD VSS VOUT CON_CV
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.opin VOUT
+*.iopin CON_CV
+XINV_OSC VIN VOUT VDD VSS INV_v1p1
+XCN CON_CV VOUT VSS CAPOSC_v1p1
 .ends
 
-.subckt sky130_fd_pr__pfet_g5v0d10v5_3YBPVB a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
-X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+
+* expanding   symbol:  BUFFMIN_v1p1.sym # of pins=4
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/BUFFMIN_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/BUFFMIN_v1p1.sch
+.subckt BUFFMIN_v1p1  VIN VOUT VDD VSS
+*.iopin VDD
+*.iopin VSS
+*.ipin VIN
+*.opin VOUT
+X1 VIN net1 VDD VSS INVMIN_v1p1
+X2 net1 VOUT VDD VSS INVMIN_v1p1
 .ends
 
-.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VPWR X VNB VPB
-X0 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X1 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
-X2 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X3 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
-X4 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u
-X5 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u
-X6 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X7 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X8 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X9 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+
+* expanding   symbol:  INVMIN_v1p1.sym # of pins=4
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVMIN_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVMIN_v1p1.sch
+.subckt INVMIN_v1p1  VIN VOUT VDD VSS
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.opin VOUT
+XM1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM2 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
 .ends
 
-.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPXE a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
-X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+
+* expanding   symbol:  INV_v1p1.sym # of pins=4
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INV_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INV_v1p1.sch
+.subckt INV_v1p1  VIN VOUT VDD VSS
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.opin VOUT
+XM1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 L=0.15 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM2 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=6 nf=6 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
 .ends
 
-.subckt sky130_fd_pr__nfet_g5v0d10v5_PKVMTM w_n308_n458# a_80_n200# a_n138_n200# a_n80_n288#
-X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+
+* expanding   symbol:  CAPOSC_v1p1.sym # of pins=3
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/CAPOSC_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/CAPOSC_v1p1.sch
+.subckt CAPOSC_v1p1  TOP_V TOP_B BOT
+*.iopin TOP_V
+*.iopin TOP_B
+*.iopin BOT
+XC1_V TOP_V BOT sky130_fd_pr__cap_mim_m3_1 W=3.2 L=22.2 MF=1 m=1
+XC2_V TOP_V BOT sky130_fd_pr__cap_mim_m3_2 W=3.2 L=22.2 MF=1 m=1
+XC1_B TOP_B BOT sky130_fd_pr__cap_mim_m3_1 W=18.8 L=22.2 MF=1 m=1
+XC2_B TOP_B BOT sky130_fd_pr__cap_mim_m3_2 W=18.8 L=22.2 MF=1 m=1
 .ends
 
-.subckt sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC w_n308_n458# a_80_n200# a_n138_n200# a_n80_n288#
-X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-.ends
-
-.subckt sky130_fd_pr__cap_mim_m3_1_WRT4AW c1_n3036_n3000# m3_n3136_n3100#
-X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
-.ends
-
-.subckt sky130_fd_pr__pfet_g5v0d10v5_YEUEBV a_n792_n200# a_138_n297# a_n298_n297#
-+ a_298_n200# a_356_n297# a_n516_n297# a_574_n297# a_516_n200# a_n734_n297# a_734_n200#
-+ a_n80_n297# a_80_n200# a_n138_n200# a_n356_n200# a_n574_n200# w_n992_n497#
-X0 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X1 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X2 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X3 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X4 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X5 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-X6 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-.ends
-
-.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPBG a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
-X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
-.ends
-
-.subckt sky130_fd_sc_hvl__inv_8 A VGND VPWR Y VNB VPB
-X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X1 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X3 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X4 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X5 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X6 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X8 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X9 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X10 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X11 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X13 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
-.ends
-
-.subckt example_por vdd3v3 vss porb_h por_l porb_l vdd1v8
-Xsky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss sky130_fd_sc_hvl__schmittbuf_1_0/A sky130_fd_pr__cap_mim_m3_2_W5U4AW
-Xsky130_fd_sc_hvl__buf_8_1 sky130_fd_sc_hvl__inv_8_0/A vss vdd1v8 porb_l vss vdd1v8
-+ sky130_fd_sc_hvl__buf_8
-Xsky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653#
-+ vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653#
-+ m1_502_7653# vdd3v3 vdd3v3 vdd3v3 m1_502_7653# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ
-Xsky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 m1_721_6815# vss m1_721_6815# vss vss m1_721_6815#
-+ m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# vss
-+ m1_721_6815# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_TGFUGS
-Xsky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 li_3322_5813# li_1391_165# vss li_7567_165#
-+ li_6023_165# vdd3v3 li_9111_165# li_8726_5813# li_1391_165# li_6795_165# li_3707_165#
-+ vss li_6410_5813# li_6023_165# li_1778_5813# li_1006_5813# li_8339_165# vss li_6410_5813#
-+ vss li_9883_165# li_7954_5813# li_8339_165# li_2935_165# li_4094_5813# li_2550_5813#
-+ li_4094_5813# li_2550_5813# li_4479_165# li_4866_5813# vss li_2163_165# li_9498_5813#
-+ li_6795_165# li_5251_165# li_3707_165# li_619_165# li_5638_5813# li_2163_165# li_1006_5813#
-+ li_7182_5813# li_5638_5813# li_619_165# li_9883_165# li_8726_5813# li_9498_5813#
-+ li_7567_165# li_7954_5813# li_9111_165# li_3322_5813# li_1778_5813# li_7182_5813#
-+ li_5251_165# li_4866_5813# li_4479_165# vss li_2935_165# sky130_fd_pr__res_xhigh_po_0p69_S5N9F3
-Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 m1_185_6573# m1_721_6815# vdd3v3 m1_2993_7658#
-+ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
-Xsky130_fd_sc_hvl__schmittbuf_1_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss vdd3v3 sky130_fd_sc_hvl__inv_8_0/A
-+ vss vdd3v3 sky130_fd_sc_hvl__schmittbuf_1
-Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 m1_2756_6573# m1_4283_8081# vdd3v3 m1_2756_6573#
-+ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
-Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 m1_2756_6573# sky130_fd_sc_hvl__schmittbuf_1_0/A
-+ vdd3v3 m1_6249_7690# sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
-Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 m1_185_6573# m1_502_7653# vdd3v3 m1_185_6573#
-+ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
-Xsky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 m1_4283_8081# m1_6249_7690# vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YUHPXE
-Xsky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 vss m1_2756_6573# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_PKVMTM
-Xsky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 vss m1_185_6573# vss li_2550_5813# sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC
-Xsky130_fd_pr__cap_mim_m3_1_WRT4AW_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss sky130_fd_pr__cap_mim_m3_1_WRT4AW
-Xsky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081#
-+ m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081#
-+ vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YEUEBV
-Xsky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 m1_502_7653# m1_2993_7658# vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YUHPBG
-Xsky130_fd_sc_hvl__inv_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vdd1v8 por_l vss vdd1v8
-+ sky130_fd_sc_hvl__inv_8
-Xsky130_fd_sc_hvl__buf_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vdd3v3 porb_h vss vdd3v3
-+ sky130_fd_sc_hvl__buf_8
-.ends
-
-.subckt user_analog_proj_example example_por_0/por_l example_por_1/por_l example_por_1/vdd3v3
-+ example_por_1/porb_l example_por_0/vdd3v3 example_por_1/porb_h example_por_0/porb_l
-+ example_por_0/porb_h VSUBS example_por_0/vdd1v8 example_por_1/vdd1v8
-Xexample_por_0 example_por_0/vdd3v3 VSUBS example_por_0/porb_h example_por_0/por_l
-+ example_por_0/porb_l example_por_0/vdd1v8 example_por
-Xexample_por_1 example_por_1/vdd3v3 VSUBS example_por_1/porb_h example_por_1/por_l
-+ example_por_1/porb_l example_por_1/vdd1v8 example_por
-.ends
-
-.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
-+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
-+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
-+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
-+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
-+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
-+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
-+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[7] io_analog[8] io_analog[9]
-+ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
-+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
-+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
-+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
-+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
-+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
-+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
-+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
-+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
-+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
-+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
-+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
-+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
-+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
-+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
-+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
-+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
-+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
-+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
-+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
-+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
-+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
-+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
-+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
-+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
-+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
-+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
-+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
-+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
-+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
-+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
-+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
-+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
-+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
-+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
-+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
-+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
-+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
-+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
-+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
-+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
-+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
-+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
-+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
-+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
-+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
-+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
-+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
-+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
-+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
-+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
-+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
-+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
-+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
-+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
-+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
-+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
-+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
-+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
-+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
-+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
-+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
-+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
-+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
-+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
-+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
-+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
-+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
-+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
-+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
-+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
-+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
-+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
-+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
-+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
-+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
-+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
-+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
-+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
-+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
-+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
-+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
-+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
-+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
-+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
-+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
-+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
-+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
-+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
-+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
-+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
-+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
-+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
-+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
-+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
-+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
-+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
-+ wbs_stb_i wbs_we_i
-Xuser_analog_proj_example_0 io_out[16] io_out[12] vdda1 io_out[11] io_analog[4] gpio_analog[3]
-+ io_out[15] gpio_analog[7] vssa1 vccd1 vccd1 user_analog_proj_example
-R0 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
-R1 io_oeb[15] vssd1 sky130_fd_pr__res_generic_m3 w=560000u l=600000u
-R2 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
-R3 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 w=560000u l=580000u
-R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
-R5 io_oeb[16] vssd1 sky130_fd_pr__res_generic_m3 w=560000u l=310000u
-R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
-R7 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 w=560000u l=490000u
-R8 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
-R9 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
-.ends
-
+.end
diff --git a/netgen/user_analog_project_wrapper_expor.spice b/netgen/user_analog_project_wrapper_expor.spice
new file mode 100644
index 0000000..c3851a3
--- /dev/null
+++ b/netgen/user_analog_project_wrapper_expor.spice
@@ -0,0 +1,336 @@
+* NGSPICE file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt sky130_fd_pr__cap_mim_m3_2_W5U4AW c2_n3079_n3000# m4_n3179_n3100#
+X0 c2_n3079_n3000# m4_n3179_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+.ends
+
+.subckt sky130_fd_sc_hvl__buf_8 A VGND VPWR X VNB VPB
+X0 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X1 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X2 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X3 a_45_443# A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X4 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X5 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X6 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X7 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X9 VPWR A a_45_443# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X10 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X11 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X12 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X13 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X14 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X15 VGND A a_45_443# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X16 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X17 X a_45_443# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X18 VGND a_45_443# X VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X19 X a_45_443# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X20 VPWR a_45_443# X VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X21 a_45_443# A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ a_n683_n200# a_n189_n297# a_29_n297# a_189_n200#
++ a_n901_n200# a_247_n297# a_n407_n297# a_465_n297# a_407_n200# a_n625_n297# a_683_n297#
++ a_625_n200# a_n843_n297# w_n1101_n497# a_843_n200# a_n29_n200# a_n247_n200# a_n465_n200#
+X0 a_n247_n200# a_n407_n297# a_n465_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X1 a_843_n200# a_683_n297# a_625_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X2 a_407_n200# a_247_n297# a_189_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X3 a_189_n200# a_29_n297# a_n29_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X4 a_n465_n200# a_n625_n297# a_n683_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_625_n200# a_465_n297# a_407_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X6 a_n29_n200# a_n189_n297# a_n247_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X7 a_n683_n200# a_n843_n297# a_n901_n200# w_n1101_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_TGFUGS a_n792_n200# a_298_n200# a_516_n200# a_734_n200#
++ w_n962_n458# a_138_n288# a_n298_n288# a_80_n200# a_356_n288# a_n516_n288# a_574_n288#
++ a_n734_n288# a_n138_n200# a_n356_n200# a_n574_n200# a_n80_n288#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X1 a_n574_n200# a_n734_n288# a_n792_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X2 a_734_n200# a_574_n288# a_516_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X3 a_298_n200# a_138_n288# a_80_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X4 a_n138_n200# a_n298_n288# a_n356_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_n356_n200# a_n516_n288# a_n574_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X6 a_516_n200# a_356_n288# a_298_n200# w_n962_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__res_xhigh_po_0p69_S5N9F3 a_n1806_2500# a_n4122_n2932# a_n5280_2500#
++ a_2054_n2932# a_896_n2932# a_4756_2500# a_3598_n2932# a_3212_2500# a_n3736_n2932#
++ a_1668_n2932# a_n1806_n2932# a_5142_n2932# a_896_2500# a_510_n2932# a_n3350_2500#
++ a_n4508_2500# a_3212_n2932# a_n4894_2500# a_1282_2500# w_n5446_n3098# a_4756_n2932#
++ a_2826_2500# a_2826_n2932# a_n2192_n2932# a_n1034_2500# a_n2578_2500# a_n1420_2500#
++ a_n2964_2500# a_n648_n2932# a_n648_2500# a_n5280_n2932# a_n3350_n2932# a_4370_2500#
++ a_1282_n2932# a_124_n2932# a_n1420_n2932# a_n4894_n2932# a_124_2500# a_n2964_n2932#
++ a_n4122_2500# a_2054_2500# a_510_2500# a_n4508_n2932# a_4370_n2932# a_3598_2500#
++ a_3984_2500# a_2440_n2932# a_2440_2500# a_3984_n2932# a_n2192_2500# a_n3736_2500#
++ a_1668_2500# a_n262_n2932# a_n262_2500# a_n1034_n2932# a_5142_2500# a_n2578_n2932#
+X0 a_n2578_n2932# a_n2578_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X1 a_n1420_n2932# a_n1420_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X2 a_n1806_n2932# a_n1806_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X3 a_3212_n2932# a_3212_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X4 a_3598_n2932# a_3598_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X5 a_n2964_n2932# a_n2964_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X6 a_2826_n2932# a_2826_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X7 a_4370_n2932# a_4370_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X8 a_3984_n2932# a_3984_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X9 a_n262_n2932# a_n262_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X10 a_n3350_n2932# a_n3350_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X11 a_n4122_n2932# a_n4122_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X12 a_n3736_n2932# a_n3736_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X13 a_5142_n2932# a_5142_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X14 a_n4894_n2932# a_n4894_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X15 a_1282_n2932# a_1282_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X16 a_4756_n2932# a_4756_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X17 a_124_n2932# a_124_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X18 a_510_n2932# a_510_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X19 a_896_n2932# a_896_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X20 a_n648_n2932# a_n648_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X21 a_n5280_n2932# a_n5280_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X22 a_n4508_n2932# a_n4508_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X23 a_n1034_n2932# a_n1034_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X24 a_n2192_n2932# a_n2192_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X25 a_2054_n2932# a_2054_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X26 a_1668_n2932# a_1668_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+X27 a_2440_n2932# a_2440_2500# w_n5446_n3098# sky130_fd_pr__res_xhigh_po_0p69 l=2.5e+07u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_3YBPVB a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_sc_hvl__schmittbuf_1 A VGND VPWR X VNB VPB
+X0 X a_117_181# VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X1 a_217_207# a_117_181# a_64_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+X2 VPWR A a_231_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X3 VGND A a_217_207# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+X4 a_78_463# VGND VNB sky130_fd_pr__res_generic_nd__hv w=290000u l=1.355e+06u
+X5 a_64_207# VPWR VPB sky130_fd_pr__res_generic_pd__hv w=290000u l=3.11e+06u
+X6 X a_117_181# VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X7 a_231_463# A a_117_181# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 a_231_463# a_117_181# a_78_463# VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X9 a_217_207# A a_117_181# VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=420000u l=500000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPXE a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_PKVMTM w_n308_n458# a_80_n200# a_n138_n200# a_n80_n288#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC w_n308_n458# a_80_n200# a_n138_n200# a_n80_n288#
+X0 a_80_n200# a_n80_n288# a_n138_n200# w_n308_n458# sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__cap_mim_m3_1_WRT4AW c1_n3036_n3000# m3_n3136_n3100#
+X0 c1_n3036_n3000# m3_n3136_n3100# sky130_fd_pr__cap_mim_m3_1 l=3e+07u w=3e+07u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YEUEBV a_n792_n200# a_138_n297# a_n298_n297#
++ a_298_n200# a_356_n297# a_n516_n297# a_574_n297# a_516_n200# a_n734_n297# a_734_n200#
++ a_n80_n297# a_80_n200# a_n138_n200# a_n356_n200# a_n574_n200# w_n992_n497#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X1 a_n574_n200# a_n734_n297# a_n792_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X2 a_734_n200# a_574_n297# a_516_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X3 a_298_n200# a_138_n297# a_80_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X4 a_n138_n200# a_n298_n297# a_n356_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X5 a_n356_n200# a_n516_n297# a_n574_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+X6 a_516_n200# a_356_n297# a_298_n200# w_n992_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_pr__pfet_g5v0d10v5_YUHPBG a_n80_n297# a_80_n200# w_n338_n497# a_n138_n200#
+X0 a_80_n200# a_n80_n297# a_n138_n200# w_n338_n497# sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=2e+06u l=800000u
+.ends
+
+.subckt sky130_fd_sc_hvl__inv_8 A VGND VPWR Y VNB VPB
+X0 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X1 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X2 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X3 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X4 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X5 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X6 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X7 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X8 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X9 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X10 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X11 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X12 VPWR A Y VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X13 Y A VPWR VPB sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X14 VGND A Y VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+X15 Y A VGND VNB sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=750000u l=500000u
+.ends
+
+.subckt example_por vdd3v3 vss porb_h por_l porb_l vdd1v8
+Xsky130_fd_pr__cap_mim_m3_2_W5U4AW_0 vss sky130_fd_sc_hvl__schmittbuf_1_0/A sky130_fd_pr__cap_mim_m3_2_W5U4AW
+Xsky130_fd_sc_hvl__buf_8_1 sky130_fd_sc_hvl__inv_8_0/A vss vdd1v8 porb_l vss vdd1v8
++ sky130_fd_sc_hvl__buf_8
+Xsky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0 m1_502_7653# m1_502_7653# m1_502_7653# m1_502_7653#
++ vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653# vdd3v3 m1_502_7653# m1_502_7653# m1_502_7653#
++ m1_502_7653# vdd3v3 vdd3v3 vdd3v3 m1_502_7653# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ
+Xsky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0 m1_721_6815# vss m1_721_6815# vss vss m1_721_6815#
++ m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# m1_721_6815# vss
++ m1_721_6815# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_TGFUGS
+Xsky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0 li_3322_5813# li_1391_165# vss li_7567_165#
++ li_6023_165# vdd3v3 li_9111_165# li_8726_5813# li_1391_165# li_6795_165# li_3707_165#
++ vss li_6410_5813# li_6023_165# li_1778_5813# li_1006_5813# li_8339_165# vss li_6410_5813#
++ vss li_9883_165# li_7954_5813# li_8339_165# li_2935_165# li_4094_5813# li_2550_5813#
++ li_4094_5813# li_2550_5813# li_4479_165# li_4866_5813# vss li_2163_165# li_9498_5813#
++ li_6795_165# li_5251_165# li_3707_165# li_619_165# li_5638_5813# li_2163_165# li_1006_5813#
++ li_7182_5813# li_5638_5813# li_619_165# li_9883_165# li_8726_5813# li_9498_5813#
++ li_7567_165# li_7954_5813# li_9111_165# li_3322_5813# li_1778_5813# li_7182_5813#
++ li_5251_165# li_4866_5813# li_4479_165# vss li_2935_165# sky130_fd_pr__res_xhigh_po_0p69_S5N9F3
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0 m1_185_6573# m1_721_6815# vdd3v3 m1_2993_7658#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_sc_hvl__schmittbuf_1_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss vdd3v3 sky130_fd_sc_hvl__inv_8_0/A
++ vss vdd3v3 sky130_fd_sc_hvl__schmittbuf_1
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1 m1_2756_6573# m1_4283_8081# vdd3v3 m1_2756_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2 m1_2756_6573# sky130_fd_sc_hvl__schmittbuf_1_0/A
++ vdd3v3 m1_6249_7690# sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3 m1_185_6573# m1_502_7653# vdd3v3 m1_185_6573#
++ sky130_fd_pr__pfet_g5v0d10v5_3YBPVB
+Xsky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0 m1_4283_8081# m1_6249_7690# vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YUHPXE
+Xsky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0 vss m1_2756_6573# vss m1_721_6815# sky130_fd_pr__nfet_g5v0d10v5_PKVMTM
+Xsky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1 vss m1_185_6573# vss li_2550_5813# sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC
+Xsky130_fd_pr__cap_mim_m3_1_WRT4AW_0 sky130_fd_sc_hvl__schmittbuf_1_0/A vss sky130_fd_pr__cap_mim_m3_1_WRT4AW
+Xsky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0 vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081#
++ m1_4283_8081# m1_4283_8081# m1_4283_8081# vdd3v3 m1_4283_8081# m1_4283_8081# m1_4283_8081#
++ vdd3v3 m1_4283_8081# vdd3v3 m1_4283_8081# vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YEUEBV
+Xsky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0 m1_502_7653# m1_2993_7658# vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5_YUHPBG
+Xsky130_fd_sc_hvl__inv_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vdd1v8 por_l vss vdd1v8
++ sky130_fd_sc_hvl__inv_8
+Xsky130_fd_sc_hvl__buf_8_0 sky130_fd_sc_hvl__inv_8_0/A vss vdd3v3 porb_h vss vdd3v3
++ sky130_fd_sc_hvl__buf_8
+.ends
+
+.subckt user_analog_proj_example example_por_0/por_l example_por_1/por_l example_por_1/vdd3v3
++ example_por_1/porb_l example_por_0/vdd3v3 example_por_1/porb_h example_por_0/porb_l
++ example_por_0/porb_h VSUBS example_por_0/vdd1v8 example_por_1/vdd1v8
+Xexample_por_0 example_por_0/vdd3v3 VSUBS example_por_0/porb_h example_por_0/por_l
++ example_por_0/porb_l example_por_0/vdd1v8 example_por
+Xexample_por_1 example_por_1/vdd3v3 VSUBS example_por_1/porb_h example_por_1/por_l
++ example_por_1/porb_l example_por_1/vdd1v8 example_por
+.ends
+
+.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[7] io_analog[8] io_analog[9]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i
+Xuser_analog_proj_example_0 io_out[16] io_out[12] vdda1 io_out[11] io_analog[4] gpio_analog[3]
++ io_out[15] gpio_analog[7] vssa1 vccd1 vccd1 user_analog_proj_example
+R0 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R1 io_oeb[15] vssd1 sky130_fd_pr__res_generic_m3 w=560000u l=600000u
+R2 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R3 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 w=560000u l=580000u
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R5 io_oeb[16] vssd1 sky130_fd_pr__res_generic_m3 w=560000u l=310000u
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R7 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 w=560000u l=490000u
+R8 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+R9 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 w=1.1e+07u l=250000u
+.ends
+
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
index e3cbcec..e7f1944 100644
--- a/xschem/user_analog_project_wrapper.sch
+++ b/xschem/user_analog_project_wrapper.sch
@@ -1,27 +1,9 @@
-v {xschem version=2.9.9 file_version=1.2 }
+v {xschem version=3.0.0 file_version=1.2 }
 G {}
 K {}
 V {}
 S {}
 E {}
-N 3830 -460 3830 -390 { lab=vdda1}
-N 3730 -460 3830 -460 { lab=vdda1}
-N 3860 -230 3860 -180 { lab=vssa1}
-N 3770 -180 3860 -180 { lab=vssa1}
-N 3890 -460 3890 -390 { lab=vccd1}
-N 3890 -460 3960 -460 { lab=vccd1}
-N 3890 -130 3890 -60 { lab=vccd1}
-N 3890 -130 3950 -130 { lab=vccd1}
-N 3830 -130 3830 -60 { lab=io_analog[4]}
-N 3790 -130 3830 -130 { lab=io_analog[4]}
-N 3860 100 3860 150 { lab=vssa1}
-N 3800 150 3860 150 { lab=vssa1}
-N 4010 -10 4110 -10 { lab=gpio_analog[7]}
-N 4010 20 4110 20 { lab=io_out[15]}
-N 4010 50 4110 50 { lab=io_out[16]}
-N 4010 -340 4130 -340 { lab=gpio_analog[3]}
-N 4010 -310 4130 -310 { lab=io_out[11]}
-N 4010 -280 4130 -280 { lab=io_out[12]}
 N 3670 300 3670 340 { lab=io_clamp_low[2]}
 N 3670 400 3670 420 { lab=vssa1}
 N 3670 440 3670 460 { lab=io_clamp_high[2]}
@@ -52,7 +34,7 @@
 N 3670 930 3670 940 { lab=vssd1}
 N 4160 710 4160 740 { lab=io_oeb[11]}
 N 4160 800 4160 820 { lab=vssd1}
-N 4160 850 4160 870 { lab=#net1}
+N 4160 850 4160 870 { lab=io_oeb[15]}
 N 4160 930 4160 940 { lab=vssd1}
 N 3630 710 3670 710 { lab=io_oeb[12]}
 N 3630 830 3670 830 { lab=vssd1}
@@ -60,10 +42,16 @@
 N 3630 940 3670 940 { lab=vssd1}
 N 4130 710 4160 710 { lab=io_oeb[11]}
 N 4130 820 4160 820 { lab=vssd1}
-N 4130 850 4160 850 { lab=#net1}
+N 4130 850 4160 850 { lab=io_oeb[15]}
 N 4130 940 4160 940 { lab=vssd1}
-C {example_por.sym} 3860 -310 0 0 {name=x1}
-C {example_por.sym} 3860 20 0 0 {name=x2}
+N 4040 -430 4040 -360 { lab=vccd1}
+N 4040 -430 4110 -430 { lab=vccd1}
+N 4040 -120 4040 -70 { lab=vssa1}
+N 3950 -70 4040 -70 { lab=vssa1}
+N 4180 -240 4340 -240 { lab=io_analog[2]}
+N 4340 -350 4340 -240 { lab=io_analog[2]}
+N 3780 -260 3880 -260 { lab=io_analog[1]}
+N 3780 -140 3880 -140 { lab=io_analog[1]}
 C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1}
 C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2}
 C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1}
@@ -96,18 +84,6 @@
 C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]}
 C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]}
 C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]}
-C {devices/lab_pin.sym} 3730 -460 0 0 {name=l1 sig_type=std_logic lab=vdda1}
-C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1}
-C {devices/lab_pin.sym} 3960 -460 0 1 {name=l3 sig_type=std_logic lab=vccd1}
-C {devices/lab_pin.sym} 3950 -130 0 1 {name=l4 sig_type=std_logic lab=vccd1}
-C {devices/lab_pin.sym} 3790 -130 0 0 {name=l5 sig_type=std_logic lab=io_analog[4]}
-C {devices/lab_pin.sym} 3800 150 0 0 {name=l6 sig_type=std_logic lab=vssa1}
-C {devices/lab_pin.sym} 4130 -340 0 1 {name=l7 sig_type=std_logic lab=gpio_analog[3]}
-C {devices/lab_pin.sym} 4130 -310 0 1 {name=l8 sig_type=std_logic lab=io_out[11]}
-C {devices/lab_pin.sym} 4130 -280 0 1 {name=l9 sig_type=std_logic lab=io_out[12]}
-C {devices/lab_pin.sym} 4110 -10 0 1 {name=l10 sig_type=std_logic lab=gpio_analog[7]}
-C {devices/lab_pin.sym} 4110 20 0 1 {name=l11 sig_type=std_logic lab=io_out[15]}
-C {devices/lab_pin.sym} 4110 50 0 1 {name=l12 sig_type=std_logic lab=io_out[16]}
 C {sky130_fd_pr/res_generic_m1.sym} 3670 370 0 0 {name=R1
 W=11
 L=0.25
@@ -178,3 +154,9 @@
 C {devices/lab_pin.sym} 3630 940 0 0 {name=l30 sig_type=std_logic lab=vssd1}
 C {devices/lab_pin.sym} 4130 820 0 0 {name=l31 sig_type=std_logic lab=vssd1}
 C {devices/lab_pin.sym} 4130 940 0 0 {name=l32 sig_type=std_logic lab=vssd1}
+C {SDC_v2p1.sym} 3820 -280 0 0 {name=X1}
+C {devices/lab_pin.sym} 4110 -430 0 1 {name=l33 sig_type=std_logic lab=vccd1}
+C {devices/lab_pin.sym} 3950 -70 0 0 {name=l34 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4340 -350 0 0 {name=l35 sig_type=std_logic lab=io_analog[2]}
+C {devices/lab_pin.sym} 3780 -260 0 0 {name=l1 sig_type=std_logic lab=io_analog[1]}
+C {devices/lab_pin.sym} 3780 -140 0 0 {name=l2 sig_type=std_logic lab=io_analog[0]}
diff --git a/xschem/user_analog_project_wrapper.spice b/xschem/user_analog_project_wrapper.spice
index 0dc2d20..458490a 100644
--- a/xschem/user_analog_project_wrapper.spice
+++ b/xschem/user_analog_project_wrapper.spice
@@ -1,88 +1,19 @@
-.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
-+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
-+ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
-+ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
-+ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
-+ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
-+ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
-+ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
-+ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
-+ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
-+ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
-+ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
-+ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
-+ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
-+ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
-+ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
-+ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
-+ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
-+ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
-+ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
-+ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
-+ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
-+ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
-+ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
-+ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
-+ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
-+ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
-+ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
-+ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
-+ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
-+ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
-+ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
-+ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
-+ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
-+ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
-+ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
-+ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
-+ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
-+ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
-+ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
-+ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
-+ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
-+ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
-+ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
-+ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
-+ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
-+ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
-+ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
-+ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
-+ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
-+ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0] io_in[26]
-+ io_in[25] io_in[24] io_in[23] io_in[22] io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15]
-+ io_in[14] io_in[13] io_in[12] io_in[11] io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4]
-+ io_in[3] io_in[2] io_in[1] io_in[0] io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22]
-+ io_in_3v3[21] io_in_3v3[20] io_in_3v3[19] io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14]
-+ io_in_3v3[13] io_in_3v3[12] io_in_3v3[11] io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6]
-+ io_in_3v3[5] io_in_3v3[4] io_in_3v3[3] io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] user_clock2 io_out[26] io_out[25]
-+ io_out[24] io_out[23] io_out[22] io_out[21] io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15]
-+ io_out[14] io_out[13] io_out[12] io_out[11] io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5]
-+ io_out[4] io_out[3] io_out[2] io_out[1] io_out[0] io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22]
-+ io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17] io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12]
-+ io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7] io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2]
-+ io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16] gpio_analog[15] gpio_analog[14] gpio_analog[13]
-+ gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9] gpio_analog[8] gpio_analog[7] gpio_analog[6]
-+ gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2] gpio_analog[1] gpio_analog[0] gpio_noesd[17]
-+ gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13] gpio_noesd[12] gpio_noesd[11] gpio_noesd[10]
-+ gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5] gpio_noesd[4] gpio_noesd[3] gpio_noesd[2]
-+ gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8] io_analog[7] io_analog[6] io_analog[5]
-+ io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0] io_clamp_high[2] io_clamp_high[1]
-+ io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_irq[2] user_irq[1] user_irq[0] la_oenb[127]
-+ la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120] la_oenb[119]
-+ la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112] la_oenb[111]
-+ la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104] la_oenb[103]
-+ la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95] la_oenb[94]
-+ la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86] la_oenb[85]
-+ la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77] la_oenb[76]
-+ la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68] la_oenb[67]
-+ la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59] la_oenb[58]
-+ la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50] la_oenb[49]
-+ la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41] la_oenb[40]
-+ la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32] la_oenb[31]
-+ la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23] la_oenb[22]
-+ la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14] la_oenb[13]
-+ la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5] la_oenb[4]
-+ la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0]
+**.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
+*+ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0] wbs_ack_o
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0] user_clock2
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0] io_clamp_high[2],io_clamp_high[1],io_clamp_high[0] io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*+ user_irq[2],user_irq[1],user_irq[0]
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
 *.iopin vdda1
 *.iopin vdda2
 *.iopin vssa1
@@ -128,75 +59,198 @@
 *.opin user_irq[2],user_irq[1],user_irq[0]
 *.ipin
 *+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
-x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
-x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
-R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R3 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m1 W=1 L=1 m=1
-R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R8 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R10 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m1 W=1 L=1 m=1
-R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
-R12 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=11 L=0.25 m=1
+R8 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=0.56 L=0.49 m=1
+R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=0.56 L=0.31 m=1
+R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=0.56 L=0.58 m=1
+R12 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=0.56 L=0.6 m=1
+X1 io_analog[1] io_analog[0] io_analog[2] vccd1 vssa1 SDC_v2p1
+**.ends
+
+* expanding   symbol:  SDC_v2p1.sym # of pins=5
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/SDC_v2p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/SDC_v2p1.sch
+.subckt SDC_v2p1  SENS_IN REF_IN DOUT VDD VSS
+*.iopin VDD
+*.iopin VSS
+*.ipin SENS_IN
+*.ipin REF_IN
+*.opin DOUT
+XOSC_SENS SENS_IN N1_S N2_S VDD VSS net1 OSC_v3p2
+XOSC_REF REF_IN N1_R N2_R VDD VSS REF_IN OSC_v3p2
+XDFF N2_S N2_R DOUT NDOUT VDD VSS DFF_v4p1
+XPG SENS_IN DOUT net1 VDD VSS PASSGATE_v1p2
 .ends
 
-* expanding   symbol:  example_por.sym # of pins=6
-* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
-* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
-.subckt example_por  vdd3v3 vdd1v8 porb_h porb_l por_l vss
-*.iopin vdd3v3
-*.iopin vss
-*.opin porb_h
-*.opin porb_l
-*.opin por_l
-*.iopin vdd1v8
-XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
-XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
-XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1 
-XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
-XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1 
-XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
-XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
-+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
-+ sa=0 sb=0 sd=0 mult=1 m=1 
-XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
-+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
-+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
-XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
-x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
-x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
-x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
-x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
+
+* expanding   symbol:  OSC_v3p2.sym # of pins=6
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/OSC_v3p2.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/OSC_v3p2.sch
+.subckt OSC_v3p2  SENS_IN N1 N2 VDD VSS CON_CV
+*.ipin SENS_IN
+*.iopin VDD
+*.iopin VSS
+*.opin N1
+*.opin N2
+*.iopin CON_CV
+XST1 SENS_IN VDD VSS N1 N1 INVandCAP_v1p1
+XST2 N1 VDD VSS net1 net1 INVandCAP_v1p1
+XST3 net1 VDD VSS SENS_IN CON_CV INVandCAP_v1p1
+XBUFFS net1 N2 VDD VSS BUFFMIN_v1p1
 .ends
 
-** flattened .save nodes
+
+* expanding   symbol:  DFF_v4p1.sym # of pins=6
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/DFF_v4p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/DFF_v4p1.sch
+.subckt DFF_v4p1  IN CLK D ND VDD GND
+*.ipin IN
+*.ipin CLK
+*.iopin VDD
+*.iopin GND
+*.opin ND
+*.opin D
+XMN_NIN NDIFF IN GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NINCLK NDIFF CLK net1 VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN net1 IN VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_NIN1 PDIFF NDIFF GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NINCLK1 PDIFF CLK net2 VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN1 net2 NDIFF VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMN_NIN2 net3 CLK GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT ND PDIFF net3 GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT1 D NDIFF net4 GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT2 D ND GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN2 D ND VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_POUTT3 ND D GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMP_NIN3 ND D VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMN_NIN3 net4 CLK GND GND sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+.ends
+
+
+* expanding   symbol:  PASSGATE_v1p2.sym # of pins=5
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/PASSGATE_v1p2.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/PASSGATE_v1p2.sch
+.subckt PASSGATE_v1p2  VIN CTR VOUT VDD VSS
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.ipin CTR
+*.opin VOUT
+XMNSW VOUT CTR VIN VSS sky130_fd_pr__nfet_01v8 L=0.15 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XMPSW VOUT net1 VIN VDD sky130_fd_pr__pfet_01v8 L=0.15 W=6 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+X1 CTR net1 VDD VSS INVMIN_v1p1
+.ends
+
+
+* expanding   symbol:  INVandCAP_v1p1.sym # of pins=5
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVandCAP_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVandCAP_v1p1.sch
+.subckt INVandCAP_v1p1  VIN VDD VSS VOUT CON_CV
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.opin VOUT
+*.iopin CON_CV
+XINV_OSC VIN VOUT VDD VSS INV_v1p1
+XCN CON_CV VOUT VSS CAPOSC_v1p1
+.ends
+
+
+* expanding   symbol:  BUFFMIN_v1p1.sym # of pins=4
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/BUFFMIN_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/BUFFMIN_v1p1.sch
+.subckt BUFFMIN_v1p1  VIN VOUT VDD VSS
+*.iopin VDD
+*.iopin VSS
+*.ipin VIN
+*.opin VOUT
+X1 VIN net1 VDD VSS INVMIN_v1p1
+X2 net1 VOUT VDD VSS INVMIN_v1p1
+.ends
+
+
+* expanding   symbol:  INVMIN_v1p1.sym # of pins=4
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVMIN_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INVMIN_v1p1.sch
+.subckt INVMIN_v1p1  VIN VOUT VDD VSS
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.opin VOUT
+XM1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM2 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+.ends
+
+
+* expanding   symbol:  INV_v1p1.sym # of pins=4
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INV_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/INV_v1p1.sch
+.subckt INV_v1p1  VIN VOUT VDD VSS
+*.ipin VIN
+*.iopin VDD
+*.iopin VSS
+*.opin VOUT
+XM1 VOUT VIN VSS VSS sky130_fd_pr__nfet_01v8 L=0.15 W=2 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+XM2 VOUT VIN VDD VDD sky130_fd_pr__pfet_01v8 L=0.15 W=6 nf=6 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1
+.ends
+
+
+* expanding   symbol:  CAPOSC_v1p1.sym # of pins=3
+* sym_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/CAPOSC_v1p1.sym
+* sch_path: /home/jorge/Documents/Postdoc/sky130_work_jm/SDC_SKY130_V1/CAPOSC_v1p1.sch
+.subckt CAPOSC_v1p1  TOP_V TOP_B BOT
+*.iopin TOP_V
+*.iopin TOP_B
+*.iopin BOT
+XC1_V TOP_V BOT sky130_fd_pr__cap_mim_m3_1 W=3.2 L=22.2 MF=1 m=1
+XC2_V TOP_V BOT sky130_fd_pr__cap_mim_m3_2 W=3.2 L=22.2 MF=1 m=1
+XC1_B TOP_B BOT sky130_fd_pr__cap_mim_m3_1 W=18.8 L=22.2 MF=1 m=1
+XC2_B TOP_B BOT sky130_fd_pr__cap_mim_m3_2 W=18.8 L=22.2 MF=1 m=1
+.ends
+
 .end
diff --git a/xschem/user_analog_project_wrapper_expor.sch b/xschem/user_analog_project_wrapper_expor.sch
new file mode 100644
index 0000000..8949c0c
--- /dev/null
+++ b/xschem/user_analog_project_wrapper_expor.sch
@@ -0,0 +1,180 @@
+v {xschem version=3.0.0 file_version=1.2 }
+G {}
+K {}
+V {}
+S {}
+E {}
+N 3830 -460 3830 -390 { lab=vdda1}
+N 3730 -460 3830 -460 { lab=vdda1}
+N 3860 -230 3860 -180 { lab=vssa1}
+N 3770 -180 3860 -180 { lab=vssa1}
+N 3890 -460 3890 -390 { lab=vccd1}
+N 3890 -460 3960 -460 { lab=vccd1}
+N 3890 -130 3890 -60 { lab=vccd1}
+N 3890 -130 3950 -130 { lab=vccd1}
+N 3830 -130 3830 -60 { lab=io_analog[4]}
+N 3790 -130 3830 -130 { lab=io_analog[4]}
+N 3860 100 3860 150 { lab=vssa1}
+N 3800 150 3860 150 { lab=vssa1}
+N 4010 -10 4110 -10 { lab=gpio_analog[7]}
+N 4010 20 4110 20 { lab=io_out[15]}
+N 4010 50 4110 50 { lab=io_out[16]}
+N 4010 -340 4130 -340 { lab=gpio_analog[3]}
+N 4010 -310 4130 -310 { lab=io_out[11]}
+N 4010 -280 4130 -280 { lab=io_out[12]}
+N 3670 300 3670 340 { lab=io_clamp_low[2]}
+N 3670 400 3670 420 { lab=vssa1}
+N 3670 440 3670 460 { lab=io_clamp_high[2]}
+N 3670 520 3670 530 { lab=vssa1}
+N 3670 570 3670 590 { lab=io_clamp_low[1]}
+N 3670 650 3670 670 { lab=vssa1}
+N 4160 300 4160 330 { lab=io_clamp_high[1]}
+N 4160 390 4160 410 { lab=vssa1}
+N 4160 440 4160 460 { lab=io_clamp_low[0]}
+N 4160 520 4160 530 { lab=vssa1}
+N 4160 550 4160 560 { lab=io_clamp_high[0]}
+N 4160 620 4160 640 { lab=io_analog[4]}
+N 3630 300 3670 300 { lab=io_clamp_low[2]}
+N 3630 420 3670 420 { lab=vssa1}
+N 3630 440 3670 440 { lab=io_clamp_high[2]}
+N 3630 530 3670 530 { lab=vssa1}
+N 3630 570 3670 570 { lab=io_clamp_low[1]}
+N 3630 670 3670 670 { lab=vssa1}
+N 4130 300 4160 300 { lab=io_clamp_high[1]}
+N 4130 410 4160 410 { lab=vssa1}
+N 4130 440 4160 440 { lab=io_clamp_low[0]}
+N 4130 530 4160 530 { lab=vssa1}
+N 4130 550 4160 550 { lab=io_clamp_high[0]}
+N 4130 640 4160 640 { lab=io_analog[4]}
+N 3670 710 3670 750 { lab=io_oeb[12]}
+N 3670 810 3670 830 { lab=vssd1}
+N 3670 850 3670 870 { lab=io_oeb[16]}
+N 3670 930 3670 940 { lab=vssd1}
+N 4160 710 4160 740 { lab=io_oeb[11]}
+N 4160 800 4160 820 { lab=vssd1}
+N 4160 850 4160 870 { lab=#net1}
+N 4160 930 4160 940 { lab=vssd1}
+N 3630 710 3670 710 { lab=io_oeb[12]}
+N 3630 830 3670 830 { lab=vssd1}
+N 3630 850 3670 850 { lab=io_oeb[16]}
+N 3630 940 3670 940 { lab=vssd1}
+N 4130 710 4160 710 { lab=io_oeb[11]}
+N 4130 820 4160 820 { lab=vssd1}
+N 4130 850 4160 850 { lab=#net1}
+N 4130 940 4160 940 { lab=vssd1}
+C {example_por.sym} 3860 -310 0 0 {name=x1}
+C {example_por.sym} 3860 20 0 0 {name=x2}
+C {devices/iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1}
+C {devices/iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2}
+C {devices/iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1}
+C {devices/iopin.sym} 3240 -380 0 0 {name=p4 lab=vssa2}
+C {devices/iopin.sym} 3240 -350 0 0 {name=p5 lab=vccd1}
+C {devices/iopin.sym} 3240 -320 0 0 {name=p6 lab=vccd2}
+C {devices/iopin.sym} 3240 -290 0 0 {name=p7 lab=vssd1}
+C {devices/iopin.sym} 3240 -260 0 0 {name=p8 lab=vssd2}
+C {devices/ipin.sym} 3290 -190 0 0 {name=p9 lab=wb_clk_i}
+C {devices/ipin.sym} 3290 -160 0 0 {name=p10 lab=wb_rst_i}
+C {devices/ipin.sym} 3290 -130 0 0 {name=p11 lab=wbs_stb_i}
+C {devices/ipin.sym} 3290 -100 0 0 {name=p12 lab=wbs_cyc_i}
+C {devices/ipin.sym} 3290 -70 0 0 {name=p13 lab=wbs_we_i}
+C {devices/ipin.sym} 3290 -40 0 0 {name=p14 lab=wbs_sel_i[3:0]}
+C {devices/ipin.sym} 3290 -10 0 0 {name=p15 lab=wbs_dat_i[31:0]}
+C {devices/ipin.sym} 3290 20 0 0 {name=p16 lab=wbs_adr_i[31:0]}
+C {devices/opin.sym} 3280 80 0 0 {name=p17 lab=wbs_ack_o}
+C {devices/opin.sym} 3280 110 0 0 {name=p18 lab=wbs_dat_o[31:0]}
+C {devices/ipin.sym} 3290 150 0 0 {name=p19 lab=la_data_in[127:0]}
+C {devices/opin.sym} 3280 180 0 0 {name=p20 lab=la_data_out[127:0]}
+C {devices/ipin.sym} 3290 260 0 0 {name=p21 lab=io_in[26:0]}
+C {devices/ipin.sym} 3290 290 0 0 {name=p22 lab=io_in_3v3[26:0]}
+C {devices/ipin.sym} 3280 570 0 0 {name=p23 lab=user_clock2}
+C {devices/opin.sym} 3280 320 0 0 {name=p24 lab=io_out[26:0]}
+C {devices/opin.sym} 3280 350 0 0 {name=p25 lab=io_oeb[26:0]}
+C {devices/iopin.sym} 3250 410 0 0 {name=p26 lab=gpio_analog[17:0]}
+C {devices/iopin.sym} 3250 440 0 0 {name=p27 lab=gpio_noesd[17:0]}
+C {devices/iopin.sym} 3250 470 0 0 {name=p29 lab=io_analog[10:0]}
+C {devices/iopin.sym} 3250 500 0 0 {name=p30 lab=io_clamp_high[2:0]}
+C {devices/iopin.sym} 3250 530 0 0 {name=p31 lab=io_clamp_low[2:0]}
+C {devices/opin.sym} 3270 600 0 0 {name=p32 lab=user_irq[2:0]}
+C {devices/ipin.sym} 3290 210 0 0 {name=p28 lab=la_oenb[127:0]}
+C {devices/lab_pin.sym} 3730 -460 0 0 {name=l1 sig_type=std_logic lab=vdda1}
+C {devices/lab_pin.sym} 3770 -180 0 0 {name=l2 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3960 -460 0 1 {name=l3 sig_type=std_logic lab=vccd1}
+C {devices/lab_pin.sym} 3950 -130 0 1 {name=l4 sig_type=std_logic lab=vccd1}
+C {devices/lab_pin.sym} 3790 -130 0 0 {name=l5 sig_type=std_logic lab=io_analog[4]}
+C {devices/lab_pin.sym} 3800 150 0 0 {name=l6 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 -340 0 1 {name=l7 sig_type=std_logic lab=gpio_analog[3]}
+C {devices/lab_pin.sym} 4130 -310 0 1 {name=l8 sig_type=std_logic lab=io_out[11]}
+C {devices/lab_pin.sym} 4130 -280 0 1 {name=l9 sig_type=std_logic lab=io_out[12]}
+C {devices/lab_pin.sym} 4110 -10 0 1 {name=l10 sig_type=std_logic lab=gpio_analog[7]}
+C {devices/lab_pin.sym} 4110 20 0 1 {name=l11 sig_type=std_logic lab=io_out[15]}
+C {devices/lab_pin.sym} 4110 50 0 1 {name=l12 sig_type=std_logic lab=io_out[16]}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 370 0 0 {name=R1
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 490 0 0 {name=R2
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 620 0 0 {name=R4
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 360 0 0 {name=R5
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 490 0 0 {name=R6
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 590 0 0 {name=R7
+W=11
+L=0.25
+model=res_generic_m3
+mult=1}
+C {devices/lab_pin.sym} 3630 300 0 0 {name=l13 sig_type=std_logic lab=io_clamp_low[2]}
+C {devices/lab_pin.sym} 3630 440 0 0 {name=l14 sig_type=std_logic lab=io_clamp_high[2]}
+C {devices/lab_pin.sym} 3630 570 0 0 {name=l15 sig_type=std_logic lab=io_clamp_low[1]}
+C {devices/lab_pin.sym} 4130 300 0 0 {name=l16 sig_type=std_logic lab=io_clamp_high[1]}
+C {devices/lab_pin.sym} 4130 440 0 0 {name=l17 sig_type=std_logic lab=io_clamp_low[0]}
+C {devices/lab_pin.sym} 3630 420 0 0 {name=l18 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3630 530 0 0 {name=l19 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 410 0 0 {name=l20 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 530 0 0 {name=l21 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 3630 670 0 0 {name=l22 sig_type=std_logic lab=vssa1}
+C {devices/lab_pin.sym} 4130 550 0 0 {name=l23 sig_type=std_logic lab=io_clamp_high[0]}
+C {devices/lab_pin.sym} 4130 640 0 0 {name=l24 sig_type=std_logic lab=io_analog[4]}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 780 0 0 {name=R8
+W=0.56
+L=0.49
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 3670 900 0 0 {name=R9
+W=0.56
+L=0.31
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 770 0 0 {name=R11
+W=0.56
+L=0.58
+model=res_generic_m3
+mult=1}
+C {sky130_fd_pr/res_generic_m1.sym} 4160 900 0 0 {name=R12
+W=0.56
+L=0.6
+model=res_generic_m3
+mult=1}
+C {devices/lab_pin.sym} 4130 850 0 0 {name=l25 sig_type=std_logic lab=io_oeb[15]}
+C {devices/lab_pin.sym} 3630 850 0 0 {name=l26 sig_type=std_logic lab=io_oeb[16]}
+C {devices/lab_pin.sym} 4130 710 0 0 {name=l27 sig_type=std_logic lab=io_oeb[11]}
+C {devices/lab_pin.sym} 3630 710 0 0 {name=l28 sig_type=std_logic lab=io_oeb[12]}
+C {devices/lab_pin.sym} 3630 830 0 0 {name=l29 sig_type=std_logic lab=vssd1}
+C {devices/lab_pin.sym} 3630 940 0 0 {name=l30 sig_type=std_logic lab=vssd1}
+C {devices/lab_pin.sym} 4130 820 0 0 {name=l31 sig_type=std_logic lab=vssd1}
+C {devices/lab_pin.sym} 4130 940 0 0 {name=l32 sig_type=std_logic lab=vssd1}
diff --git a/xschem/user_analog_project_wrapper_expor.spice b/xschem/user_analog_project_wrapper_expor.spice
new file mode 100644
index 0000000..0dc2d20
--- /dev/null
+++ b/xschem/user_analog_project_wrapper_expor.spice
@@ -0,0 +1,202 @@
+.subckt user_analog_project_wrapper vdda1 vdda2 vssa1 vssa2 vccd1 vccd2 vssd1 vssd2 wb_clk_i
++ wb_rst_i wbs_stb_i wbs_cyc_i wbs_we_i wbs_sel_i[3] wbs_sel_i[2] wbs_sel_i[1] wbs_sel_i[0] wbs_dat_i[31]
++ wbs_dat_i[30] wbs_dat_i[29] wbs_dat_i[28] wbs_dat_i[27] wbs_dat_i[26] wbs_dat_i[25] wbs_dat_i[24] wbs_dat_i[23]
++ wbs_dat_i[22] wbs_dat_i[21] wbs_dat_i[20] wbs_dat_i[19] wbs_dat_i[18] wbs_dat_i[17] wbs_dat_i[16] wbs_dat_i[15]
++ wbs_dat_i[14] wbs_dat_i[13] wbs_dat_i[12] wbs_dat_i[11] wbs_dat_i[10] wbs_dat_i[9] wbs_dat_i[8] wbs_dat_i[7]
++ wbs_dat_i[6] wbs_dat_i[5] wbs_dat_i[4] wbs_dat_i[3] wbs_dat_i[2] wbs_dat_i[1] wbs_dat_i[0] wbs_adr_i[31]
++ wbs_adr_i[30] wbs_adr_i[29] wbs_adr_i[28] wbs_adr_i[27] wbs_adr_i[26] wbs_adr_i[25] wbs_adr_i[24] wbs_adr_i[23]
++ wbs_adr_i[22] wbs_adr_i[21] wbs_adr_i[20] wbs_adr_i[19] wbs_adr_i[18] wbs_adr_i[17] wbs_adr_i[16] wbs_adr_i[15]
++ wbs_adr_i[14] wbs_adr_i[13] wbs_adr_i[12] wbs_adr_i[11] wbs_adr_i[10] wbs_adr_i[9] wbs_adr_i[8] wbs_adr_i[7]
++ wbs_adr_i[6] wbs_adr_i[5] wbs_adr_i[4] wbs_adr_i[3] wbs_adr_i[2] wbs_adr_i[1] wbs_adr_i[0] wbs_ack_o
++ wbs_dat_o[31] wbs_dat_o[30] wbs_dat_o[29] wbs_dat_o[28] wbs_dat_o[27] wbs_dat_o[26] wbs_dat_o[25] wbs_dat_o[24]
++ wbs_dat_o[23] wbs_dat_o[22] wbs_dat_o[21] wbs_dat_o[20] wbs_dat_o[19] wbs_dat_o[18] wbs_dat_o[17] wbs_dat_o[16]
++ wbs_dat_o[15] wbs_dat_o[14] wbs_dat_o[13] wbs_dat_o[12] wbs_dat_o[11] wbs_dat_o[10] wbs_dat_o[9] wbs_dat_o[8]
++ wbs_dat_o[7] wbs_dat_o[6] wbs_dat_o[5] wbs_dat_o[4] wbs_dat_o[3] wbs_dat_o[2] wbs_dat_o[1] wbs_dat_o[0]
++ la_data_in[127] la_data_in[126] la_data_in[125] la_data_in[124] la_data_in[123] la_data_in[122] la_data_in[121]
++ la_data_in[120] la_data_in[119] la_data_in[118] la_data_in[117] la_data_in[116] la_data_in[115] la_data_in[114]
++ la_data_in[113] la_data_in[112] la_data_in[111] la_data_in[110] la_data_in[109] la_data_in[108] la_data_in[107]
++ la_data_in[106] la_data_in[105] la_data_in[104] la_data_in[103] la_data_in[102] la_data_in[101] la_data_in[100]
++ la_data_in[99] la_data_in[98] la_data_in[97] la_data_in[96] la_data_in[95] la_data_in[94] la_data_in[93]
++ la_data_in[92] la_data_in[91] la_data_in[90] la_data_in[89] la_data_in[88] la_data_in[87] la_data_in[86]
++ la_data_in[85] la_data_in[84] la_data_in[83] la_data_in[82] la_data_in[81] la_data_in[80] la_data_in[79]
++ la_data_in[78] la_data_in[77] la_data_in[76] la_data_in[75] la_data_in[74] la_data_in[73] la_data_in[72]
++ la_data_in[71] la_data_in[70] la_data_in[69] la_data_in[68] la_data_in[67] la_data_in[66] la_data_in[65]
++ la_data_in[64] la_data_in[63] la_data_in[62] la_data_in[61] la_data_in[60] la_data_in[59] la_data_in[58]
++ la_data_in[57] la_data_in[56] la_data_in[55] la_data_in[54] la_data_in[53] la_data_in[52] la_data_in[51]
++ la_data_in[50] la_data_in[49] la_data_in[48] la_data_in[47] la_data_in[46] la_data_in[45] la_data_in[44]
++ la_data_in[43] la_data_in[42] la_data_in[41] la_data_in[40] la_data_in[39] la_data_in[38] la_data_in[37]
++ la_data_in[36] la_data_in[35] la_data_in[34] la_data_in[33] la_data_in[32] la_data_in[31] la_data_in[30]
++ la_data_in[29] la_data_in[28] la_data_in[27] la_data_in[26] la_data_in[25] la_data_in[24] la_data_in[23]
++ la_data_in[22] la_data_in[21] la_data_in[20] la_data_in[19] la_data_in[18] la_data_in[17] la_data_in[16]
++ la_data_in[15] la_data_in[14] la_data_in[13] la_data_in[12] la_data_in[11] la_data_in[10] la_data_in[9]
++ la_data_in[8] la_data_in[7] la_data_in[6] la_data_in[5] la_data_in[4] la_data_in[3] la_data_in[2] la_data_in[1]
++ la_data_in[0] la_data_out[127] la_data_out[126] la_data_out[125] la_data_out[124] la_data_out[123]
++ la_data_out[122] la_data_out[121] la_data_out[120] la_data_out[119] la_data_out[118] la_data_out[117]
++ la_data_out[116] la_data_out[115] la_data_out[114] la_data_out[113] la_data_out[112] la_data_out[111]
++ la_data_out[110] la_data_out[109] la_data_out[108] la_data_out[107] la_data_out[106] la_data_out[105]
++ la_data_out[104] la_data_out[103] la_data_out[102] la_data_out[101] la_data_out[100] la_data_out[99] la_data_out[98]
++ la_data_out[97] la_data_out[96] la_data_out[95] la_data_out[94] la_data_out[93] la_data_out[92] la_data_out[91]
++ la_data_out[90] la_data_out[89] la_data_out[88] la_data_out[87] la_data_out[86] la_data_out[85] la_data_out[84]
++ la_data_out[83] la_data_out[82] la_data_out[81] la_data_out[80] la_data_out[79] la_data_out[78] la_data_out[77]
++ la_data_out[76] la_data_out[75] la_data_out[74] la_data_out[73] la_data_out[72] la_data_out[71] la_data_out[70]
++ la_data_out[69] la_data_out[68] la_data_out[67] la_data_out[66] la_data_out[65] la_data_out[64] la_data_out[63]
++ la_data_out[62] la_data_out[61] la_data_out[60] la_data_out[59] la_data_out[58] la_data_out[57] la_data_out[56]
++ la_data_out[55] la_data_out[54] la_data_out[53] la_data_out[52] la_data_out[51] la_data_out[50] la_data_out[49]
++ la_data_out[48] la_data_out[47] la_data_out[46] la_data_out[45] la_data_out[44] la_data_out[43] la_data_out[42]
++ la_data_out[41] la_data_out[40] la_data_out[39] la_data_out[38] la_data_out[37] la_data_out[36] la_data_out[35]
++ la_data_out[34] la_data_out[33] la_data_out[32] la_data_out[31] la_data_out[30] la_data_out[29] la_data_out[28]
++ la_data_out[27] la_data_out[26] la_data_out[25] la_data_out[24] la_data_out[23] la_data_out[22] la_data_out[21]
++ la_data_out[20] la_data_out[19] la_data_out[18] la_data_out[17] la_data_out[16] la_data_out[15] la_data_out[14]
++ la_data_out[13] la_data_out[12] la_data_out[11] la_data_out[10] la_data_out[9] la_data_out[8] la_data_out[7]
++ la_data_out[6] la_data_out[5] la_data_out[4] la_data_out[3] la_data_out[2] la_data_out[1] la_data_out[0] io_in[26]
++ io_in[25] io_in[24] io_in[23] io_in[22] io_in[21] io_in[20] io_in[19] io_in[18] io_in[17] io_in[16] io_in[15]
++ io_in[14] io_in[13] io_in[12] io_in[11] io_in[10] io_in[9] io_in[8] io_in[7] io_in[6] io_in[5] io_in[4]
++ io_in[3] io_in[2] io_in[1] io_in[0] io_in_3v3[26] io_in_3v3[25] io_in_3v3[24] io_in_3v3[23] io_in_3v3[22]
++ io_in_3v3[21] io_in_3v3[20] io_in_3v3[19] io_in_3v3[18] io_in_3v3[17] io_in_3v3[16] io_in_3v3[15] io_in_3v3[14]
++ io_in_3v3[13] io_in_3v3[12] io_in_3v3[11] io_in_3v3[10] io_in_3v3[9] io_in_3v3[8] io_in_3v3[7] io_in_3v3[6]
++ io_in_3v3[5] io_in_3v3[4] io_in_3v3[3] io_in_3v3[2] io_in_3v3[1] io_in_3v3[0] user_clock2 io_out[26] io_out[25]
++ io_out[24] io_out[23] io_out[22] io_out[21] io_out[20] io_out[19] io_out[18] io_out[17] io_out[16] io_out[15]
++ io_out[14] io_out[13] io_out[12] io_out[11] io_out[10] io_out[9] io_out[8] io_out[7] io_out[6] io_out[5]
++ io_out[4] io_out[3] io_out[2] io_out[1] io_out[0] io_oeb[26] io_oeb[25] io_oeb[24] io_oeb[23] io_oeb[22]
++ io_oeb[21] io_oeb[20] io_oeb[19] io_oeb[18] io_oeb[17] io_oeb[16] io_oeb[15] io_oeb[14] io_oeb[13] io_oeb[12]
++ io_oeb[11] io_oeb[10] io_oeb[9] io_oeb[8] io_oeb[7] io_oeb[6] io_oeb[5] io_oeb[4] io_oeb[3] io_oeb[2]
++ io_oeb[1] io_oeb[0] gpio_analog[17] gpio_analog[16] gpio_analog[15] gpio_analog[14] gpio_analog[13]
++ gpio_analog[12] gpio_analog[11] gpio_analog[10] gpio_analog[9] gpio_analog[8] gpio_analog[7] gpio_analog[6]
++ gpio_analog[5] gpio_analog[4] gpio_analog[3] gpio_analog[2] gpio_analog[1] gpio_analog[0] gpio_noesd[17]
++ gpio_noesd[16] gpio_noesd[15] gpio_noesd[14] gpio_noesd[13] gpio_noesd[12] gpio_noesd[11] gpio_noesd[10]
++ gpio_noesd[9] gpio_noesd[8] gpio_noesd[7] gpio_noesd[6] gpio_noesd[5] gpio_noesd[4] gpio_noesd[3] gpio_noesd[2]
++ gpio_noesd[1] gpio_noesd[0] io_analog[10] io_analog[9] io_analog[8] io_analog[7] io_analog[6] io_analog[5]
++ io_analog[4] io_analog[3] io_analog[2] io_analog[1] io_analog[0] io_clamp_high[2] io_clamp_high[1]
++ io_clamp_high[0] io_clamp_low[2] io_clamp_low[1] io_clamp_low[0] user_irq[2] user_irq[1] user_irq[0] la_oenb[127]
++ la_oenb[126] la_oenb[125] la_oenb[124] la_oenb[123] la_oenb[122] la_oenb[121] la_oenb[120] la_oenb[119]
++ la_oenb[118] la_oenb[117] la_oenb[116] la_oenb[115] la_oenb[114] la_oenb[113] la_oenb[112] la_oenb[111]
++ la_oenb[110] la_oenb[109] la_oenb[108] la_oenb[107] la_oenb[106] la_oenb[105] la_oenb[104] la_oenb[103]
++ la_oenb[102] la_oenb[101] la_oenb[100] la_oenb[99] la_oenb[98] la_oenb[97] la_oenb[96] la_oenb[95] la_oenb[94]
++ la_oenb[93] la_oenb[92] la_oenb[91] la_oenb[90] la_oenb[89] la_oenb[88] la_oenb[87] la_oenb[86] la_oenb[85]
++ la_oenb[84] la_oenb[83] la_oenb[82] la_oenb[81] la_oenb[80] la_oenb[79] la_oenb[78] la_oenb[77] la_oenb[76]
++ la_oenb[75] la_oenb[74] la_oenb[73] la_oenb[72] la_oenb[71] la_oenb[70] la_oenb[69] la_oenb[68] la_oenb[67]
++ la_oenb[66] la_oenb[65] la_oenb[64] la_oenb[63] la_oenb[62] la_oenb[61] la_oenb[60] la_oenb[59] la_oenb[58]
++ la_oenb[57] la_oenb[56] la_oenb[55] la_oenb[54] la_oenb[53] la_oenb[52] la_oenb[51] la_oenb[50] la_oenb[49]
++ la_oenb[48] la_oenb[47] la_oenb[46] la_oenb[45] la_oenb[44] la_oenb[43] la_oenb[42] la_oenb[41] la_oenb[40]
++ la_oenb[39] la_oenb[38] la_oenb[37] la_oenb[36] la_oenb[35] la_oenb[34] la_oenb[33] la_oenb[32] la_oenb[31]
++ la_oenb[30] la_oenb[29] la_oenb[28] la_oenb[27] la_oenb[26] la_oenb[25] la_oenb[24] la_oenb[23] la_oenb[22]
++ la_oenb[21] la_oenb[20] la_oenb[19] la_oenb[18] la_oenb[17] la_oenb[16] la_oenb[15] la_oenb[14] la_oenb[13]
++ la_oenb[12] la_oenb[11] la_oenb[10] la_oenb[9] la_oenb[8] la_oenb[7] la_oenb[6] la_oenb[5] la_oenb[4]
++ la_oenb[3] la_oenb[2] la_oenb[1] la_oenb[0]
+*.iopin vdda1
+*.iopin vdda2
+*.iopin vssa1
+*.iopin vssa2
+*.iopin vccd1
+*.iopin vccd2
+*.iopin vssd1
+*.iopin vssd2
+*.ipin wb_clk_i
+*.ipin wb_rst_i
+*.ipin wbs_stb_i
+*.ipin wbs_cyc_i
+*.ipin wbs_we_i
+*.ipin wbs_sel_i[3],wbs_sel_i[2],wbs_sel_i[1],wbs_sel_i[0]
+*.ipin
+*+ wbs_dat_i[31],wbs_dat_i[30],wbs_dat_i[29],wbs_dat_i[28],wbs_dat_i[27],wbs_dat_i[26],wbs_dat_i[25],wbs_dat_i[24],wbs_dat_i[23],wbs_dat_i[22],wbs_dat_i[21],wbs_dat_i[20],wbs_dat_i[19],wbs_dat_i[18],wbs_dat_i[17],wbs_dat_i[16],wbs_dat_i[15],wbs_dat_i[14],wbs_dat_i[13],wbs_dat_i[12],wbs_dat_i[11],wbs_dat_i[10],wbs_dat_i[9],wbs_dat_i[8],wbs_dat_i[7],wbs_dat_i[6],wbs_dat_i[5],wbs_dat_i[4],wbs_dat_i[3],wbs_dat_i[2],wbs_dat_i[1],wbs_dat_i[0]
+*.ipin
+*+ wbs_adr_i[31],wbs_adr_i[30],wbs_adr_i[29],wbs_adr_i[28],wbs_adr_i[27],wbs_adr_i[26],wbs_adr_i[25],wbs_adr_i[24],wbs_adr_i[23],wbs_adr_i[22],wbs_adr_i[21],wbs_adr_i[20],wbs_adr_i[19],wbs_adr_i[18],wbs_adr_i[17],wbs_adr_i[16],wbs_adr_i[15],wbs_adr_i[14],wbs_adr_i[13],wbs_adr_i[12],wbs_adr_i[11],wbs_adr_i[10],wbs_adr_i[9],wbs_adr_i[8],wbs_adr_i[7],wbs_adr_i[6],wbs_adr_i[5],wbs_adr_i[4],wbs_adr_i[3],wbs_adr_i[2],wbs_adr_i[1],wbs_adr_i[0]
+*.opin wbs_ack_o
+*.opin
+*+ wbs_dat_o[31],wbs_dat_o[30],wbs_dat_o[29],wbs_dat_o[28],wbs_dat_o[27],wbs_dat_o[26],wbs_dat_o[25],wbs_dat_o[24],wbs_dat_o[23],wbs_dat_o[22],wbs_dat_o[21],wbs_dat_o[20],wbs_dat_o[19],wbs_dat_o[18],wbs_dat_o[17],wbs_dat_o[16],wbs_dat_o[15],wbs_dat_o[14],wbs_dat_o[13],wbs_dat_o[12],wbs_dat_o[11],wbs_dat_o[10],wbs_dat_o[9],wbs_dat_o[8],wbs_dat_o[7],wbs_dat_o[6],wbs_dat_o[5],wbs_dat_o[4],wbs_dat_o[3],wbs_dat_o[2],wbs_dat_o[1],wbs_dat_o[0]
+*.ipin
+*+ la_data_in[127],la_data_in[126],la_data_in[125],la_data_in[124],la_data_in[123],la_data_in[122],la_data_in[121],la_data_in[120],la_data_in[119],la_data_in[118],la_data_in[117],la_data_in[116],la_data_in[115],la_data_in[114],la_data_in[113],la_data_in[112],la_data_in[111],la_data_in[110],la_data_in[109],la_data_in[108],la_data_in[107],la_data_in[106],la_data_in[105],la_data_in[104],la_data_in[103],la_data_in[102],la_data_in[101],la_data_in[100],la_data_in[99],la_data_in[98],la_data_in[97],la_data_in[96],la_data_in[95],la_data_in[94],la_data_in[93],la_data_in[92],la_data_in[91],la_data_in[90],la_data_in[89],la_data_in[88],la_data_in[87],la_data_in[86],la_data_in[85],la_data_in[84],la_data_in[83],la_data_in[82],la_data_in[81],la_data_in[80],la_data_in[79],la_data_in[78],la_data_in[77],la_data_in[76],la_data_in[75],la_data_in[74],la_data_in[73],la_data_in[72],la_data_in[71],la_data_in[70],la_data_in[69],la_data_in[68],la_data_in[67],la_data_in[66],la_data_in[65],la_data_in[64],la_data_in[63],la_data_in[62],la_data_in[61],la_data_in[60],la_data_in[59],la_data_in[58],la_data_in[57],la_data_in[56],la_data_in[55],la_data_in[54],la_data_in[53],la_data_in[52],la_data_in[51],la_data_in[50],la_data_in[49],la_data_in[48],la_data_in[47],la_data_in[46],la_data_in[45],la_data_in[44],la_data_in[43],la_data_in[42],la_data_in[41],la_data_in[40],la_data_in[39],la_data_in[38],la_data_in[37],la_data_in[36],la_data_in[35],la_data_in[34],la_data_in[33],la_data_in[32],la_data_in[31],la_data_in[30],la_data_in[29],la_data_in[28],la_data_in[27],la_data_in[26],la_data_in[25],la_data_in[24],la_data_in[23],la_data_in[22],la_data_in[21],la_data_in[20],la_data_in[19],la_data_in[18],la_data_in[17],la_data_in[16],la_data_in[15],la_data_in[14],la_data_in[13],la_data_in[12],la_data_in[11],la_data_in[10],la_data_in[9],la_data_in[8],la_data_in[7],la_data_in[6],la_data_in[5],la_data_in[4],la_data_in[3],la_data_in[2],la_data_in[1],la_data_in[0]
+*.opin
+*+ la_data_out[127],la_data_out[126],la_data_out[125],la_data_out[124],la_data_out[123],la_data_out[122],la_data_out[121],la_data_out[120],la_data_out[119],la_data_out[118],la_data_out[117],la_data_out[116],la_data_out[115],la_data_out[114],la_data_out[113],la_data_out[112],la_data_out[111],la_data_out[110],la_data_out[109],la_data_out[108],la_data_out[107],la_data_out[106],la_data_out[105],la_data_out[104],la_data_out[103],la_data_out[102],la_data_out[101],la_data_out[100],la_data_out[99],la_data_out[98],la_data_out[97],la_data_out[96],la_data_out[95],la_data_out[94],la_data_out[93],la_data_out[92],la_data_out[91],la_data_out[90],la_data_out[89],la_data_out[88],la_data_out[87],la_data_out[86],la_data_out[85],la_data_out[84],la_data_out[83],la_data_out[82],la_data_out[81],la_data_out[80],la_data_out[79],la_data_out[78],la_data_out[77],la_data_out[76],la_data_out[75],la_data_out[74],la_data_out[73],la_data_out[72],la_data_out[71],la_data_out[70],la_data_out[69],la_data_out[68],la_data_out[67],la_data_out[66],la_data_out[65],la_data_out[64],la_data_out[63],la_data_out[62],la_data_out[61],la_data_out[60],la_data_out[59],la_data_out[58],la_data_out[57],la_data_out[56],la_data_out[55],la_data_out[54],la_data_out[53],la_data_out[52],la_data_out[51],la_data_out[50],la_data_out[49],la_data_out[48],la_data_out[47],la_data_out[46],la_data_out[45],la_data_out[44],la_data_out[43],la_data_out[42],la_data_out[41],la_data_out[40],la_data_out[39],la_data_out[38],la_data_out[37],la_data_out[36],la_data_out[35],la_data_out[34],la_data_out[33],la_data_out[32],la_data_out[31],la_data_out[30],la_data_out[29],la_data_out[28],la_data_out[27],la_data_out[26],la_data_out[25],la_data_out[24],la_data_out[23],la_data_out[22],la_data_out[21],la_data_out[20],la_data_out[19],la_data_out[18],la_data_out[17],la_data_out[16],la_data_out[15],la_data_out[14],la_data_out[13],la_data_out[12],la_data_out[11],la_data_out[10],la_data_out[9],la_data_out[8],la_data_out[7],la_data_out[6],la_data_out[5],la_data_out[4],la_data_out[3],la_data_out[2],la_data_out[1],la_data_out[0]
+*.ipin
+*+ io_in[26],io_in[25],io_in[24],io_in[23],io_in[22],io_in[21],io_in[20],io_in[19],io_in[18],io_in[17],io_in[16],io_in[15],io_in[14],io_in[13],io_in[12],io_in[11],io_in[10],io_in[9],io_in[8],io_in[7],io_in[6],io_in[5],io_in[4],io_in[3],io_in[2],io_in[1],io_in[0]
+*.ipin
+*+ io_in_3v3[26],io_in_3v3[25],io_in_3v3[24],io_in_3v3[23],io_in_3v3[22],io_in_3v3[21],io_in_3v3[20],io_in_3v3[19],io_in_3v3[18],io_in_3v3[17],io_in_3v3[16],io_in_3v3[15],io_in_3v3[14],io_in_3v3[13],io_in_3v3[12],io_in_3v3[11],io_in_3v3[10],io_in_3v3[9],io_in_3v3[8],io_in_3v3[7],io_in_3v3[6],io_in_3v3[5],io_in_3v3[4],io_in_3v3[3],io_in_3v3[2],io_in_3v3[1],io_in_3v3[0]
+*.ipin user_clock2
+*.opin
+*+ io_out[26],io_out[25],io_out[24],io_out[23],io_out[22],io_out[21],io_out[20],io_out[19],io_out[18],io_out[17],io_out[16],io_out[15],io_out[14],io_out[13],io_out[12],io_out[11],io_out[10],io_out[9],io_out[8],io_out[7],io_out[6],io_out[5],io_out[4],io_out[3],io_out[2],io_out[1],io_out[0]
+*.opin
+*+ io_oeb[26],io_oeb[25],io_oeb[24],io_oeb[23],io_oeb[22],io_oeb[21],io_oeb[20],io_oeb[19],io_oeb[18],io_oeb[17],io_oeb[16],io_oeb[15],io_oeb[14],io_oeb[13],io_oeb[12],io_oeb[11],io_oeb[10],io_oeb[9],io_oeb[8],io_oeb[7],io_oeb[6],io_oeb[5],io_oeb[4],io_oeb[3],io_oeb[2],io_oeb[1],io_oeb[0]
+*.iopin
+*+ gpio_analog[17],gpio_analog[16],gpio_analog[15],gpio_analog[14],gpio_analog[13],gpio_analog[12],gpio_analog[11],gpio_analog[10],gpio_analog[9],gpio_analog[8],gpio_analog[7],gpio_analog[6],gpio_analog[5],gpio_analog[4],gpio_analog[3],gpio_analog[2],gpio_analog[1],gpio_analog[0]
+*.iopin
+*+ gpio_noesd[17],gpio_noesd[16],gpio_noesd[15],gpio_noesd[14],gpio_noesd[13],gpio_noesd[12],gpio_noesd[11],gpio_noesd[10],gpio_noesd[9],gpio_noesd[8],gpio_noesd[7],gpio_noesd[6],gpio_noesd[5],gpio_noesd[4],gpio_noesd[3],gpio_noesd[2],gpio_noesd[1],gpio_noesd[0]
+*.iopin
+*+ io_analog[10],io_analog[9],io_analog[8],io_analog[7],io_analog[6],io_analog[5],io_analog[4],io_analog[3],io_analog[2],io_analog[1],io_analog[0]
+*.iopin io_clamp_high[2],io_clamp_high[1],io_clamp_high[0]
+*.iopin io_clamp_low[2],io_clamp_low[1],io_clamp_low[0]
+*.opin user_irq[2],user_irq[1],user_irq[0]
+*.ipin
+*+ la_oenb[127],la_oenb[126],la_oenb[125],la_oenb[124],la_oenb[123],la_oenb[122],la_oenb[121],la_oenb[120],la_oenb[119],la_oenb[118],la_oenb[117],la_oenb[116],la_oenb[115],la_oenb[114],la_oenb[113],la_oenb[112],la_oenb[111],la_oenb[110],la_oenb[109],la_oenb[108],la_oenb[107],la_oenb[106],la_oenb[105],la_oenb[104],la_oenb[103],la_oenb[102],la_oenb[101],la_oenb[100],la_oenb[99],la_oenb[98],la_oenb[97],la_oenb[96],la_oenb[95],la_oenb[94],la_oenb[93],la_oenb[92],la_oenb[91],la_oenb[90],la_oenb[89],la_oenb[88],la_oenb[87],la_oenb[86],la_oenb[85],la_oenb[84],la_oenb[83],la_oenb[82],la_oenb[81],la_oenb[80],la_oenb[79],la_oenb[78],la_oenb[77],la_oenb[76],la_oenb[75],la_oenb[74],la_oenb[73],la_oenb[72],la_oenb[71],la_oenb[70],la_oenb[69],la_oenb[68],la_oenb[67],la_oenb[66],la_oenb[65],la_oenb[64],la_oenb[63],la_oenb[62],la_oenb[61],la_oenb[60],la_oenb[59],la_oenb[58],la_oenb[57],la_oenb[56],la_oenb[55],la_oenb[54],la_oenb[53],la_oenb[52],la_oenb[51],la_oenb[50],la_oenb[49],la_oenb[48],la_oenb[47],la_oenb[46],la_oenb[45],la_oenb[44],la_oenb[43],la_oenb[42],la_oenb[41],la_oenb[40],la_oenb[39],la_oenb[38],la_oenb[37],la_oenb[36],la_oenb[35],la_oenb[34],la_oenb[33],la_oenb[32],la_oenb[31],la_oenb[30],la_oenb[29],la_oenb[28],la_oenb[27],la_oenb[26],la_oenb[25],la_oenb[24],la_oenb[23],la_oenb[22],la_oenb[21],la_oenb[20],la_oenb[19],la_oenb[18],la_oenb[17],la_oenb[16],la_oenb[15],la_oenb[14],la_oenb[13],la_oenb[12],la_oenb[11],la_oenb[10],la_oenb[9],la_oenb[8],la_oenb[7],la_oenb[6],la_oenb[5],la_oenb[4],la_oenb[3],la_oenb[2],la_oenb[1],la_oenb[0]
+x1 vdda1 vccd1 gpio_analog[3] io_out[11] io_out[12] vssa1 example_por
+x2 io_analog[4] vccd1 gpio_analog[7] io_out[15] io_out[16] vssa1 example_por
+R1 vssa1 io_clamp_low[2] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R2 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R3 vssa1 io_clamp_high[2] sky130_fd_pr__res_generic_m1 W=1 L=1 m=1
+R4 vssa1 io_clamp_low[1] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R5 vssa1 io_clamp_high[1] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R6 vssa1 io_clamp_low[0] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R7 io_analog[4] io_clamp_high[0] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R8 vssd1 io_oeb[15] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R9 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R10 vssd1 io_oeb[16] sky130_fd_pr__res_generic_m1 W=1 L=1 m=1
+R11 vssd1 io_oeb[11] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+R12 vssd1 io_oeb[12] sky130_fd_pr__res_generic_m3 W=1 L=1 m=1
+.ends
+
+* expanding   symbol:  example_por.sym # of pins=6
+* sym_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sym
+* sch_path: /home/tim/gits/caravel_user_project_analog/xschem/example_por.sch
+.subckt example_por  vdd3v3 vdd1v8 porb_h porb_l por_l vss
+*.iopin vdd3v3
+*.iopin vss
+*.opin porb_h
+*.opin porb_l
+*.opin por_l
+*.iopin vdd1v8
+XC1 net9 vss sky130_fd_pr__cap_mim_m3_1 W=30 L=30 MF=1 m=1
+XC2 vss net9 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=1 m=1
+XM1 net3 net7 net5 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM2 net2 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1 
+XR1 net4 vdd3v3 vss sky130_fd_pr__res_xhigh_po_0p69 L=500 mult=1 m=1
+XM4 net5 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM5 net3 net3 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1 
+XR2 vss net4 vss sky130_fd_pr__res_xhigh_po_0p69 L=150 mult=1 m=1
+XM7 net2 net2 net1 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM8 net1 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=14 nf=7 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM10 net7 net4 vss vss sky130_fd_pr__nfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
++ sa=0 sb=0 sd=0 mult=1 m=1 
+XM9 net7 net7 net6 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM11 net6 net6 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=16 nf=8 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM12 net8 net1 vdd3v3 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XM13 net9 net2 net8 vdd3v3 sky130_fd_pr__pfet_g5v0d10v5 L=0.8 W=2 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
++ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
++ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1 
+XR3 vss vss vss sky130_fd_pr__res_xhigh_po_0p69 L=25 mult=2 m=2
+x2 net10 vss vss vdd3v3 vdd3v3 porb_h sky130_fd_sc_hvl__buf_8
+x3 net10 vss vss vdd1v8 vdd1v8 porb_l sky130_fd_sc_hvl__buf_8
+x4 net10 vss vss vdd1v8 vdd1v8 por_l sky130_fd_sc_hvl__inv_8
+x5 net9 vss vss vdd3v3 vdd3v3 net10 sky130_fd_sc_hvl__schmittbuf_1
+.ends
+
+** flattened .save nodes
+.end