diff --git a/info.yaml b/info.yaml
index d7d414c..6667586 100644
--- a/info.yaml
+++ b/info.yaml
@@ -14,6 +14,6 @@
     - "Test Harness"
   category: "Test Harness"
   top_level_netlist: "caravel/verilog/gl/caravel.v"
-  user_level_netlist: "verilog/gl/user_project_wrapper.v"
+  user_level_netlist: "verilog/gl/user_analog_project_wrapper.v"
   version: "1.00"
   cover_image: "docs/source/_static/caravel_harness.png"
diff --git a/mag/simple_por.mag b/mag/simple_por.mag
new file mode 100644
index 0000000..8a97e29
--- /dev/null
+++ b/mag/simple_por.mag
@@ -0,0 +1,603 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606688983
+<< nwell >>
+rect 70 7344 6652 7795
+rect 7401 6799 10893 7301
+<< pwell >>
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+rect 2635 5816 2853 6026
+<< mvpsubdiff >>
+rect 7438 7387 10856 7455
+<< mvnsubdiff >>
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+<< viali >>
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+<< via1 >>
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+rect 719 8082 801 8144
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+<< metal2 >>
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+<< via2 >>
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+<< metal3 >>
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+<< metal4 >>
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+<< via4 >>
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+<< metal5 >>
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+rect 4313 6494 5299 6558
+rect 4507 6135 5299 6494
+rect 10851 6615 10879 7755
+rect 11146 6615 11171 7755
+rect 10851 6242 11171 6615
+use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB  sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_3
+timestamp 1606063140
+transform 1 0 408 0 1 7841
+box -338 -497 338 497
+use sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ  sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ_0
+timestamp 1606063140
+transform 1 0 1657 0 1 7841
+box -1101 -497 1101 497
+use sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC  sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC_1
+timestamp 1605994897
+transform -1 0 371 0 1 6769
+box -308 -458 308 458
+use sky130_fd_pr__nfet_g5v0d10v5_TGFUGS  sky130_fd_pr__nfet_g5v0d10v5_TGFUGS_0
+timestamp 1606063140
+transform 1 0 1515 0 1 6769
+box -962 -458 962 458
+use sky130_fd_pr__pfet_g5v0d10v5_YEUEBV  sky130_fd_pr__pfet_g5v0d10v5_YEUEBV_0
+timestamp 1606063140
+transform 1 0 5018 0 1 7841
+box -992 -497 992 497
+use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB  sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_1
+timestamp 1606063140
+transform 1 0 3878 0 1 7841
+box -338 -497 338 497
+use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB  sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_0
+timestamp 1606063140
+transform 1 0 3392 0 1 7841
+box -338 -497 338 497
+use sky130_fd_pr__pfet_g5v0d10v5_YUHPBG  sky130_fd_pr__pfet_g5v0d10v5_YUHPBG_0
+timestamp 1606063140
+transform 1 0 2906 0 1 7841
+box -338 -497 338 497
+use sky130_fd_pr__nfet_g5v0d10v5_PKVMTM  sky130_fd_pr__nfet_g5v0d10v5_PKVMTM_0
+timestamp 1606063140
+transform 1 0 2660 0 1 6770
+box -308 -458 308 458
+use sky130_fd_pr__pfet_g5v0d10v5_3YBPVB  sky130_fd_pr__pfet_g5v0d10v5_3YBPVB_2
+timestamp 1606063140
+transform 1 0 6644 0 1 7841
+box -338 -497 338 497
+use sky130_fd_pr__pfet_g5v0d10v5_YUHPXE  sky130_fd_pr__pfet_g5v0d10v5_YUHPXE_0
+timestamp 1606063140
+transform 1 0 6158 0 1 7841
+box -338 -497 338 497
+use sky130_fd_sc_hvl__buf_8  sky130_fd_sc_hvl__buf_8_0 ~/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/mag
+timestamp 1606688983
+transform 1 0 8523 0 1 6404
+box -66 -23 1986 897
+use sky130_fd_sc_hvl__buf_8  sky130_fd_sc_hvl__buf_8_1
+timestamp 1606688983
+transform 1 0 7477 0 1 7438
+box -66 -23 1986 897
+use sky130_fd_sc_hvl__schmittbuf_1  sky130_fd_sc_hvl__schmittbuf_1_0 ~/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/mag
+timestamp 1606688983
+transform 1 0 7467 0 1 6404
+box -66 -23 1122 897
+use sky130_fd_sc_hvl__inv_8  sky130_fd_sc_hvl__inv_8_0 ~/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/mag
+timestamp 1606688983
+transform 1 0 9397 0 1 7438
+box -66 -23 1506 897
+use sky130_fd_sc_hvl__fill_4  sky130_fd_sc_hvl__fill_4_0 ~/projects/efabless/tech/SW/sky130A/libs.ref/sky130_fd_sc_hvl/mag
+timestamp 1606688983
+transform 1 0 10443 0 1 6404
+box -66 -23 450 897
+use sky130_fd_pr__res_xhigh_po_0p69_S5N9F3  sky130_fd_pr__res_xhigh_po_0p69_S5N9F3_0
+timestamp 1606074388
+transform 1 0 5446 0 1 3098
+box -5446 -3098 5446 3098
+use sky130_fd_pr__cap_mim_m3_2_W5U4AW  sky130_fd_pr__cap_mim_m3_2_W5U4AW_0
+timestamp 1606502073
+transform 1 0 7970 0 1 3151
+box -3179 -3101 3201 3101
+use sky130_fd_pr__cap_mim_m3_1_WRT4AW  sky130_fd_pr__cap_mim_m3_1_WRT4AW_0
+timestamp 1606502073
+transform -1 0 7027 0 1 3151
+box -3136 -3100 3136 3100
+<< labels >>
+flabel metal4 s 38 7965 73 8283 0 FreeSans 320 0 0 0 vdd3v3
+port 0 nsew
+flabel metal4 s 38 7255 232 7655 0 FreeSans 320 0 0 0 vss
+port 2 nsew
+flabel metal4 s 10974 7962 11180 8291 0 FreeSans 320 0 0 0 vdd1v8
+port 1 nsew
+flabel metal3 11189 7491 11344 7551 0 FreeSans 320 0 0 0 por_l
+port 4 nsew
+flabel metal3 11188 7856 11343 7916 0 FreeSans 320 0 0 0 porb_l
+port 5 nsew
+flabel metal3 10969 6765 11342 6834 0 FreeSans 320 0 0 0 porb_h
+port 3 nsew
+<< properties >>
+string FIXED_BBOX 0 0 11344 8338
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_1_WRT4AW.mag b/mag/sky130_fd_pr__cap_mim_m3_1_WRT4AW.mag
new file mode 100644
index 0000000..c4fedfd
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_1_WRT4AW.mag
@@ -0,0 +1,33 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606502073
+<< metal3 >>
+rect -3136 3072 3136 3100
+rect -3136 -3072 3052 3072
+rect 3116 -3072 3136 3072
+rect -3136 -3100 3136 -3072
+<< via3 >>
+rect 3052 -3072 3116 3072
+<< mimcap >>
+rect -3036 2960 2964 3000
+rect -3036 -2960 2332 2960
+rect 2924 -2960 2964 2960
+rect -3036 -3000 2964 -2960
+<< mimcapcontact >>
+rect 2332 -2960 2924 2960
+<< metal4 >>
+rect 3036 3072 3132 3088
+rect 2331 2960 2925 2961
+rect 2331 -2960 2332 2960
+rect 2924 -2960 2925 2960
+rect 2331 -2961 2925 -2960
+rect 3036 -3072 3052 3072
+rect 3116 -3072 3132 3072
+rect 3036 -3088 3132 -3072
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_1
+string FIXED_BBOX -3136 -3100 3064 3100
+string parameters w 30.00 l 30.00 val 920.4 carea 1.00 cperi 0.17 nx 1 ny 1 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov -10
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__cap_mim_m3_2_W5U4AW.mag b/mag/sky130_fd_pr__cap_mim_m3_2_W5U4AW.mag
new file mode 100644
index 0000000..59928eb
--- /dev/null
+++ b/mag/sky130_fd_pr__cap_mim_m3_2_W5U4AW.mag
@@ -0,0 +1,33 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606502073
+<< metal4 >>
+rect -3179 3059 3179 3100
+rect -3179 -3059 2923 3059
+rect 3159 -3059 3179 3059
+rect -3179 -3100 3179 -3059
+<< via4 >>
+rect 2923 -3059 3159 3059
+<< mimcap2 >>
+rect -3079 2960 2921 3000
+rect -3079 -2960 -3039 2960
+rect 2289 -2960 2921 2960
+rect -3079 -3000 2921 -2960
+<< mimcap2contact >>
+rect -3039 -2960 2289 2960
+<< metal5 >>
+rect 2881 3059 3201 3101
+rect -3063 2960 2313 2984
+rect -3063 -2960 -3039 2960
+rect 2289 -2960 2313 2960
+rect -3063 -2984 2313 -2960
+rect 2881 -3059 2923 3059
+rect 3159 -3059 3201 3059
+rect 2881 -3101 3201 -3059
+<< properties >>
+string gencell sky130_fd_pr__cap_mim_m3_2
+string FIXED_BBOX -3179 -3100 3021 3100
+string parameters w 30.00 l 30.00 val 920.4 carea 1.00 cperi 0.17 nx 1 ny 1 dummy 0 square 0 lmin 2.00 wmin 2.00 lmax 30.0 wmax 30.0 dc 0 bconnect 1 tconnect 1 ccov +90
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__nfet_g5v0d10v5_PKVMTM.mag b/mag/sky130_fd_pr__nfet_g5v0d10v5_PKVMTM.mag
new file mode 100644
index 0000000..7be65d4
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_g5v0d10v5_PKVMTM.mag
@@ -0,0 +1,98 @@
+magic
+tech sky130A
+timestamp 1606063140
+<< pwell >>
+rect -154 -229 154 229
+<< mvnmos >>
+rect -40 -100 40 100
+<< mvndiff >>
+rect -69 94 -40 100
+rect -69 -94 -63 94
+rect -46 -94 -40 94
+rect -69 -100 -40 -94
+rect 40 94 69 100
+rect 40 -94 46 94
+rect 63 -94 69 94
+rect 40 -100 69 -94
+<< mvndiffc >>
+rect -63 -94 -46 94
+rect 46 -94 63 94
+<< mvpsubdiff >>
+rect -136 205 136 211
+rect -136 188 -82 205
+rect 82 188 136 205
+rect -136 182 136 188
+rect -136 -182 -107 182
+rect 107 157 136 182
+rect 107 -157 113 157
+rect 130 -157 136 157
+rect 107 -182 136 -157
+rect -136 -188 136 -182
+rect -136 -205 -82 -188
+rect 82 -205 136 -188
+rect -136 -211 136 -205
+<< mvpsubdiffcont >>
+rect -82 188 82 205
+rect 113 -157 130 157
+rect -82 -205 82 -188
+<< poly >>
+rect -40 136 40 144
+rect -40 119 -32 136
+rect 32 119 40 136
+rect -40 100 40 119
+rect -40 -119 40 -100
+rect -40 -136 -32 -119
+rect 32 -136 40 -119
+rect -40 -144 40 -136
+<< polycont >>
+rect -32 119 32 136
+rect -32 -136 32 -119
+<< locali >>
+rect -130 188 -82 205
+rect 82 188 130 205
+rect -130 -19 -113 188
+rect 113 157 130 188
+rect -40 119 -32 136
+rect 32 119 40 136
+rect -63 94 -46 102
+rect -63 -102 -46 -94
+rect 46 94 63 102
+rect 46 -102 63 -94
+rect -40 -136 -32 -119
+rect 32 -136 40 -119
+rect 113 -188 130 -157
+rect -130 -205 -82 -188
+rect 82 -205 130 -188
+<< viali >>
+rect -32 119 32 136
+rect -130 -188 -113 -19
+rect -63 -94 -46 94
+rect 46 -94 63 94
+rect -32 -136 32 -119
+<< metal1 >>
+rect -38 136 38 139
+rect -38 119 -32 136
+rect 32 119 38 136
+rect -38 116 38 119
+rect -66 94 -43 100
+rect -133 -19 -110 -13
+rect -133 -188 -130 -19
+rect -113 -188 -110 -19
+rect -66 -94 -63 94
+rect -46 -94 -43 94
+rect -66 -100 -43 -94
+rect 43 94 66 100
+rect 43 -94 46 94
+rect 63 -94 66 94
+rect 43 -100 66 -94
+rect -38 -119 38 -116
+rect -38 -136 -32 -119
+rect 32 -136 38 -119
+rect -38 -139 38 -136
+rect -133 -194 -110 -188
+<< properties >>
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string FIXED_BBOX -121 -196 121 196
+string parameters w 2.00 l 0.80 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 0 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt  sky130_fd_bs_flash__special_sonosfet_star  sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl +45 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__nfet_g5v0d10v5_TGFUGS.mag b/mag/sky130_fd_pr__nfet_g5v0d10v5_TGFUGS.mag
new file mode 100644
index 0000000..0fc9bf5
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_g5v0d10v5_TGFUGS.mag
@@ -0,0 +1,326 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606063140
+<< pwell >>
+rect -962 -458 962 458
+<< mvnmos >>
+rect -734 -200 -574 200
+rect -516 -200 -356 200
+rect -298 -200 -138 200
+rect -80 -200 80 200
+rect 138 -200 298 200
+rect 356 -200 516 200
+rect 574 -200 734 200
+<< mvndiff >>
+rect -792 188 -734 200
+rect -792 -188 -780 188
+rect -746 -188 -734 188
+rect -792 -200 -734 -188
+rect -574 188 -516 200
+rect -574 -188 -562 188
+rect -528 -188 -516 188
+rect -574 -200 -516 -188
+rect -356 188 -298 200
+rect -356 -188 -344 188
+rect -310 -188 -298 188
+rect -356 -200 -298 -188
+rect -138 188 -80 200
+rect -138 -188 -126 188
+rect -92 -188 -80 188
+rect -138 -200 -80 -188
+rect 80 188 138 200
+rect 80 -188 92 188
+rect 126 -188 138 188
+rect 80 -200 138 -188
+rect 298 188 356 200
+rect 298 -188 310 188
+rect 344 -188 356 188
+rect 298 -200 356 -188
+rect 516 188 574 200
+rect 516 -188 528 188
+rect 562 -188 574 188
+rect 516 -200 574 -188
+rect 734 188 792 200
+rect 734 -188 746 188
+rect 780 -188 792 188
+rect 734 -200 792 -188
+<< mvndiffc >>
+rect -780 -188 -746 188
+rect -562 -188 -528 188
+rect -344 -188 -310 188
+rect -126 -188 -92 188
+rect 92 -188 126 188
+rect 310 -188 344 188
+rect 528 -188 562 188
+rect 746 -188 780 188
+<< mvpsubdiff >>
+rect -926 410 926 422
+rect -926 376 -818 410
+rect 818 376 926 410
+rect -926 364 926 376
+rect -926 314 -868 364
+rect -926 -314 -914 314
+rect -880 -314 -868 314
+rect 868 314 926 364
+rect -926 -364 -868 -314
+rect 868 -314 880 314
+rect 914 -314 926 314
+rect 868 -364 926 -314
+rect -926 -376 926 -364
+rect -926 -410 -818 -376
+rect 818 -410 926 -376
+rect -926 -422 926 -410
+<< mvpsubdiffcont >>
+rect -818 376 818 410
+rect -914 -314 -880 314
+rect 880 -314 914 314
+rect -818 -410 818 -376
+<< poly >>
+rect -734 272 -574 288
+rect -734 238 -718 272
+rect -590 238 -574 272
+rect -734 200 -574 238
+rect -516 272 -356 288
+rect -516 238 -500 272
+rect -372 238 -356 272
+rect -516 200 -356 238
+rect -298 272 -138 288
+rect -298 238 -282 272
+rect -154 238 -138 272
+rect -298 200 -138 238
+rect -80 272 80 288
+rect -80 238 -64 272
+rect 64 238 80 272
+rect -80 200 80 238
+rect 138 272 298 288
+rect 138 238 154 272
+rect 282 238 298 272
+rect 138 200 298 238
+rect 356 272 516 288
+rect 356 238 372 272
+rect 500 238 516 272
+rect 356 200 516 238
+rect 574 272 734 288
+rect 574 238 590 272
+rect 718 238 734 272
+rect 574 200 734 238
+rect -734 -238 -574 -200
+rect -734 -272 -718 -238
+rect -590 -272 -574 -238
+rect -734 -288 -574 -272
+rect -516 -238 -356 -200
+rect -516 -272 -500 -238
+rect -372 -272 -356 -238
+rect -516 -288 -356 -272
+rect -298 -238 -138 -200
+rect -298 -272 -282 -238
+rect -154 -272 -138 -238
+rect -298 -288 -138 -272
+rect -80 -238 80 -200
+rect -80 -272 -64 -238
+rect 64 -272 80 -238
+rect -80 -288 80 -272
+rect 138 -238 298 -200
+rect 138 -272 154 -238
+rect 282 -272 298 -238
+rect 138 -288 298 -272
+rect 356 -238 516 -200
+rect 356 -272 372 -238
+rect 500 -272 516 -238
+rect 356 -288 516 -272
+rect 574 -238 734 -200
+rect 574 -272 590 -238
+rect 718 -272 734 -238
+rect 574 -288 734 -272
+<< polycont >>
+rect -718 238 -590 272
+rect -500 238 -372 272
+rect -282 238 -154 272
+rect -64 238 64 272
+rect 154 238 282 272
+rect 372 238 500 272
+rect 590 238 718 272
+rect -718 -272 -590 -238
+rect -500 -272 -372 -238
+rect -282 -272 -154 -238
+rect -64 -272 64 -238
+rect 154 -272 282 -238
+rect 372 -272 500 -238
+rect 590 -272 718 -238
+<< locali >>
+rect -914 376 -818 410
+rect 818 376 914 410
+rect -914 314 -880 376
+rect 880 314 914 376
+rect -734 238 -718 272
+rect -590 238 -574 272
+rect -516 238 -500 272
+rect -372 238 -356 272
+rect -298 238 -282 272
+rect -154 238 -138 272
+rect -80 238 -64 272
+rect 64 238 80 272
+rect 138 238 154 272
+rect 282 238 298 272
+rect 356 238 372 272
+rect 500 238 516 272
+rect 574 238 590 272
+rect 718 238 734 272
+rect -780 188 -746 204
+rect -780 -204 -746 -188
+rect -562 188 -528 204
+rect -562 -204 -528 -188
+rect -344 188 -310 204
+rect -344 -204 -310 -188
+rect -126 188 -92 204
+rect -126 -204 -92 -188
+rect 92 188 126 204
+rect 92 -204 126 -188
+rect 310 188 344 204
+rect 310 -204 344 -188
+rect 528 188 562 204
+rect 528 -204 562 -188
+rect 746 188 780 204
+rect 746 -204 780 -188
+rect -734 -272 -718 -238
+rect -590 -272 -574 -238
+rect -516 -272 -500 -238
+rect -372 -272 -356 -238
+rect -298 -272 -282 -238
+rect -154 -272 -138 -238
+rect -80 -272 -64 -238
+rect 64 -272 80 -238
+rect 138 -272 154 -238
+rect 282 -272 298 -238
+rect 356 -272 372 -238
+rect 500 -272 516 -238
+rect 574 -272 590 -238
+rect 718 -272 734 -238
+rect -914 -376 -880 -314
+rect 880 -376 914 -314
+rect -914 -410 -818 -376
+rect 818 -410 914 -376
+<< viali >>
+rect -914 -263 -880 263
+rect -718 238 -590 272
+rect -500 238 -372 272
+rect -282 238 -154 272
+rect -64 238 64 272
+rect 154 238 282 272
+rect 372 238 500 272
+rect 590 238 718 272
+rect -780 21 -746 171
+rect -562 -171 -528 -21
+rect -344 21 -310 171
+rect -126 -171 -92 -21
+rect 92 21 126 171
+rect 310 -171 344 -21
+rect 528 21 562 171
+rect 746 -171 780 -21
+rect -718 -272 -590 -238
+rect -500 -272 -372 -238
+rect -282 -272 -154 -238
+rect -64 -272 64 -238
+rect 154 -272 282 -238
+rect 372 -272 500 -238
+rect 590 -272 718 -238
+<< metal1 >>
+rect -920 263 -874 275
+rect -920 -263 -914 263
+rect -880 -263 -874 263
+rect -730 272 -578 278
+rect -730 238 -718 272
+rect -590 238 -578 272
+rect -730 232 -578 238
+rect -512 272 -360 278
+rect -512 238 -500 272
+rect -372 238 -360 272
+rect -512 232 -360 238
+rect -294 272 -142 278
+rect -294 238 -282 272
+rect -154 238 -142 272
+rect -294 232 -142 238
+rect -76 272 76 278
+rect -76 238 -64 272
+rect 64 238 76 272
+rect -76 232 76 238
+rect 142 272 294 278
+rect 142 238 154 272
+rect 282 238 294 272
+rect 142 232 294 238
+rect 360 272 512 278
+rect 360 238 372 272
+rect 500 238 512 272
+rect 360 232 512 238
+rect 578 272 730 278
+rect 578 238 590 272
+rect 718 238 730 272
+rect 578 232 730 238
+rect -786 171 -740 183
+rect -786 21 -780 171
+rect -746 21 -740 171
+rect -786 9 -740 21
+rect -350 171 -304 183
+rect -350 21 -344 171
+rect -310 21 -304 171
+rect -350 9 -304 21
+rect 86 171 132 183
+rect 86 21 92 171
+rect 126 21 132 171
+rect 86 9 132 21
+rect 522 171 568 183
+rect 522 21 528 171
+rect 562 21 568 171
+rect 522 9 568 21
+rect -568 -21 -522 -9
+rect -568 -171 -562 -21
+rect -528 -171 -522 -21
+rect -568 -183 -522 -171
+rect -132 -21 -86 -9
+rect -132 -171 -126 -21
+rect -92 -171 -86 -21
+rect -132 -183 -86 -171
+rect 304 -21 350 -9
+rect 304 -171 310 -21
+rect 344 -171 350 -21
+rect 304 -183 350 -171
+rect 740 -21 786 -9
+rect 740 -171 746 -21
+rect 780 -171 786 -21
+rect 740 -183 786 -171
+rect -920 -275 -874 -263
+rect -730 -238 -578 -232
+rect -730 -272 -718 -238
+rect -590 -272 -578 -238
+rect -730 -278 -578 -272
+rect -512 -238 -360 -232
+rect -512 -272 -500 -238
+rect -372 -272 -360 -238
+rect -512 -278 -360 -272
+rect -294 -238 -142 -232
+rect -294 -272 -282 -238
+rect -154 -272 -142 -238
+rect -294 -278 -142 -272
+rect -76 -238 76 -232
+rect -76 -272 -64 -238
+rect 64 -272 76 -238
+rect -76 -278 76 -272
+rect 142 -238 294 -232
+rect 142 -272 154 -238
+rect 282 -272 294 -238
+rect 142 -278 294 -272
+rect 360 -238 512 -232
+rect 360 -272 372 -238
+rect 500 -272 512 -238
+rect 360 -278 512 -272
+rect 578 -238 730 -232
+rect 578 -272 590 -238
+rect 718 -272 730 -238
+rect 578 -278 730 -272
+<< properties >>
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string FIXED_BBOX -897 -393 897 393
+string parameters w 2.00 l 0.80 m 1 nf 7 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt  sky130_fd_bs_flash__special_sonosfet_star  sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt} full_metal 1 viasrc +40 viadrn -40 viagate 100 viagb 0 viagr 0 viagl 70 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC.mag b/mag/sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC.mag
new file mode 100644
index 0000000..eb312e6
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_g5v0d10v5_ZK8HQC.mag
@@ -0,0 +1,93 @@
+magic
+tech sky130A
+timestamp 1605994897
+<< pwell >>
+rect -154 -229 154 229
+<< mvnmos >>
+rect -40 -100 40 100
+<< mvndiff >>
+rect -69 94 -40 100
+rect -69 -94 -63 94
+rect -46 -94 -40 94
+rect -69 -100 -40 -94
+rect 40 94 69 100
+rect 40 -94 46 94
+rect 63 -94 69 94
+rect 40 -100 69 -94
+<< mvndiffc >>
+rect -63 -94 -46 94
+rect 46 -94 63 94
+<< mvpsubdiff >>
+rect -136 205 136 211
+rect -136 188 -82 205
+rect 82 188 136 205
+rect -136 182 136 188
+rect -136 -182 -107 182
+rect 107 157 136 182
+rect 107 -157 113 157
+rect 130 -157 136 157
+rect 107 -182 136 -157
+rect -136 -188 136 -182
+rect -136 -205 -82 -188
+rect 82 -205 136 -188
+rect -136 -211 136 -205
+<< mvpsubdiffcont >>
+rect -82 188 82 205
+rect 113 -157 130 157
+rect -82 -205 82 -188
+<< poly >>
+rect -40 136 40 144
+rect -40 119 -32 136
+rect 32 119 40 136
+rect -40 100 40 119
+rect -40 -119 40 -100
+rect -40 -136 -32 -119
+rect 32 -136 40 -119
+rect -40 -144 40 -136
+<< polycont >>
+rect -32 119 32 136
+rect -32 -136 32 -119
+<< locali >>
+rect -130 188 -82 205
+rect 82 188 130 205
+rect -130 -188 -113 188
+rect 113 157 130 188
+rect -40 119 -32 136
+rect 32 119 40 136
+rect -63 94 -46 102
+rect -63 -102 -46 -94
+rect 46 94 63 102
+rect 46 -102 63 -94
+rect -40 -136 -32 -119
+rect 32 -136 40 -119
+rect 113 -188 130 -157
+rect -130 -205 -82 -188
+rect 82 -205 130 -188
+<< viali >>
+rect -32 119 32 136
+rect -63 -94 -46 94
+rect 46 -94 63 94
+rect -32 -136 32 -119
+<< metal1 >>
+rect -38 136 38 139
+rect -38 119 -32 136
+rect 32 119 38 136
+rect -38 116 38 119
+rect -66 94 -43 100
+rect -66 -94 -63 94
+rect -46 -94 -43 94
+rect -66 -100 -43 -94
+rect 43 94 66 100
+rect 43 -94 46 94
+rect 63 -94 66 94
+rect 43 -100 66 -94
+rect -38 -119 38 -116
+rect -38 -136 -32 -119
+rect 32 -136 38 -119
+rect -38 -139 38 -136
+<< properties >>
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string FIXED_BBOX -121 -196 121 196
+string parameters w 2.00 l 0.80 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 0 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt  sky130_fd_bs_flash__special_sonosfet_star  sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__pfet_g5v0d10v5_3YBPVB.mag b/mag/sky130_fd_pr__pfet_g5v0d10v5_3YBPVB.mag
new file mode 100644
index 0000000..e0b0219
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_g5v0d10v5_3YBPVB.mag
@@ -0,0 +1,106 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606063140
+<< nwell >>
+rect -338 -497 338 497
+<< mvpmos >>
+rect -80 -200 80 200
+<< mvpdiff >>
+rect -138 188 -80 200
+rect -138 -188 -126 188
+rect -92 -188 -80 188
+rect -138 -200 -80 -188
+rect 80 188 138 200
+rect 80 -188 92 188
+rect 126 -188 138 188
+rect 80 -200 138 -188
+<< mvpdiffc >>
+rect -126 -188 -92 188
+rect 92 -188 126 188
+<< mvnsubdiff >>
+rect -272 419 272 431
+rect -272 385 -164 419
+rect 164 385 272 419
+rect -272 373 272 385
+rect -272 323 -214 373
+rect -272 -323 -260 323
+rect -226 -323 -214 323
+rect 214 323 272 373
+rect -272 -373 -214 -323
+rect 214 -323 226 323
+rect 260 -323 272 323
+rect 214 -373 272 -323
+rect -272 -385 272 -373
+rect -272 -419 -164 -385
+rect 164 -419 272 -385
+rect -272 -431 272 -419
+<< mvnsubdiffcont >>
+rect -164 385 164 419
+rect -260 -323 -226 323
+rect 226 -323 260 323
+rect -164 -419 164 -385
+<< poly >>
+rect -80 281 80 297
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -80 200 80 247
+rect -80 -247 80 -200
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -80 -297 80 -281
+<< polycont >>
+rect -64 247 64 281
+rect -64 -281 64 -247
+<< locali >>
+rect -260 385 -181 419
+rect 181 385 260 419
+rect -260 323 -226 385
+rect 226 323 260 385
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -126 188 -92 204
+rect -126 -204 -92 -188
+rect 92 188 126 204
+rect 92 -204 126 -188
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -260 -385 -226 -323
+rect 226 -385 260 -323
+rect -260 -419 -164 -385
+rect 164 -419 260 -385
+<< viali >>
+rect -181 385 -164 419
+rect -164 385 164 419
+rect 164 385 181 419
+rect -64 247 64 281
+rect -126 -188 -92 188
+rect 92 -188 126 188
+rect -64 -281 64 -247
+<< metal1 >>
+rect -193 419 193 425
+rect -193 385 -181 419
+rect 181 385 193 419
+rect -193 379 193 385
+rect -76 281 76 287
+rect -76 247 -64 281
+rect 64 247 76 281
+rect -76 241 76 247
+rect -132 188 -86 200
+rect -132 -188 -126 188
+rect -92 -188 -86 188
+rect -132 -200 -86 -188
+rect 86 188 132 200
+rect 86 -188 92 188
+rect 126 -188 132 188
+rect 86 -200 132 -188
+rect -76 -247 76 -241
+rect -76 -281 -64 -247
+rect 64 -281 76 -247
+rect -76 -287 76 -281
+<< properties >>
+string gencell sky130_fd_pr__pfet_g5v0d10v5
+string FIXED_BBOX -243 -402 243 402
+string parameters w 2.00 l 0.80 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__pfet_01v8  sky130_fd_pr__pfet_01v8_lvt sky130_fd_pr__pfet_01v8_hvt  sky130_fd_pr__pfet_g5v0d10v5} full_metal 1 viagl 0 viagr 0 viagt 80 viagb 0 viagate 100 viadrn 100 viasrc 100
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__pfet_g5v0d10v5_YEUEBV.mag b/mag/sky130_fd_pr__pfet_g5v0d10v5_YEUEBV.mag
new file mode 100644
index 0000000..08a17b0
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_g5v0d10v5_YEUEBV.mag
@@ -0,0 +1,331 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606063140
+<< nwell >>
+rect -992 -497 992 497
+<< mvpmos >>
+rect -734 -200 -574 200
+rect -516 -200 -356 200
+rect -298 -200 -138 200
+rect -80 -200 80 200
+rect 138 -200 298 200
+rect 356 -200 516 200
+rect 574 -200 734 200
+<< mvpdiff >>
+rect -792 188 -734 200
+rect -792 -188 -780 188
+rect -746 -188 -734 188
+rect -792 -200 -734 -188
+rect -574 188 -516 200
+rect -574 -188 -562 188
+rect -528 -188 -516 188
+rect -574 -200 -516 -188
+rect -356 188 -298 200
+rect -356 -188 -344 188
+rect -310 -188 -298 188
+rect -356 -200 -298 -188
+rect -138 188 -80 200
+rect -138 -188 -126 188
+rect -92 -188 -80 188
+rect -138 -200 -80 -188
+rect 80 188 138 200
+rect 80 -188 92 188
+rect 126 -188 138 188
+rect 80 -200 138 -188
+rect 298 188 356 200
+rect 298 -188 310 188
+rect 344 -188 356 188
+rect 298 -200 356 -188
+rect 516 188 574 200
+rect 516 -188 528 188
+rect 562 -188 574 188
+rect 516 -200 574 -188
+rect 734 188 792 200
+rect 734 -188 746 188
+rect 780 -188 792 188
+rect 734 -200 792 -188
+<< mvpdiffc >>
+rect -780 -188 -746 188
+rect -562 -188 -528 188
+rect -344 -188 -310 188
+rect -126 -188 -92 188
+rect 92 -188 126 188
+rect 310 -188 344 188
+rect 528 -188 562 188
+rect 746 -188 780 188
+<< mvnsubdiff >>
+rect -926 419 926 431
+rect -926 385 -818 419
+rect 818 385 926 419
+rect -926 373 926 385
+rect -926 323 -868 373
+rect -926 -323 -914 323
+rect -880 -323 -868 323
+rect 868 323 926 373
+rect -926 -373 -868 -323
+rect 868 -323 880 323
+rect 914 -323 926 323
+rect 868 -373 926 -323
+rect -926 -385 926 -373
+rect -926 -419 -818 -385
+rect 818 -419 926 -385
+rect -926 -431 926 -419
+<< mvnsubdiffcont >>
+rect -818 385 818 419
+rect -914 -323 -880 323
+rect 880 -323 914 323
+rect -818 -419 818 -385
+<< poly >>
+rect -734 281 -574 297
+rect -734 247 -718 281
+rect -590 247 -574 281
+rect -734 200 -574 247
+rect -516 281 -356 297
+rect -516 247 -500 281
+rect -372 247 -356 281
+rect -516 200 -356 247
+rect -298 281 -138 297
+rect -298 247 -282 281
+rect -154 247 -138 281
+rect -298 200 -138 247
+rect -80 281 80 297
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -80 200 80 247
+rect 138 281 298 297
+rect 138 247 154 281
+rect 282 247 298 281
+rect 138 200 298 247
+rect 356 281 516 297
+rect 356 247 372 281
+rect 500 247 516 281
+rect 356 200 516 247
+rect 574 281 734 297
+rect 574 247 590 281
+rect 718 247 734 281
+rect 574 200 734 247
+rect -734 -247 -574 -200
+rect -734 -281 -718 -247
+rect -590 -281 -574 -247
+rect -734 -297 -574 -281
+rect -516 -247 -356 -200
+rect -516 -281 -500 -247
+rect -372 -281 -356 -247
+rect -516 -297 -356 -281
+rect -298 -247 -138 -200
+rect -298 -281 -282 -247
+rect -154 -281 -138 -247
+rect -298 -297 -138 -281
+rect -80 -247 80 -200
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -80 -297 80 -281
+rect 138 -247 298 -200
+rect 138 -281 154 -247
+rect 282 -281 298 -247
+rect 138 -297 298 -281
+rect 356 -247 516 -200
+rect 356 -281 372 -247
+rect 500 -281 516 -247
+rect 356 -297 516 -281
+rect 574 -247 734 -200
+rect 574 -281 590 -247
+rect 718 -281 734 -247
+rect 574 -297 734 -281
+<< polycont >>
+rect -718 247 -590 281
+rect -500 247 -372 281
+rect -282 247 -154 281
+rect -64 247 64 281
+rect 154 247 282 281
+rect 372 247 500 281
+rect 590 247 718 281
+rect -718 -281 -590 -247
+rect -500 -281 -372 -247
+rect -282 -281 -154 -247
+rect -64 -281 64 -247
+rect 154 -281 282 -247
+rect 372 -281 500 -247
+rect 590 -281 718 -247
+<< locali >>
+rect -914 385 -818 419
+rect 818 385 914 419
+rect 880 323 914 385
+rect -734 247 -718 281
+rect -590 247 -574 281
+rect -516 247 -500 281
+rect -372 247 -356 281
+rect -298 247 -282 281
+rect -154 247 -138 281
+rect -80 247 -64 281
+rect 64 247 80 281
+rect 138 247 154 281
+rect 282 247 298 281
+rect 356 247 372 281
+rect 500 247 516 281
+rect 574 247 590 281
+rect 718 247 734 281
+rect -780 188 -746 204
+rect -780 -204 -746 -188
+rect -562 188 -528 204
+rect -562 -204 -528 -188
+rect -344 188 -310 204
+rect -344 -204 -310 -188
+rect -126 188 -92 204
+rect -126 -204 -92 -188
+rect 92 188 126 204
+rect 92 -204 126 -188
+rect 310 188 344 204
+rect 310 -204 344 -188
+rect 528 188 562 204
+rect 528 -204 562 -188
+rect 746 188 780 204
+rect 746 -204 780 -188
+rect -734 -281 -718 -247
+rect -590 -281 -574 -247
+rect -516 -281 -500 -247
+rect -372 -281 -356 -247
+rect -298 -281 -282 -247
+rect -154 -281 -138 -247
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect 138 -281 154 -247
+rect 282 -281 298 -247
+rect 356 -281 372 -247
+rect 500 -281 516 -247
+rect 574 -281 590 -247
+rect 718 -281 734 -247
+rect -914 -385 -880 -323
+rect 880 -385 914 -323
+rect -914 -419 -818 -385
+rect 818 -419 914 -385
+<< viali >>
+rect -792 385 792 419
+rect -914 323 -880 385
+rect -914 38 -880 323
+rect -718 247 -590 281
+rect -500 247 -372 281
+rect -282 247 -154 281
+rect -64 247 64 281
+rect 154 247 282 281
+rect 372 247 500 281
+rect 590 247 718 281
+rect -780 21 -746 171
+rect -562 -171 -528 -21
+rect -344 21 -310 171
+rect -126 -171 -92 -21
+rect 92 21 126 171
+rect 310 -171 344 -21
+rect 528 21 562 171
+rect 746 -171 780 -21
+rect -718 -281 -590 -247
+rect -500 -281 -372 -247
+rect -282 -281 -154 -247
+rect -64 -281 64 -247
+rect 154 -281 282 -247
+rect 372 -281 500 -247
+rect 590 -281 718 -247
+<< metal1 >>
+rect -804 419 804 425
+rect -920 385 -874 397
+rect -920 38 -914 385
+rect -880 38 -874 385
+rect -804 385 -792 419
+rect 792 385 804 419
+rect -804 379 804 385
+rect -730 281 -578 287
+rect -730 247 -718 281
+rect -590 247 -578 281
+rect -730 241 -578 247
+rect -512 281 -360 287
+rect -512 247 -500 281
+rect -372 247 -360 281
+rect -512 241 -360 247
+rect -294 281 -142 287
+rect -294 247 -282 281
+rect -154 247 -142 281
+rect -294 241 -142 247
+rect -76 281 76 287
+rect -76 247 -64 281
+rect 64 247 76 281
+rect -76 241 76 247
+rect 142 281 294 287
+rect 142 247 154 281
+rect 282 247 294 281
+rect 142 241 294 247
+rect 360 281 512 287
+rect 360 247 372 281
+rect 500 247 512 281
+rect 360 241 512 247
+rect 578 281 730 287
+rect 578 247 590 281
+rect 718 247 730 281
+rect 578 241 730 247
+rect -920 26 -874 38
+rect -786 171 -740 183
+rect -786 21 -780 171
+rect -746 21 -740 171
+rect -786 9 -740 21
+rect -350 171 -304 183
+rect -350 21 -344 171
+rect -310 21 -304 171
+rect -350 9 -304 21
+rect 86 171 132 183
+rect 86 21 92 171
+rect 126 21 132 171
+rect 86 9 132 21
+rect 522 171 568 183
+rect 522 21 528 171
+rect 562 21 568 171
+rect 522 9 568 21
+rect -568 -21 -522 -9
+rect -568 -171 -562 -21
+rect -528 -171 -522 -21
+rect -568 -183 -522 -171
+rect -132 -21 -86 -9
+rect -132 -171 -126 -21
+rect -92 -171 -86 -21
+rect -132 -183 -86 -171
+rect 304 -21 350 -9
+rect 304 -171 310 -21
+rect 344 -171 350 -21
+rect 304 -183 350 -171
+rect 740 -21 786 -9
+rect 740 -171 746 -21
+rect 780 -171 786 -21
+rect 740 -183 786 -171
+rect -730 -247 -578 -241
+rect -730 -281 -718 -247
+rect -590 -281 -578 -247
+rect -730 -287 -578 -281
+rect -512 -247 -360 -241
+rect -512 -281 -500 -247
+rect -372 -281 -360 -247
+rect -512 -287 -360 -281
+rect -294 -247 -142 -241
+rect -294 -281 -282 -247
+rect -154 -281 -142 -247
+rect -294 -287 -142 -281
+rect -76 -247 76 -241
+rect -76 -281 -64 -247
+rect 64 -281 76 -247
+rect -76 -287 76 -281
+rect 142 -247 294 -241
+rect 142 -281 154 -247
+rect 282 -281 294 -247
+rect 142 -287 294 -281
+rect 360 -247 512 -241
+rect 360 -281 372 -247
+rect 500 -281 512 -247
+rect 360 -287 512 -281
+rect 578 -247 730 -241
+rect 578 -281 590 -247
+rect 718 -281 730 -247
+rect 578 -287 730 -281
+<< properties >>
+string gencell sky130_fd_pr__pfet_g5v0d10v5
+string FIXED_BBOX -897 -402 897 402
+string parameters w 2.00 l 0.80 m 1 nf 7 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__pfet_01v8  sky130_fd_pr__pfet_01v8_lvt sky130_fd_pr__pfet_01v8_hvt  sky130_fd_pr__pfet_g5v0d10v5} full_metal 1 viagl -45 viagr 0 viagt 90 viagb 0 viagate 100 viadrn -40 viasrc +40
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__pfet_g5v0d10v5_YUHPBG.mag b/mag/sky130_fd_pr__pfet_g5v0d10v5_YUHPBG.mag
new file mode 100644
index 0000000..eb421da
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_g5v0d10v5_YUHPBG.mag
@@ -0,0 +1,114 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606063140
+<< error_p >>
+rect -221 351 -220 397
+rect -193 379 -192 419
+<< nwell >>
+rect -338 -497 338 497
+<< mvpmos >>
+rect -80 -200 80 200
+<< mvpdiff >>
+rect -138 188 -80 200
+rect -138 -188 -126 188
+rect -92 -188 -80 188
+rect -138 -200 -80 -188
+rect 80 188 138 200
+rect 80 -188 92 188
+rect 126 -188 138 188
+rect 80 -200 138 -188
+<< mvpdiffc >>
+rect -126 -188 -92 188
+rect 92 -188 126 188
+<< mvnsubdiff >>
+rect -272 419 272 431
+rect -272 385 -164 419
+rect 164 385 272 419
+rect -272 373 272 385
+rect -272 323 -214 373
+rect -272 -323 -260 323
+rect -226 -323 -214 323
+rect 214 323 272 373
+rect -272 -373 -214 -323
+rect 214 -323 226 323
+rect 260 -323 272 323
+rect 214 -373 272 -323
+rect -272 -385 272 -373
+rect -272 -419 -164 -385
+rect 164 -419 272 -385
+rect -272 -431 272 -419
+<< mvnsubdiffcont >>
+rect -164 385 164 419
+rect -260 -323 -226 323
+rect 226 -323 260 323
+rect -164 -419 164 -385
+<< poly >>
+rect -80 281 80 297
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -80 200 80 247
+rect -80 -247 80 -200
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -80 -297 80 -281
+<< polycont >>
+rect -64 247 64 281
+rect -64 -281 64 -247
+<< locali >>
+rect -260 385 -181 419
+rect 181 385 260 419
+rect 226 323 260 385
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -126 188 -92 204
+rect -126 -204 -92 -188
+rect 92 188 126 204
+rect 92 -204 126 -188
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -260 -385 -226 -323
+rect 226 -385 260 -323
+rect -260 -419 -164 -385
+rect 164 -419 260 -385
+<< viali >>
+rect -181 385 -164 419
+rect -164 385 164 419
+rect 164 385 181 419
+rect -260 323 -226 385
+rect -260 0 -226 323
+rect -64 247 64 281
+rect -126 -188 -92 188
+rect 92 -188 126 188
+rect -64 -281 64 -247
+<< metal1 >>
+rect -193 419 193 425
+rect -266 385 -220 397
+rect -266 0 -260 385
+rect -226 0 -220 385
+rect -193 385 -181 419
+rect 181 385 193 419
+rect -193 379 193 385
+rect -76 281 76 287
+rect -76 247 -64 281
+rect 64 247 76 281
+rect -76 241 76 247
+rect -266 -12 -220 0
+rect -132 188 -86 200
+rect -132 -188 -126 188
+rect -92 -188 -86 188
+rect -132 -200 -86 -188
+rect 86 188 132 200
+rect 86 -188 92 188
+rect 126 -188 132 188
+rect 86 -200 132 -188
+rect -76 -247 76 -241
+rect -76 -281 -64 -247
+rect 64 -281 76 -247
+rect -76 -287 76 -281
+<< properties >>
+string gencell sky130_fd_pr__pfet_g5v0d10v5
+string FIXED_BBOX -243 -402 243 402
+string parameters w 2.00 l 0.80 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__pfet_01v8  sky130_fd_pr__pfet_01v8_lvt sky130_fd_pr__pfet_01v8_hvt  sky130_fd_pr__pfet_g5v0d10v5} full_metal 1 viagl -50 viagr 0 viagt 80 viagb 0 viagate 100 viadrn 100 viasrc 100
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__pfet_g5v0d10v5_YUHPXE.mag b/mag/sky130_fd_pr__pfet_g5v0d10v5_YUHPXE.mag
new file mode 100644
index 0000000..19fe898
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_g5v0d10v5_YUHPXE.mag
@@ -0,0 +1,114 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606063140
+<< error_p >>
+rect -221 351 -220 397
+rect -193 379 -192 419
+<< nwell >>
+rect -338 -497 338 497
+<< mvpmos >>
+rect -80 -200 80 200
+<< mvpdiff >>
+rect -138 188 -80 200
+rect -138 -188 -126 188
+rect -92 -188 -80 188
+rect -138 -200 -80 -188
+rect 80 188 138 200
+rect 80 -188 92 188
+rect 126 -188 138 188
+rect 80 -200 138 -188
+<< mvpdiffc >>
+rect -126 -188 -92 188
+rect 92 -188 126 188
+<< mvnsubdiff >>
+rect -272 419 272 431
+rect -272 385 -164 419
+rect 164 385 272 419
+rect -272 373 272 385
+rect -272 323 -214 373
+rect -272 -323 -260 323
+rect -226 -323 -214 323
+rect 214 323 272 373
+rect -272 -373 -214 -323
+rect 214 -323 226 323
+rect 260 -323 272 323
+rect 214 -373 272 -323
+rect -272 -385 272 -373
+rect -272 -419 -164 -385
+rect 164 -419 272 -385
+rect -272 -431 272 -419
+<< mvnsubdiffcont >>
+rect -164 385 164 419
+rect -260 -323 -226 323
+rect 226 -323 260 323
+rect -164 -419 164 -385
+<< poly >>
+rect -80 281 80 297
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -80 200 80 247
+rect -80 -247 80 -200
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -80 -297 80 -281
+<< polycont >>
+rect -64 247 64 281
+rect -64 -281 64 -247
+<< locali >>
+rect -260 385 -181 419
+rect 181 385 260 419
+rect 226 323 260 385
+rect -80 247 -64 281
+rect 64 247 80 281
+rect -126 188 -92 204
+rect -126 -204 -92 -188
+rect 92 188 126 204
+rect 92 -204 126 -188
+rect -80 -281 -64 -247
+rect 64 -281 80 -247
+rect -260 -385 -226 -323
+rect 226 -385 260 -323
+rect -260 -419 -164 -385
+rect 164 -419 260 -385
+<< viali >>
+rect -181 385 -164 419
+rect -164 385 164 419
+rect 164 385 181 419
+rect -260 323 -226 385
+rect -260 38 -226 323
+rect -64 247 64 281
+rect -126 -188 -92 188
+rect 92 -188 126 188
+rect -64 -281 64 -247
+<< metal1 >>
+rect -193 419 193 425
+rect -266 385 -220 397
+rect -266 38 -260 385
+rect -226 38 -220 385
+rect -193 385 -181 419
+rect 181 385 193 419
+rect -193 379 193 385
+rect -76 281 76 287
+rect -76 247 -64 281
+rect 64 247 76 281
+rect -76 241 76 247
+rect -266 26 -220 38
+rect -132 188 -86 200
+rect -132 -188 -126 188
+rect -92 -188 -86 188
+rect -132 -200 -86 -188
+rect 86 188 132 200
+rect 86 -188 92 188
+rect 126 -188 132 188
+rect 86 -200 132 -188
+rect -76 -247 76 -241
+rect -76 -281 -64 -247
+rect 64 -281 76 -247
+rect -76 -287 76 -281
+<< properties >>
+string gencell sky130_fd_pr__pfet_g5v0d10v5
+string FIXED_BBOX -243 -402 243 402
+string parameters w 2.00 l 0.80 m 1 nf 1 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__pfet_01v8  sky130_fd_pr__pfet_01v8_lvt sky130_fd_pr__pfet_01v8_hvt  sky130_fd_pr__pfet_g5v0d10v5} full_metal 1 viagl -45 viagr 0 viagt 80 viagb 0 viagate 100 viadrn 100 viasrc 100
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ.mag b/mag/sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ.mag
new file mode 100644
index 0000000..b8eb64f
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_g5v0d10v5_ZEUEFZ.mag
@@ -0,0 +1,368 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606063140
+<< nwell >>
+rect -1101 -497 1101 497
+<< mvpmos >>
+rect -843 -200 -683 200
+rect -625 -200 -465 200
+rect -407 -200 -247 200
+rect -189 -200 -29 200
+rect 29 -200 189 200
+rect 247 -200 407 200
+rect 465 -200 625 200
+rect 683 -200 843 200
+<< mvpdiff >>
+rect -901 188 -843 200
+rect -901 -188 -889 188
+rect -855 -188 -843 188
+rect -901 -200 -843 -188
+rect -683 188 -625 200
+rect -683 -188 -671 188
+rect -637 -188 -625 188
+rect -683 -200 -625 -188
+rect -465 188 -407 200
+rect -465 -188 -453 188
+rect -419 -188 -407 188
+rect -465 -200 -407 -188
+rect -247 188 -189 200
+rect -247 -188 -235 188
+rect -201 -188 -189 188
+rect -247 -200 -189 -188
+rect -29 188 29 200
+rect -29 -188 -17 188
+rect 17 -188 29 188
+rect -29 -200 29 -188
+rect 189 188 247 200
+rect 189 -188 201 188
+rect 235 -188 247 188
+rect 189 -200 247 -188
+rect 407 188 465 200
+rect 407 -188 419 188
+rect 453 -188 465 188
+rect 407 -200 465 -188
+rect 625 188 683 200
+rect 625 -188 637 188
+rect 671 -188 683 188
+rect 625 -200 683 -188
+rect 843 188 901 200
+rect 843 -188 855 188
+rect 889 -188 901 188
+rect 843 -200 901 -188
+<< mvpdiffc >>
+rect -889 -188 -855 188
+rect -671 -188 -637 188
+rect -453 -188 -419 188
+rect -235 -188 -201 188
+rect -17 -188 17 188
+rect 201 -188 235 188
+rect 419 -188 453 188
+rect 637 -188 671 188
+rect 855 -188 889 188
+<< mvnsubdiff >>
+rect -1035 419 1035 431
+rect -1035 385 -927 419
+rect 927 385 1035 419
+rect -1035 373 1035 385
+rect -1035 323 -977 373
+rect -1035 -323 -1023 323
+rect -989 -323 -977 323
+rect 977 323 1035 373
+rect -1035 -373 -977 -323
+rect 977 -323 989 323
+rect 1023 -323 1035 323
+rect 977 -373 1035 -323
+rect -1035 -385 1035 -373
+rect -1035 -419 -927 -385
+rect 927 -419 1035 -385
+rect -1035 -431 1035 -419
+<< mvnsubdiffcont >>
+rect -927 385 927 419
+rect -1023 -323 -989 323
+rect 989 -323 1023 323
+rect -927 -419 927 -385
+<< poly >>
+rect -843 281 -683 297
+rect -843 247 -827 281
+rect -699 247 -683 281
+rect -843 200 -683 247
+rect -625 281 -465 297
+rect -625 247 -609 281
+rect -481 247 -465 281
+rect -625 200 -465 247
+rect -407 281 -247 297
+rect -407 247 -391 281
+rect -263 247 -247 281
+rect -407 200 -247 247
+rect -189 281 -29 297
+rect -189 247 -173 281
+rect -45 247 -29 281
+rect -189 200 -29 247
+rect 29 281 189 297
+rect 29 247 45 281
+rect 173 247 189 281
+rect 29 200 189 247
+rect 247 281 407 297
+rect 247 247 263 281
+rect 391 247 407 281
+rect 247 200 407 247
+rect 465 281 625 297
+rect 465 247 481 281
+rect 609 247 625 281
+rect 465 200 625 247
+rect 683 281 843 297
+rect 683 247 699 281
+rect 827 247 843 281
+rect 683 200 843 247
+rect -843 -247 -683 -200
+rect -843 -281 -827 -247
+rect -699 -281 -683 -247
+rect -843 -297 -683 -281
+rect -625 -247 -465 -200
+rect -625 -281 -609 -247
+rect -481 -281 -465 -247
+rect -625 -297 -465 -281
+rect -407 -247 -247 -200
+rect -407 -281 -391 -247
+rect -263 -281 -247 -247
+rect -407 -297 -247 -281
+rect -189 -247 -29 -200
+rect -189 -281 -173 -247
+rect -45 -281 -29 -247
+rect -189 -297 -29 -281
+rect 29 -247 189 -200
+rect 29 -281 45 -247
+rect 173 -281 189 -247
+rect 29 -297 189 -281
+rect 247 -247 407 -200
+rect 247 -281 263 -247
+rect 391 -281 407 -247
+rect 247 -297 407 -281
+rect 465 -247 625 -200
+rect 465 -281 481 -247
+rect 609 -281 625 -247
+rect 465 -297 625 -281
+rect 683 -247 843 -200
+rect 683 -281 699 -247
+rect 827 -281 843 -247
+rect 683 -297 843 -281
+<< polycont >>
+rect -827 247 -699 281
+rect -609 247 -481 281
+rect -391 247 -263 281
+rect -173 247 -45 281
+rect 45 247 173 281
+rect 263 247 391 281
+rect 481 247 609 281
+rect 699 247 827 281
+rect -827 -281 -699 -247
+rect -609 -281 -481 -247
+rect -391 -281 -263 -247
+rect -173 -281 -45 -247
+rect 45 -281 173 -247
+rect 263 -281 391 -247
+rect 481 -281 609 -247
+rect 699 -281 827 -247
+<< locali >>
+rect -1023 385 -927 419
+rect 927 385 1023 419
+rect 989 323 1023 385
+rect -843 247 -827 281
+rect -699 247 -683 281
+rect -625 247 -609 281
+rect -481 247 -465 281
+rect -407 247 -391 281
+rect -263 247 -247 281
+rect -189 247 -173 281
+rect -45 247 -29 281
+rect 29 247 45 281
+rect 173 247 189 281
+rect 247 247 263 281
+rect 391 247 407 281
+rect 465 247 481 281
+rect 609 247 625 281
+rect 683 247 699 281
+rect 827 247 843 281
+rect -889 188 -855 204
+rect -889 -204 -855 -188
+rect -671 188 -637 204
+rect -671 -204 -637 -188
+rect -453 188 -419 204
+rect -453 -204 -419 -188
+rect -235 188 -201 204
+rect -235 -204 -201 -188
+rect -17 188 17 204
+rect -17 -204 17 -188
+rect 201 188 235 204
+rect 201 -204 235 -188
+rect 419 188 453 204
+rect 419 -204 453 -188
+rect 637 188 671 204
+rect 637 -204 671 -188
+rect 855 188 889 204
+rect 855 -204 889 -188
+rect -843 -281 -827 -247
+rect -699 -281 -683 -247
+rect -625 -281 -609 -247
+rect -481 -281 -465 -247
+rect -407 -281 -391 -247
+rect -263 -281 -247 -247
+rect -189 -281 -173 -247
+rect -45 -281 -29 -247
+rect 29 -281 45 -247
+rect 173 -281 189 -247
+rect 247 -281 263 -247
+rect 391 -281 407 -247
+rect 465 -281 481 -247
+rect 609 -281 625 -247
+rect 683 -281 699 -247
+rect 827 -281 843 -247
+rect -1023 -385 -989 -323
+rect 989 -385 1023 -323
+rect -1023 -419 -927 -385
+rect 927 -419 1023 -385
+<< viali >>
+rect -890 385 890 419
+rect -1023 323 -989 385
+rect -1023 0 -989 323
+rect -827 247 -699 281
+rect -609 247 -481 281
+rect -391 247 -263 281
+rect -173 247 -45 281
+rect 45 247 173 281
+rect 263 247 391 281
+rect 481 247 609 281
+rect 699 247 827 281
+rect -889 21 -855 171
+rect -671 -171 -637 -21
+rect -453 21 -419 171
+rect -235 -171 -201 -21
+rect -17 21 17 171
+rect 201 -171 235 -21
+rect 419 21 453 171
+rect 637 -171 671 -21
+rect 855 21 889 171
+rect -827 -281 -699 -247
+rect -609 -281 -481 -247
+rect -391 -281 -263 -247
+rect -173 -281 -45 -247
+rect 45 -281 173 -247
+rect 263 -281 391 -247
+rect 481 -281 609 -247
+rect 699 -281 827 -247
+<< metal1 >>
+rect -902 419 902 425
+rect -1029 385 -983 397
+rect -1029 0 -1023 385
+rect -989 0 -983 385
+rect -902 385 -890 419
+rect 890 385 902 419
+rect -902 379 902 385
+rect -839 281 -687 287
+rect -839 247 -827 281
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+rect -621 281 -469 287
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+rect -403 241 -251 247
+rect -185 281 -33 287
+rect -185 247 -173 281
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+rect -185 241 -33 247
+rect 33 281 185 287
+rect 33 247 45 281
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+rect 469 281 621 287
+rect 469 247 481 281
+rect 609 247 621 281
+rect 469 241 621 247
+rect 687 281 839 287
+rect 687 247 699 281
+rect 827 247 839 281
+rect 687 241 839 247
+rect -895 171 -849 183
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+rect -895 9 -849 21
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+rect -459 9 -413 21
+rect -23 171 23 183
+rect -23 21 -17 171
+rect 17 21 23 171
+rect -23 9 23 21
+rect 413 171 459 183
+rect 413 21 419 171
+rect 453 21 459 171
+rect 413 9 459 21
+rect 849 171 895 183
+rect 849 21 855 171
+rect 889 21 895 171
+rect 849 9 895 21
+rect -1029 -12 -983 0
+rect -677 -21 -631 -9
+rect -677 -171 -671 -21
+rect -637 -171 -631 -21
+rect -677 -183 -631 -171
+rect -241 -21 -195 -9
+rect -241 -171 -235 -21
+rect -201 -171 -195 -21
+rect -241 -183 -195 -171
+rect 195 -21 241 -9
+rect 195 -171 201 -21
+rect 235 -171 241 -21
+rect 195 -183 241 -171
+rect 631 -21 677 -9
+rect 631 -171 637 -21
+rect 671 -171 677 -21
+rect 631 -183 677 -171
+rect -839 -247 -687 -241
+rect -839 -281 -827 -247
+rect -699 -281 -687 -247
+rect -839 -287 -687 -281
+rect -621 -247 -469 -241
+rect -621 -281 -609 -247
+rect -481 -281 -469 -247
+rect -621 -287 -469 -281
+rect -403 -247 -251 -241
+rect -403 -281 -391 -247
+rect -263 -281 -251 -247
+rect -403 -287 -251 -281
+rect -185 -247 -33 -241
+rect -185 -281 -173 -247
+rect -45 -281 -33 -247
+rect -185 -287 -33 -281
+rect 33 -247 185 -241
+rect 33 -281 45 -247
+rect 173 -281 185 -247
+rect 33 -287 185 -281
+rect 251 -247 403 -241
+rect 251 -281 263 -247
+rect 391 -281 403 -247
+rect 251 -287 403 -281
+rect 469 -247 621 -241
+rect 469 -281 481 -247
+rect 609 -281 621 -247
+rect 469 -287 621 -281
+rect 687 -247 839 -241
+rect 687 -281 699 -247
+rect 827 -281 839 -247
+rect 687 -287 839 -281
+<< properties >>
+string gencell sky130_fd_pr__pfet_g5v0d10v5
+string FIXED_BBOX -1006 -402 1006 402
+string parameters w 2.00 l 0.80 m 1 nf 8 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__pfet_01v8  sky130_fd_pr__pfet_01v8_lvt sky130_fd_pr__pfet_01v8_hvt  sky130_fd_pr__pfet_g5v0d10v5} full_metal 1 viagl -50 viagr 0 viagt 90 viagb 0 viagate 100 viadrn -40 viasrc +40
+string library sky130
+<< end >>
diff --git a/mag/sky130_fd_pr__res_xhigh_po_0p69_S5N9F3.mag b/mag/sky130_fd_pr__res_xhigh_po_0p69_S5N9F3.mag
new file mode 100644
index 0000000..5bd3cec
--- /dev/null
+++ b/mag/sky130_fd_pr__res_xhigh_po_0p69_S5N9F3.mag
@@ -0,0 +1,167 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1606074388
+<< pwell >>
+rect -5446 -3098 5446 3098
+<< psubdiff >>
+rect -5410 3028 -5314 3062
+rect 5314 3028 5410 3062
+rect -5410 2966 -5376 3028
+rect 5376 2966 5410 3028
+rect -5410 -3028 -5376 -2966
+rect 5376 -3028 5410 -2966
+rect -5410 -3062 -5314 -3028
+rect 5314 -3062 5410 -3028
+<< psubdiffcont >>
+rect -5314 3028 5314 3062
+rect -5410 -2966 -5376 2966
+rect 5376 -2966 5410 2966
+rect -5314 -3062 5314 -3028
+<< xpolycontact >>
+rect -5280 2500 -5142 2932
+rect -5280 -2932 -5142 -2500
+rect -4894 2500 -4756 2932
+rect -4894 -2932 -4756 -2500
+rect -4508 2500 -4370 2932
+rect -4508 -2932 -4370 -2500
+rect -4122 2500 -3984 2932
+rect -4122 -2932 -3984 -2500
+rect -3736 2500 -3598 2932
+rect -3736 -2932 -3598 -2500
+rect -3350 2500 -3212 2932
+rect -3350 -2932 -3212 -2500
+rect -2964 2500 -2826 2932
+rect -2964 -2932 -2826 -2500
+rect -2578 2500 -2440 2932
+rect -2578 -2932 -2440 -2500
+rect -2192 2500 -2054 2932
+rect -2192 -2932 -2054 -2500
+rect -1806 2500 -1668 2932
+rect -1806 -2932 -1668 -2500
+rect -1420 2500 -1282 2932
+rect -1420 -2932 -1282 -2500
+rect -1034 2500 -896 2932
+rect -1034 -2932 -896 -2500
+rect -648 2500 -510 2932
+rect -648 -2932 -510 -2500
+rect -262 2500 -124 2932
+rect -262 -2932 -124 -2500
+rect 124 2500 262 2932
+rect 124 -2932 262 -2500
+rect 510 2500 648 2932
+rect 510 -2932 648 -2500
+rect 896 2500 1034 2932
+rect 896 -2932 1034 -2500
+rect 1282 2500 1420 2932
+rect 1282 -2932 1420 -2500
+rect 1668 2500 1806 2932
+rect 1668 -2932 1806 -2500
+rect 2054 2500 2192 2932
+rect 2054 -2932 2192 -2500
+rect 2440 2500 2578 2932
+rect 2440 -2932 2578 -2500
+rect 2826 2500 2964 2932
+rect 2826 -2932 2964 -2500
+rect 3212 2500 3350 2932
+rect 3212 -2932 3350 -2500
+rect 3598 2500 3736 2932
+rect 3598 -2932 3736 -2500
+rect 3984 2500 4122 2932
+rect 3984 -2932 4122 -2500
+rect 4370 2500 4508 2932
+rect 4370 -2932 4508 -2500
+rect 4756 2500 4894 2932
+rect 4756 -2932 4894 -2500
+rect 5142 2500 5280 2932
+rect 5142 -2932 5280 -2500
+<< xpolyres >>
+rect -5280 -2500 -5142 2500
+rect -4894 -2500 -4756 2500
+rect -4508 -2500 -4370 2500
+rect -4122 -2500 -3984 2500
+rect -3736 -2500 -3598 2500
+rect -3350 -2500 -3212 2500
+rect -2964 -2500 -2826 2500
+rect -2578 -2500 -2440 2500
+rect -2192 -2500 -2054 2500
+rect -1806 -2500 -1668 2500
+rect -1420 -2500 -1282 2500
+rect -1034 -2500 -896 2500
+rect -648 -2500 -510 2500
+rect -262 -2500 -124 2500
+rect 124 -2500 262 2500
+rect 510 -2500 648 2500
+rect 896 -2500 1034 2500
+rect 1282 -2500 1420 2500
+rect 1668 -2500 1806 2500
+rect 2054 -2500 2192 2500
+rect 2440 -2500 2578 2500
+rect 2826 -2500 2964 2500
+rect 3212 -2500 3350 2500
+rect 3598 -2500 3736 2500
+rect 3984 -2500 4122 2500
+rect 4370 -2500 4508 2500
+rect 4756 -2500 4894 2500
+rect 5142 -2500 5280 2500
+<< locali >>
+rect -5410 3028 -5314 3062
+rect 5314 3028 5410 3062
+rect -5410 2966 -5376 3028
+rect 5376 2966 5410 3028
+rect -5410 -3028 -5376 -2966
+rect 5376 -3028 5410 -2966
+rect -5410 -3062 -5314 -3028
+rect 5314 -3062 5410 -3028
+<< viali >>
+rect -5410 -2725 -5376 2725
+rect 5376 -2725 5410 2725
+rect -4838 -3062 4838 -3028
+<< metal1 >>
+rect -5416 2725 -5370 2737
+rect -5416 -2725 -5410 2725
+rect -5376 -2725 -5370 2725
+rect -5416 -2737 -5370 -2725
+rect 5370 2725 5416 2737
+rect 5370 -2725 5376 2725
+rect 5410 -2725 5416 2725
+rect 5370 -2737 5416 -2725
+rect -4850 -3028 4850 -3022
+rect -4850 -3062 -4838 -3028
+rect 4838 -3062 4850 -3028
+rect -4850 -3068 4850 -3062
+<< res0p69 >>
+rect -5282 -2502 -5140 2502
+rect -4896 -2502 -4754 2502
+rect -4510 -2502 -4368 2502
+rect -4124 -2502 -3982 2502
+rect -3738 -2502 -3596 2502
+rect -3352 -2502 -3210 2502
+rect -2966 -2502 -2824 2502
+rect -2580 -2502 -2438 2502
+rect -2194 -2502 -2052 2502
+rect -1808 -2502 -1666 2502
+rect -1422 -2502 -1280 2502
+rect -1036 -2502 -894 2502
+rect -650 -2502 -508 2502
+rect -264 -2502 -122 2502
+rect 122 -2502 264 2502
+rect 508 -2502 650 2502
+rect 894 -2502 1036 2502
+rect 1280 -2502 1422 2502
+rect 1666 -2502 1808 2502
+rect 2052 -2502 2194 2502
+rect 2438 -2502 2580 2502
+rect 2824 -2502 2966 2502
+rect 3210 -2502 3352 2502
+rect 3596 -2502 3738 2502
+rect 3982 -2502 4124 2502
+rect 4368 -2502 4510 2502
+rect 4754 -2502 4896 2502
+rect 5140 -2502 5282 2502
+<< properties >>
+string gencell sky130_fd_pr__res_xhigh_po_0p69
+string FIXED_BBOX -5393 -3045 5393 3045
+string parameters w 0.69 l 25.0 m 1 nx 28 wmin 0.690 lmin 0.50 rho 2000 val 72.811k dummy 0 dw 0.0 term 120 sterm 0.0 caplen 0 wmax 0.690 guard 1 glc 1 grc 1 gtc 1 gbc 1 compatible {sky130_fd_pr__res_xhigh_po_0p35  sky130_fd_pr__res_xhigh_po_0p69 sky130_fd_pr__res_xhigh_po_1p41  sky130_fd_pr__res_xhigh_po_2p85 sky130_fd_pr__res_xhigh_po_5p73} full_metal 1 vias 0 viagb 90 viagt 0 viagl 90 viagr 90
+string library sky130
+<< end >>
diff --git a/mag/user_analog_proj_example.mag b/mag/user_analog_proj_example.mag
new file mode 100644
index 0000000..8d043ee
--- /dev/null
+++ b/mag/user_analog_proj_example.mag
@@ -0,0 +1,12 @@
+magic
+tech sky130A
+timestamp 1619633068
+use simple_por  simple_por_1
+timestamp 1619633068
+transform 1 0 7066 0 1 -11
+box 0 0 5672 4169
+use simple_por  simple_por_0
+timestamp 1619633068
+transform 1 0 -13 0 1 -7
+box 0 0 5672 4169
+<< end >>
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
new file mode 100644
index 0000000..e10e4e7
--- /dev/null
+++ b/mag/user_analog_project_wrapper.mag
@@ -0,0 +1,2521 @@
+magic
+tech sky130A
+timestamp 1619448499
+<< metal2 >>
+rect 9701 351760 9757 352480
+rect 29159 351760 29215 352480
+rect 48617 351760 48673 352480
+rect 68075 351760 68131 352480
+rect 87533 351760 87589 352480
+rect 107037 351760 107093 352480
+rect 126495 351760 126551 352480
+rect 145953 351760 146009 352480
+rect 165411 351760 165467 352480
+rect 184869 351760 184925 352480
+rect 204373 351760 204429 352480
+rect 223831 351760 223887 352480
+rect 243289 351760 243345 352480
+rect 262747 351760 262803 352480
+rect 282205 351760 282261 352480
+rect 271 -480 327 240
+rect 823 -480 879 240
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+rect 2019 -480 2075 240
+rect 2617 -480 2673 240
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+<< via4 >>
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+<< metal5 >>
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+rect 295950 -3753 296250 -3752
+<< labels >>
+rlabel metal3 s 291760 141210 292480 141330 6 gpio_analog[0]
+port 0 nsew signal bidirectional
+rlabel metal3 s -480 279114 240 279234 4 gpio_analog[10]
+port 1 nsew signal bidirectional
+rlabel metal3 s -480 250962 240 251082 4 gpio_analog[11]
+port 2 nsew signal bidirectional
+rlabel metal3 s -480 222810 240 222930 4 gpio_analog[12]
+port 3 nsew signal bidirectional
+rlabel metal3 s -480 194658 240 194778 4 gpio_analog[13]
+port 4 nsew signal bidirectional
+rlabel metal3 s -480 166506 240 166626 4 gpio_analog[14]
+port 5 nsew signal bidirectional
+rlabel metal3 s -480 138354 240 138474 4 gpio_analog[15]
+port 6 nsew signal bidirectional
+rlabel metal3 s -480 110202 240 110322 4 gpio_analog[16]
+port 7 nsew signal bidirectional
+rlabel metal3 s -480 82050 240 82170 4 gpio_analog[17]
+port 8 nsew signal bidirectional
+rlabel metal3 s 291760 170926 292480 171046 6 gpio_analog[1]
+port 9 nsew signal bidirectional
+rlabel metal3 s 291760 200710 292480 200830 6 gpio_analog[2]
+port 10 nsew signal bidirectional
+rlabel metal3 s 291760 230426 292480 230546 6 gpio_analog[3]
+port 11 nsew signal bidirectional
+rlabel metal3 s 291760 260142 292480 260262 6 gpio_analog[4]
+port 12 nsew signal bidirectional
+rlabel metal3 s 291760 289926 292480 290046 6 gpio_analog[5]
+port 13 nsew signal bidirectional
+rlabel metal3 s 291760 319642 292480 319762 6 gpio_analog[6]
+port 14 nsew signal bidirectional
+rlabel metal3 s -480 344802 240 344922 4 gpio_analog[7]
+port 15 nsew signal bidirectional
+rlabel metal3 s -480 335418 240 335538 4 gpio_analog[8]
+port 16 nsew signal bidirectional
+rlabel metal3 s -480 307266 240 307386 4 gpio_analog[9]
+port 17 nsew signal bidirectional
+rlabel metal3 s 291760 146174 292480 146294 6 gpio_noesd[0]
+port 18 nsew signal bidirectional
+rlabel metal3 s -480 274422 240 274542 4 gpio_noesd[10]
+port 19 nsew signal bidirectional
+rlabel metal3 s -480 246270 240 246390 4 gpio_noesd[11]
+port 20 nsew signal bidirectional
+rlabel metal3 s -480 218118 240 218238 4 gpio_noesd[12]
+port 21 nsew signal bidirectional
+rlabel metal3 s -480 189966 240 190086 4 gpio_noesd[13]
+port 22 nsew signal bidirectional
+rlabel metal3 s -480 161814 240 161934 4 gpio_noesd[14]
+port 23 nsew signal bidirectional
+rlabel metal3 s -480 133662 240 133782 4 gpio_noesd[15]
+port 24 nsew signal bidirectional
+rlabel metal3 s -480 105510 240 105630 4 gpio_noesd[16]
+port 25 nsew signal bidirectional
+rlabel metal3 s -480 77358 240 77478 4 gpio_noesd[17]
+port 26 nsew signal bidirectional
+rlabel metal3 s 291760 175890 292480 176010 6 gpio_noesd[1]
+port 27 nsew signal bidirectional
+rlabel metal3 s 291760 205606 292480 205726 6 gpio_noesd[2]
+port 28 nsew signal bidirectional
+rlabel metal3 s 291760 235390 292480 235510 6 gpio_noesd[3]
+port 29 nsew signal bidirectional
+rlabel metal3 s 291760 265106 292480 265226 6 gpio_noesd[4]
+port 30 nsew signal bidirectional
+rlabel metal3 s 291760 294890 292480 295010 6 gpio_noesd[5]
+port 31 nsew signal bidirectional
+rlabel metal3 s 291760 324606 292480 324726 6 gpio_noesd[6]
+port 32 nsew signal bidirectional
+rlabel metal3 s -480 340110 240 340230 4 gpio_noesd[7]
+port 33 nsew signal bidirectional
+rlabel metal3 s -480 330726 240 330846 4 gpio_noesd[8]
+port 34 nsew signal bidirectional
+rlabel metal3 s -480 302574 240 302694 4 gpio_noesd[9]
+port 35 nsew signal bidirectional
+rlabel metal3 s 291760 349426 292480 349546 6 io_analog[0]
+port 36 nsew signal bidirectional
+rlabel metal3 s -480 349494 240 349614 4 io_analog[10]
+port 37 nsew signal bidirectional
+rlabel metal2 s 282205 351760 282261 352480 6 io_analog[1]
+port 38 nsew signal bidirectional
+rlabel metal2 s 262747 351760 262803 352480 6 io_analog[2]
+port 39 nsew signal bidirectional
+rlabel metal2 s 243289 351760 243345 352480 6 io_analog[3]
+port 40 nsew signal bidirectional
+rlabel metal2 s 184869 351760 184925 352480 6 io_analog[4]
+port 41 nsew signal bidirectional
+rlabel metal2 s 126495 351760 126551 352480 6 io_analog[5]
+port 42 nsew signal bidirectional
+rlabel metal2 s 68075 351760 68131 352480 6 io_analog[6]
+port 43 nsew signal bidirectional
+rlabel metal2 s 48617 351760 48673 352480 6 io_analog[7]
+port 44 nsew signal bidirectional
+rlabel metal2 s 29159 351760 29215 352480 6 io_analog[8]
+port 45 nsew signal bidirectional
+rlabel metal2 s 9701 351760 9757 352480 6 io_analog[9]
+port 46 nsew signal bidirectional
+rlabel metal2 s 223831 351760 223887 352480 6 io_clamp_high[0]
+port 47 nsew signal bidirectional
+rlabel metal2 s 165411 351760 165467 352480 6 io_clamp_high[1]
+port 48 nsew signal bidirectional
+rlabel metal2 s 107037 351760 107093 352480 6 io_clamp_high[2]
+port 49 nsew signal bidirectional
+rlabel metal2 s 204373 351760 204429 352480 6 io_clamp_low[0]
+port 50 nsew signal bidirectional
+rlabel metal2 s 145953 351760 146009 352480 6 io_clamp_low[1]
+port 51 nsew signal bidirectional
+rlabel metal2 s 87533 351760 87589 352480 6 io_clamp_low[2]
+port 52 nsew signal bidirectional
+rlabel metal3 s 291760 7318 292480 7438 6 io_in[0]
+port 53 nsew signal input
+rlabel metal3 s 291760 12282 292480 12402 6 io_out[0]
+port 54 nsew signal tristate
+rlabel metal3 s 291760 245318 292480 245438 6 io_in[10]
+port 55 nsew signal input
+rlabel metal3 s 291760 250282 292480 250402 6 io_out[10]
+port 56 nsew signal tristate
+rlabel metal3 s 291760 275034 292480 275154 6 io_in[11]
+port 57 nsew signal input
+rlabel metal3 s 291760 279998 292480 280118 6 io_out[11]
+port 58 nsew signal tristate
+rlabel metal3 s 291760 304750 292480 304870 6 io_in[12]
+port 59 nsew signal input
+rlabel metal3 s 291760 309714 292480 309834 6 io_out[12]
+port 60 nsew signal tristate
+rlabel metal3 s 291760 334534 292480 334654 6 io_in[13]
+port 61 nsew signal input
+rlabel metal3 s 291760 339498 292480 339618 6 io_out[13]
+port 62 nsew signal tristate
+rlabel metal3 s -480 321342 240 321462 4 io_in[14]
+port 63 nsew signal input
+rlabel metal3 s -480 316650 240 316770 4 io_out[14]
+port 64 nsew signal tristate
+rlabel metal3 s -480 293190 240 293310 4 io_in[15]
+port 65 nsew signal input
+rlabel metal3 s -480 288498 240 288618 4 io_out[15]
+port 66 nsew signal tristate
+rlabel metal3 s -480 265038 240 265158 4 io_in[16]
+port 67 nsew signal input
+rlabel metal3 s -480 260346 240 260466 4 io_out[16]
+port 68 nsew signal tristate
+rlabel metal3 s -480 236886 240 237006 4 io_in[17]
+port 69 nsew signal input
+rlabel metal3 s -480 232194 240 232314 4 io_out[17]
+port 70 nsew signal tristate
+rlabel metal3 s -480 208734 240 208854 4 io_in[18]
+port 71 nsew signal input
+rlabel metal3 s -480 204042 240 204162 4 io_out[18]
+port 72 nsew signal tristate
+rlabel metal3 s -480 180582 240 180702 4 io_in[19]
+port 73 nsew signal input
+rlabel metal3 s -480 175890 240 176010 4 io_out[19]
+port 74 nsew signal tristate
+rlabel metal3 s 291760 27174 292480 27294 6 io_in[1]
+port 75 nsew signal input
+rlabel metal3 s 291760 32138 292480 32258 6 io_out[1]
+port 76 nsew signal tristate
+rlabel metal3 s -480 152430 240 152550 4 io_in[20]
+port 77 nsew signal input
+rlabel metal3 s -480 147738 240 147858 4 io_out[20]
+port 78 nsew signal tristate
+rlabel metal3 s -480 124278 240 124398 4 io_in[21]
+port 79 nsew signal input
+rlabel metal3 s -480 119586 240 119706 4 io_out[21]
+port 80 nsew signal tristate
+rlabel metal3 s -480 96126 240 96246 4 io_in[22]
+port 81 nsew signal input
+rlabel metal3 s -480 91434 240 91554 4 io_out[22]
+port 82 nsew signal tristate
+rlabel metal3 s -480 67974 240 68094 4 io_in[23]
+port 83 nsew signal input
+rlabel metal3 s -480 63282 240 63402 4 io_out[23]
+port 84 nsew signal tristate
+rlabel metal3 s -480 49206 240 49326 4 io_in[24]
+port 85 nsew signal input
+rlabel metal3 s -480 44514 240 44634 4 io_out[24]
+port 86 nsew signal tristate
+rlabel metal3 s -480 30438 240 30558 4 io_in[25]
+port 87 nsew signal input
+rlabel metal3 s -480 25746 240 25866 4 io_out[25]
+port 88 nsew signal tristate
+rlabel metal3 s -480 11670 240 11790 4 io_in[26]
+port 89 nsew signal input
+rlabel metal3 s -480 6978 240 7098 4 io_out[26]
+port 90 nsew signal tristate
+rlabel metal3 s 291760 47030 292480 47150 6 io_in[2]
+port 91 nsew signal input
+rlabel metal3 s 291760 51994 292480 52114 6 io_out[2]
+port 92 nsew signal tristate
+rlabel metal3 s 291760 66818 292480 66938 6 io_in[3]
+port 93 nsew signal input
+rlabel metal3 s 291760 71782 292480 71902 6 io_out[3]
+port 94 nsew signal tristate
+rlabel metal3 s 291760 86674 292480 86794 6 io_in[4]
+port 95 nsew signal input
+rlabel metal3 s 291760 91638 292480 91758 6 io_out[4]
+port 96 nsew signal tristate
+rlabel metal3 s 291760 106462 292480 106582 6 io_in[5]
+port 97 nsew signal input
+rlabel metal3 s 291760 111426 292480 111546 6 io_out[5]
+port 98 nsew signal tristate
+rlabel metal3 s 291760 126318 292480 126438 6 io_in[6]
+port 99 nsew signal input
+rlabel metal3 s 291760 131282 292480 131402 6 io_out[6]
+port 100 nsew signal tristate
+rlabel metal3 s 291760 156034 292480 156154 6 io_in[7]
+port 101 nsew signal input
+rlabel metal3 s 291760 160998 292480 161118 6 io_out[7]
+port 102 nsew signal tristate
+rlabel metal3 s 291760 185818 292480 185938 6 io_in[8]
+port 103 nsew signal input
+rlabel metal3 s 291760 190782 292480 190902 6 io_out[8]
+port 104 nsew signal tristate
+rlabel metal3 s 291760 215534 292480 215654 6 io_in[9]
+port 105 nsew signal input
+rlabel metal3 s 291760 220498 292480 220618 6 io_out[9]
+port 106 nsew signal tristate
+rlabel metal3 s 291760 2422 292480 2542 6 io_in_3v3[0]
+port 107 nsew signal input
+rlabel metal3 s 291760 240354 292480 240474 6 io_in_3v3[10]
+port 108 nsew signal input
+rlabel metal3 s 291760 270070 292480 270190 6 io_in_3v3[11]
+port 109 nsew signal input
+rlabel metal3 s 291760 299854 292480 299974 6 io_in_3v3[12]
+port 110 nsew signal input
+rlabel metal3 s 291760 329570 292480 329690 6 io_in_3v3[13]
+port 111 nsew signal input
+rlabel metal3 s -480 326034 240 326154 4 io_in_3v3[14]
+port 112 nsew signal input
+rlabel metal3 s -480 297882 240 298002 4 io_in_3v3[15]
+port 113 nsew signal input
+rlabel metal3 s -480 269730 240 269850 4 io_in_3v3[16]
+port 114 nsew signal input
+rlabel metal3 s -480 241578 240 241698 4 io_in_3v3[17]
+port 115 nsew signal input
+rlabel metal3 s -480 213426 240 213546 4 io_in_3v3[18]
+port 116 nsew signal input
+rlabel metal3 s -480 185274 240 185394 4 io_in_3v3[19]
+port 117 nsew signal input
+rlabel metal3 s 291760 22210 292480 22330 6 io_in_3v3[1]
+port 118 nsew signal input
+rlabel metal3 s -480 157122 240 157242 4 io_in_3v3[20]
+port 119 nsew signal input
+rlabel metal3 s -480 128970 240 129090 4 io_in_3v3[21]
+port 120 nsew signal input
+rlabel metal3 s -480 100818 240 100938 4 io_in_3v3[22]
+port 121 nsew signal input
+rlabel metal3 s -480 72666 240 72786 4 io_in_3v3[23]
+port 122 nsew signal input
+rlabel metal3 s -480 53898 240 54018 4 io_in_3v3[24]
+port 123 nsew signal input
+rlabel metal3 s -480 35130 240 35250 4 io_in_3v3[25]
+port 124 nsew signal input
+rlabel metal3 s -480 16362 240 16482 4 io_in_3v3[26]
+port 125 nsew signal input
+rlabel metal3 s 291760 42066 292480 42186 6 io_in_3v3[2]
+port 126 nsew signal input
+rlabel metal3 s 291760 61854 292480 61974 6 io_in_3v3[3]
+port 127 nsew signal input
+rlabel metal3 s 291760 81710 292480 81830 6 io_in_3v3[4]
+port 128 nsew signal input
+rlabel metal3 s 291760 101566 292480 101686 6 io_in_3v3[5]
+port 129 nsew signal input
+rlabel metal3 s 291760 121354 292480 121474 6 io_in_3v3[6]
+port 130 nsew signal input
+rlabel metal3 s 291760 151138 292480 151258 6 io_in_3v3[7]
+port 131 nsew signal input
+rlabel metal3 s 291760 180854 292480 180974 6 io_in_3v3[8]
+port 132 nsew signal input
+rlabel metal3 s 291760 210570 292480 210690 6 io_in_3v3[9]
+port 133 nsew signal input
+rlabel metal3 s 291760 17246 292480 17366 6 io_oeb[0]
+port 134 nsew signal tristate
+rlabel metal3 s 291760 255178 292480 255298 6 io_oeb[10]
+port 135 nsew signal tristate
+rlabel metal3 s 291760 284962 292480 285082 6 io_oeb[11]
+port 136 nsew signal tristate
+rlabel metal3 s 291760 314678 292480 314798 6 io_oeb[12]
+port 137 nsew signal tristate
+rlabel metal3 s 291760 344462 292480 344582 6 io_oeb[13]
+port 138 nsew signal tristate
+rlabel metal3 s -480 311958 240 312078 4 io_oeb[14]
+port 139 nsew signal tristate
+rlabel metal3 s -480 283806 240 283926 4 io_oeb[15]
+port 140 nsew signal tristate
+rlabel metal3 s -480 255654 240 255774 4 io_oeb[16]
+port 141 nsew signal tristate
+rlabel metal3 s -480 227502 240 227622 4 io_oeb[17]
+port 142 nsew signal tristate
+rlabel metal3 s -480 199350 240 199470 4 io_oeb[18]
+port 143 nsew signal tristate
+rlabel metal3 s -480 171198 240 171318 4 io_oeb[19]
+port 144 nsew signal tristate
+rlabel metal3 s 291760 37102 292480 37222 6 io_oeb[1]
+port 145 nsew signal tristate
+rlabel metal3 s -480 143046 240 143166 4 io_oeb[20]
+port 146 nsew signal tristate
+rlabel metal3 s -480 114894 240 115014 4 io_oeb[21]
+port 147 nsew signal tristate
+rlabel metal3 s -480 86742 240 86862 4 io_oeb[22]
+port 148 nsew signal tristate
+rlabel metal3 s -480 58590 240 58710 4 io_oeb[23]
+port 149 nsew signal tristate
+rlabel metal3 s -480 39822 240 39942 4 io_oeb[24]
+port 150 nsew signal tristate
+rlabel metal3 s -480 21054 240 21174 4 io_oeb[25]
+port 151 nsew signal tristate
+rlabel metal3 s -480 2286 240 2406 4 io_oeb[26]
+port 152 nsew signal tristate
+rlabel metal3 s 291760 56890 292480 57010 6 io_oeb[2]
+port 153 nsew signal tristate
+rlabel metal3 s 291760 76746 292480 76866 6 io_oeb[3]
+port 154 nsew signal tristate
+rlabel metal3 s 291760 96602 292480 96722 6 io_oeb[4]
+port 155 nsew signal tristate
+rlabel metal3 s 291760 116390 292480 116510 6 io_oeb[5]
+port 156 nsew signal tristate
+rlabel metal3 s 291760 136246 292480 136366 6 io_oeb[6]
+port 157 nsew signal tristate
+rlabel metal3 s 291760 165962 292480 166082 6 io_oeb[7]
+port 158 nsew signal tristate
+rlabel metal3 s 291760 195746 292480 195866 6 io_oeb[8]
+port 159 nsew signal tristate
+rlabel metal3 s 291760 225462 292480 225582 6 io_oeb[9]
+port 160 nsew signal tristate
+rlabel metal2 s 62923 -480 62979 240 8 la_data_in[0]
+port 161 nsew signal input
+rlabel metal2 s 240253 -480 240309 240 8 la_data_in[100]
+port 162 nsew signal input
+rlabel metal2 s 242001 -480 242057 240 8 la_data_in[101]
+port 163 nsew signal input
+rlabel metal2 s 243795 -480 243851 240 8 la_data_in[102]
+port 164 nsew signal input
+rlabel metal2 s 245543 -480 245599 240 8 la_data_in[103]
+port 165 nsew signal input
+rlabel metal2 s 247337 -480 247393 240 8 la_data_in[104]
+port 166 nsew signal input
+rlabel metal2 s 249085 -480 249141 240 8 la_data_in[105]
+port 167 nsew signal input
+rlabel metal2 s 250879 -480 250935 240 8 la_data_in[106]
+port 168 nsew signal input
+rlabel metal2 s 252673 -480 252729 240 8 la_data_in[107]
+port 169 nsew signal input
+rlabel metal2 s 254421 -480 254477 240 8 la_data_in[108]
+port 170 nsew signal input
+rlabel metal2 s 256215 -480 256271 240 8 la_data_in[109]
+port 171 nsew signal input
+rlabel metal2 s 80633 -480 80689 240 8 la_data_in[10]
+port 172 nsew signal input
+rlabel metal2 s 257963 -480 258019 240 8 la_data_in[110]
+port 173 nsew signal input
+rlabel metal2 s 259757 -480 259813 240 8 la_data_in[111]
+port 174 nsew signal input
+rlabel metal2 s 261505 -480 261561 240 8 la_data_in[112]
+port 175 nsew signal input
+rlabel metal2 s 263299 -480 263355 240 8 la_data_in[113]
+port 176 nsew signal input
+rlabel metal2 s 265047 -480 265103 240 8 la_data_in[114]
+port 177 nsew signal input
+rlabel metal2 s 266841 -480 266897 240 8 la_data_in[115]
+port 178 nsew signal input
+rlabel metal2 s 268589 -480 268645 240 8 la_data_in[116]
+port 179 nsew signal input
+rlabel metal2 s 270383 -480 270439 240 8 la_data_in[117]
+port 180 nsew signal input
+rlabel metal2 s 272177 -480 272233 240 8 la_data_in[118]
+port 181 nsew signal input
+rlabel metal2 s 273925 -480 273981 240 8 la_data_in[119]
+port 182 nsew signal input
+rlabel metal2 s 82427 -480 82483 240 8 la_data_in[11]
+port 183 nsew signal input
+rlabel metal2 s 275719 -480 275775 240 8 la_data_in[120]
+port 184 nsew signal input
+rlabel metal2 s 277467 -480 277523 240 8 la_data_in[121]
+port 185 nsew signal input
+rlabel metal2 s 279261 -480 279317 240 8 la_data_in[122]
+port 186 nsew signal input
+rlabel metal2 s 281009 -480 281065 240 8 la_data_in[123]
+port 187 nsew signal input
+rlabel metal2 s 282803 -480 282859 240 8 la_data_in[124]
+port 188 nsew signal input
+rlabel metal2 s 284551 -480 284607 240 8 la_data_in[125]
+port 189 nsew signal input
+rlabel metal2 s 286345 -480 286401 240 8 la_data_in[126]
+port 190 nsew signal input
+rlabel metal2 s 288139 -480 288195 240 8 la_data_in[127]
+port 191 nsew signal input
+rlabel metal2 s 84175 -480 84231 240 8 la_data_in[12]
+port 192 nsew signal input
+rlabel metal2 s 85969 -480 86025 240 8 la_data_in[13]
+port 193 nsew signal input
+rlabel metal2 s 87717 -480 87773 240 8 la_data_in[14]
+port 194 nsew signal input
+rlabel metal2 s 89511 -480 89567 240 8 la_data_in[15]
+port 195 nsew signal input
+rlabel metal2 s 91259 -480 91315 240 8 la_data_in[16]
+port 196 nsew signal input
+rlabel metal2 s 93053 -480 93109 240 8 la_data_in[17]
+port 197 nsew signal input
+rlabel metal2 s 94847 -480 94903 240 8 la_data_in[18]
+port 198 nsew signal input
+rlabel metal2 s 96595 -480 96651 240 8 la_data_in[19]
+port 199 nsew signal input
+rlabel metal2 s 64671 -480 64727 240 8 la_data_in[1]
+port 200 nsew signal input
+rlabel metal2 s 98389 -480 98445 240 8 la_data_in[20]
+port 201 nsew signal input
+rlabel metal2 s 100137 -480 100193 240 8 la_data_in[21]
+port 202 nsew signal input
+rlabel metal2 s 101931 -480 101987 240 8 la_data_in[22]
+port 203 nsew signal input
+rlabel metal2 s 103679 -480 103735 240 8 la_data_in[23]
+port 204 nsew signal input
+rlabel metal2 s 105473 -480 105529 240 8 la_data_in[24]
+port 205 nsew signal input
+rlabel metal2 s 107221 -480 107277 240 8 la_data_in[25]
+port 206 nsew signal input
+rlabel metal2 s 109015 -480 109071 240 8 la_data_in[26]
+port 207 nsew signal input
+rlabel metal2 s 110763 -480 110819 240 8 la_data_in[27]
+port 208 nsew signal input
+rlabel metal2 s 112557 -480 112613 240 8 la_data_in[28]
+port 209 nsew signal input
+rlabel metal2 s 114351 -480 114407 240 8 la_data_in[29]
+port 210 nsew signal input
+rlabel metal2 s 66465 -480 66521 240 8 la_data_in[2]
+port 211 nsew signal input
+rlabel metal2 s 116099 -480 116155 240 8 la_data_in[30]
+port 212 nsew signal input
+rlabel metal2 s 117893 -480 117949 240 8 la_data_in[31]
+port 213 nsew signal input
+rlabel metal2 s 119641 -480 119697 240 8 la_data_in[32]
+port 214 nsew signal input
+rlabel metal2 s 121435 -480 121491 240 8 la_data_in[33]
+port 215 nsew signal input
+rlabel metal2 s 123183 -480 123239 240 8 la_data_in[34]
+port 216 nsew signal input
+rlabel metal2 s 124977 -480 125033 240 8 la_data_in[35]
+port 217 nsew signal input
+rlabel metal2 s 126725 -480 126781 240 8 la_data_in[36]
+port 218 nsew signal input
+rlabel metal2 s 128519 -480 128575 240 8 la_data_in[37]
+port 219 nsew signal input
+rlabel metal2 s 130313 -480 130369 240 8 la_data_in[38]
+port 220 nsew signal input
+rlabel metal2 s 132061 -480 132117 240 8 la_data_in[39]
+port 221 nsew signal input
+rlabel metal2 s 68213 -480 68269 240 8 la_data_in[3]
+port 222 nsew signal input
+rlabel metal2 s 133855 -480 133911 240 8 la_data_in[40]
+port 223 nsew signal input
+rlabel metal2 s 135603 -480 135659 240 8 la_data_in[41]
+port 224 nsew signal input
+rlabel metal2 s 137397 -480 137453 240 8 la_data_in[42]
+port 225 nsew signal input
+rlabel metal2 s 139145 -480 139201 240 8 la_data_in[43]
+port 226 nsew signal input
+rlabel metal2 s 140939 -480 140995 240 8 la_data_in[44]
+port 227 nsew signal input
+rlabel metal2 s 142687 -480 142743 240 8 la_data_in[45]
+port 228 nsew signal input
+rlabel metal2 s 144481 -480 144537 240 8 la_data_in[46]
+port 229 nsew signal input
+rlabel metal2 s 146275 -480 146331 240 8 la_data_in[47]
+port 230 nsew signal input
+rlabel metal2 s 148023 -480 148079 240 8 la_data_in[48]
+port 231 nsew signal input
+rlabel metal2 s 149817 -480 149873 240 8 la_data_in[49]
+port 232 nsew signal input
+rlabel metal2 s 70007 -480 70063 240 8 la_data_in[4]
+port 233 nsew signal input
+rlabel metal2 s 151565 -480 151621 240 8 la_data_in[50]
+port 234 nsew signal input
+rlabel metal2 s 153359 -480 153415 240 8 la_data_in[51]
+port 235 nsew signal input
+rlabel metal2 s 155107 -480 155163 240 8 la_data_in[52]
+port 236 nsew signal input
+rlabel metal2 s 156901 -480 156957 240 8 la_data_in[53]
+port 237 nsew signal input
+rlabel metal2 s 158649 -480 158705 240 8 la_data_in[54]
+port 238 nsew signal input
+rlabel metal2 s 160443 -480 160499 240 8 la_data_in[55]
+port 239 nsew signal input
+rlabel metal2 s 162191 -480 162247 240 8 la_data_in[56]
+port 240 nsew signal input
+rlabel metal2 s 163985 -480 164041 240 8 la_data_in[57]
+port 241 nsew signal input
+rlabel metal2 s 165779 -480 165835 240 8 la_data_in[58]
+port 242 nsew signal input
+rlabel metal2 s 167527 -480 167583 240 8 la_data_in[59]
+port 243 nsew signal input
+rlabel metal2 s 71755 -480 71811 240 8 la_data_in[5]
+port 244 nsew signal input
+rlabel metal2 s 169321 -480 169377 240 8 la_data_in[60]
+port 245 nsew signal input
+rlabel metal2 s 171069 -480 171125 240 8 la_data_in[61]
+port 246 nsew signal input
+rlabel metal2 s 172863 -480 172919 240 8 la_data_in[62]
+port 247 nsew signal input
+rlabel metal2 s 174611 -480 174667 240 8 la_data_in[63]
+port 248 nsew signal input
+rlabel metal2 s 176405 -480 176461 240 8 la_data_in[64]
+port 249 nsew signal input
+rlabel metal2 s 178153 -480 178209 240 8 la_data_in[65]
+port 250 nsew signal input
+rlabel metal2 s 179947 -480 180003 240 8 la_data_in[66]
+port 251 nsew signal input
+rlabel metal2 s 181741 -480 181797 240 8 la_data_in[67]
+port 252 nsew signal input
+rlabel metal2 s 183489 -480 183545 240 8 la_data_in[68]
+port 253 nsew signal input
+rlabel metal2 s 185283 -480 185339 240 8 la_data_in[69]
+port 254 nsew signal input
+rlabel metal2 s 73549 -480 73605 240 8 la_data_in[6]
+port 255 nsew signal input
+rlabel metal2 s 187031 -480 187087 240 8 la_data_in[70]
+port 256 nsew signal input
+rlabel metal2 s 188825 -480 188881 240 8 la_data_in[71]
+port 257 nsew signal input
+rlabel metal2 s 190573 -480 190629 240 8 la_data_in[72]
+port 258 nsew signal input
+rlabel metal2 s 192367 -480 192423 240 8 la_data_in[73]
+port 259 nsew signal input
+rlabel metal2 s 194115 -480 194171 240 8 la_data_in[74]
+port 260 nsew signal input
+rlabel metal2 s 195909 -480 195965 240 8 la_data_in[75]
+port 261 nsew signal input
+rlabel metal2 s 197657 -480 197713 240 8 la_data_in[76]
+port 262 nsew signal input
+rlabel metal2 s 199451 -480 199507 240 8 la_data_in[77]
+port 263 nsew signal input
+rlabel metal2 s 201245 -480 201301 240 8 la_data_in[78]
+port 264 nsew signal input
+rlabel metal2 s 202993 -480 203049 240 8 la_data_in[79]
+port 265 nsew signal input
+rlabel metal2 s 75297 -480 75353 240 8 la_data_in[7]
+port 266 nsew signal input
+rlabel metal2 s 204787 -480 204843 240 8 la_data_in[80]
+port 267 nsew signal input
+rlabel metal2 s 206535 -480 206591 240 8 la_data_in[81]
+port 268 nsew signal input
+rlabel metal2 s 208329 -480 208385 240 8 la_data_in[82]
+port 269 nsew signal input
+rlabel metal2 s 210077 -480 210133 240 8 la_data_in[83]
+port 270 nsew signal input
+rlabel metal2 s 211871 -480 211927 240 8 la_data_in[84]
+port 271 nsew signal input
+rlabel metal2 s 213619 -480 213675 240 8 la_data_in[85]
+port 272 nsew signal input
+rlabel metal2 s 215413 -480 215469 240 8 la_data_in[86]
+port 273 nsew signal input
+rlabel metal2 s 217207 -480 217263 240 8 la_data_in[87]
+port 274 nsew signal input
+rlabel metal2 s 218955 -480 219011 240 8 la_data_in[88]
+port 275 nsew signal input
+rlabel metal2 s 220749 -480 220805 240 8 la_data_in[89]
+port 276 nsew signal input
+rlabel metal2 s 77091 -480 77147 240 8 la_data_in[8]
+port 277 nsew signal input
+rlabel metal2 s 222497 -480 222553 240 8 la_data_in[90]
+port 278 nsew signal input
+rlabel metal2 s 224291 -480 224347 240 8 la_data_in[91]
+port 279 nsew signal input
+rlabel metal2 s 226039 -480 226095 240 8 la_data_in[92]
+port 280 nsew signal input
+rlabel metal2 s 227833 -480 227889 240 8 la_data_in[93]
+port 281 nsew signal input
+rlabel metal2 s 229581 -480 229637 240 8 la_data_in[94]
+port 282 nsew signal input
+rlabel metal2 s 231375 -480 231431 240 8 la_data_in[95]
+port 283 nsew signal input
+rlabel metal2 s 233123 -480 233179 240 8 la_data_in[96]
+port 284 nsew signal input
+rlabel metal2 s 234917 -480 234973 240 8 la_data_in[97]
+port 285 nsew signal input
+rlabel metal2 s 236711 -480 236767 240 8 la_data_in[98]
+port 286 nsew signal input
+rlabel metal2 s 238459 -480 238515 240 8 la_data_in[99]
+port 287 nsew signal input
+rlabel metal2 s 78885 -480 78941 240 8 la_data_in[9]
+port 288 nsew signal input
+rlabel metal2 s 63475 -480 63531 240 8 la_data_out[0]
+port 289 nsew signal tristate
+rlabel metal2 s 240851 -480 240907 240 8 la_data_out[100]
+port 290 nsew signal tristate
+rlabel metal2 s 242599 -480 242655 240 8 la_data_out[101]
+port 291 nsew signal tristate
+rlabel metal2 s 244393 -480 244449 240 8 la_data_out[102]
+port 292 nsew signal tristate
+rlabel metal2 s 246141 -480 246197 240 8 la_data_out[103]
+port 293 nsew signal tristate
+rlabel metal2 s 247935 -480 247991 240 8 la_data_out[104]
+port 294 nsew signal tristate
+rlabel metal2 s 249683 -480 249739 240 8 la_data_out[105]
+port 295 nsew signal tristate
+rlabel metal2 s 251477 -480 251533 240 8 la_data_out[106]
+port 296 nsew signal tristate
+rlabel metal2 s 253225 -480 253281 240 8 la_data_out[107]
+port 297 nsew signal tristate
+rlabel metal2 s 255019 -480 255075 240 8 la_data_out[108]
+port 298 nsew signal tristate
+rlabel metal2 s 256767 -480 256823 240 8 la_data_out[109]
+port 299 nsew signal tristate
+rlabel metal2 s 81231 -480 81287 240 8 la_data_out[10]
+port 300 nsew signal tristate
+rlabel metal2 s 258561 -480 258617 240 8 la_data_out[110]
+port 301 nsew signal tristate
+rlabel metal2 s 260355 -480 260411 240 8 la_data_out[111]
+port 302 nsew signal tristate
+rlabel metal2 s 262103 -480 262159 240 8 la_data_out[112]
+port 303 nsew signal tristate
+rlabel metal2 s 263897 -480 263953 240 8 la_data_out[113]
+port 304 nsew signal tristate
+rlabel metal2 s 265645 -480 265701 240 8 la_data_out[114]
+port 305 nsew signal tristate
+rlabel metal2 s 267439 -480 267495 240 8 la_data_out[115]
+port 306 nsew signal tristate
+rlabel metal2 s 269187 -480 269243 240 8 la_data_out[116]
+port 307 nsew signal tristate
+rlabel metal2 s 270981 -480 271037 240 8 la_data_out[117]
+port 308 nsew signal tristate
+rlabel metal2 s 272729 -480 272785 240 8 la_data_out[118]
+port 309 nsew signal tristate
+rlabel metal2 s 274523 -480 274579 240 8 la_data_out[119]
+port 310 nsew signal tristate
+rlabel metal2 s 83025 -480 83081 240 8 la_data_out[11]
+port 311 nsew signal tristate
+rlabel metal2 s 276317 -480 276373 240 8 la_data_out[120]
+port 312 nsew signal tristate
+rlabel metal2 s 278065 -480 278121 240 8 la_data_out[121]
+port 313 nsew signal tristate
+rlabel metal2 s 279859 -480 279915 240 8 la_data_out[122]
+port 314 nsew signal tristate
+rlabel metal2 s 281607 -480 281663 240 8 la_data_out[123]
+port 315 nsew signal tristate
+rlabel metal2 s 283401 -480 283457 240 8 la_data_out[124]
+port 316 nsew signal tristate
+rlabel metal2 s 285149 -480 285205 240 8 la_data_out[125]
+port 317 nsew signal tristate
+rlabel metal2 s 286943 -480 286999 240 8 la_data_out[126]
+port 318 nsew signal tristate
+rlabel metal2 s 288691 -480 288747 240 8 la_data_out[127]
+port 319 nsew signal tristate
+rlabel metal2 s 84773 -480 84829 240 8 la_data_out[12]
+port 320 nsew signal tristate
+rlabel metal2 s 86567 -480 86623 240 8 la_data_out[13]
+port 321 nsew signal tristate
+rlabel metal2 s 88315 -480 88371 240 8 la_data_out[14]
+port 322 nsew signal tristate
+rlabel metal2 s 90109 -480 90165 240 8 la_data_out[15]
+port 323 nsew signal tristate
+rlabel metal2 s 91857 -480 91913 240 8 la_data_out[16]
+port 324 nsew signal tristate
+rlabel metal2 s 93651 -480 93707 240 8 la_data_out[17]
+port 325 nsew signal tristate
+rlabel metal2 s 95399 -480 95455 240 8 la_data_out[18]
+port 326 nsew signal tristate
+rlabel metal2 s 97193 -480 97249 240 8 la_data_out[19]
+port 327 nsew signal tristate
+rlabel metal2 s 65269 -480 65325 240 8 la_data_out[1]
+port 328 nsew signal tristate
+rlabel metal2 s 98941 -480 98997 240 8 la_data_out[20]
+port 329 nsew signal tristate
+rlabel metal2 s 100735 -480 100791 240 8 la_data_out[21]
+port 330 nsew signal tristate
+rlabel metal2 s 102529 -480 102585 240 8 la_data_out[22]
+port 331 nsew signal tristate
+rlabel metal2 s 104277 -480 104333 240 8 la_data_out[23]
+port 332 nsew signal tristate
+rlabel metal2 s 106071 -480 106127 240 8 la_data_out[24]
+port 333 nsew signal tristate
+rlabel metal2 s 107819 -480 107875 240 8 la_data_out[25]
+port 334 nsew signal tristate
+rlabel metal2 s 109613 -480 109669 240 8 la_data_out[26]
+port 335 nsew signal tristate
+rlabel metal2 s 111361 -480 111417 240 8 la_data_out[27]
+port 336 nsew signal tristate
+rlabel metal2 s 113155 -480 113211 240 8 la_data_out[28]
+port 337 nsew signal tristate
+rlabel metal2 s 114903 -480 114959 240 8 la_data_out[29]
+port 338 nsew signal tristate
+rlabel metal2 s 67063 -480 67119 240 8 la_data_out[2]
+port 339 nsew signal tristate
+rlabel metal2 s 116697 -480 116753 240 8 la_data_out[30]
+port 340 nsew signal tristate
+rlabel metal2 s 118491 -480 118547 240 8 la_data_out[31]
+port 341 nsew signal tristate
+rlabel metal2 s 120239 -480 120295 240 8 la_data_out[32]
+port 342 nsew signal tristate
+rlabel metal2 s 122033 -480 122089 240 8 la_data_out[33]
+port 343 nsew signal tristate
+rlabel metal2 s 123781 -480 123837 240 8 la_data_out[34]
+port 344 nsew signal tristate
+rlabel metal2 s 125575 -480 125631 240 8 la_data_out[35]
+port 345 nsew signal tristate
+rlabel metal2 s 127323 -480 127379 240 8 la_data_out[36]
+port 346 nsew signal tristate
+rlabel metal2 s 129117 -480 129173 240 8 la_data_out[37]
+port 347 nsew signal tristate
+rlabel metal2 s 130865 -480 130921 240 8 la_data_out[38]
+port 348 nsew signal tristate
+rlabel metal2 s 132659 -480 132715 240 8 la_data_out[39]
+port 349 nsew signal tristate
+rlabel metal2 s 68811 -480 68867 240 8 la_data_out[3]
+port 350 nsew signal tristate
+rlabel metal2 s 134407 -480 134463 240 8 la_data_out[40]
+port 351 nsew signal tristate
+rlabel metal2 s 136201 -480 136257 240 8 la_data_out[41]
+port 352 nsew signal tristate
+rlabel metal2 s 137995 -480 138051 240 8 la_data_out[42]
+port 353 nsew signal tristate
+rlabel metal2 s 139743 -480 139799 240 8 la_data_out[43]
+port 354 nsew signal tristate
+rlabel metal2 s 141537 -480 141593 240 8 la_data_out[44]
+port 355 nsew signal tristate
+rlabel metal2 s 143285 -480 143341 240 8 la_data_out[45]
+port 356 nsew signal tristate
+rlabel metal2 s 145079 -480 145135 240 8 la_data_out[46]
+port 357 nsew signal tristate
+rlabel metal2 s 146827 -480 146883 240 8 la_data_out[47]
+port 358 nsew signal tristate
+rlabel metal2 s 148621 -480 148677 240 8 la_data_out[48]
+port 359 nsew signal tristate
+rlabel metal2 s 150369 -480 150425 240 8 la_data_out[49]
+port 360 nsew signal tristate
+rlabel metal2 s 70605 -480 70661 240 8 la_data_out[4]
+port 361 nsew signal tristate
+rlabel metal2 s 152163 -480 152219 240 8 la_data_out[50]
+port 362 nsew signal tristate
+rlabel metal2 s 153957 -480 154013 240 8 la_data_out[51]
+port 363 nsew signal tristate
+rlabel metal2 s 155705 -480 155761 240 8 la_data_out[52]
+port 364 nsew signal tristate
+rlabel metal2 s 157499 -480 157555 240 8 la_data_out[53]
+port 365 nsew signal tristate
+rlabel metal2 s 159247 -480 159303 240 8 la_data_out[54]
+port 366 nsew signal tristate
+rlabel metal2 s 161041 -480 161097 240 8 la_data_out[55]
+port 367 nsew signal tristate
+rlabel metal2 s 162789 -480 162845 240 8 la_data_out[56]
+port 368 nsew signal tristate
+rlabel metal2 s 164583 -480 164639 240 8 la_data_out[57]
+port 369 nsew signal tristate
+rlabel metal2 s 166331 -480 166387 240 8 la_data_out[58]
+port 370 nsew signal tristate
+rlabel metal2 s 168125 -480 168181 240 8 la_data_out[59]
+port 371 nsew signal tristate
+rlabel metal2 s 72353 -480 72409 240 8 la_data_out[5]
+port 372 nsew signal tristate
+rlabel metal2 s 169919 -480 169975 240 8 la_data_out[60]
+port 373 nsew signal tristate
+rlabel metal2 s 171667 -480 171723 240 8 la_data_out[61]
+port 374 nsew signal tristate
+rlabel metal2 s 173461 -480 173517 240 8 la_data_out[62]
+port 375 nsew signal tristate
+rlabel metal2 s 175209 -480 175265 240 8 la_data_out[63]
+port 376 nsew signal tristate
+rlabel metal2 s 177003 -480 177059 240 8 la_data_out[64]
+port 377 nsew signal tristate
+rlabel metal2 s 178751 -480 178807 240 8 la_data_out[65]
+port 378 nsew signal tristate
+rlabel metal2 s 180545 -480 180601 240 8 la_data_out[66]
+port 379 nsew signal tristate
+rlabel metal2 s 182293 -480 182349 240 8 la_data_out[67]
+port 380 nsew signal tristate
+rlabel metal2 s 184087 -480 184143 240 8 la_data_out[68]
+port 381 nsew signal tristate
+rlabel metal2 s 185835 -480 185891 240 8 la_data_out[69]
+port 382 nsew signal tristate
+rlabel metal2 s 74147 -480 74203 240 8 la_data_out[6]
+port 383 nsew signal tristate
+rlabel metal2 s 187629 -480 187685 240 8 la_data_out[70]
+port 384 nsew signal tristate
+rlabel metal2 s 189423 -480 189479 240 8 la_data_out[71]
+port 385 nsew signal tristate
+rlabel metal2 s 191171 -480 191227 240 8 la_data_out[72]
+port 386 nsew signal tristate
+rlabel metal2 s 192965 -480 193021 240 8 la_data_out[73]
+port 387 nsew signal tristate
+rlabel metal2 s 194713 -480 194769 240 8 la_data_out[74]
+port 388 nsew signal tristate
+rlabel metal2 s 196507 -480 196563 240 8 la_data_out[75]
+port 389 nsew signal tristate
+rlabel metal2 s 198255 -480 198311 240 8 la_data_out[76]
+port 390 nsew signal tristate
+rlabel metal2 s 200049 -480 200105 240 8 la_data_out[77]
+port 391 nsew signal tristate
+rlabel metal2 s 201797 -480 201853 240 8 la_data_out[78]
+port 392 nsew signal tristate
+rlabel metal2 s 203591 -480 203647 240 8 la_data_out[79]
+port 393 nsew signal tristate
+rlabel metal2 s 75895 -480 75951 240 8 la_data_out[7]
+port 394 nsew signal tristate
+rlabel metal2 s 205385 -480 205441 240 8 la_data_out[80]
+port 395 nsew signal tristate
+rlabel metal2 s 207133 -480 207189 240 8 la_data_out[81]
+port 396 nsew signal tristate
+rlabel metal2 s 208927 -480 208983 240 8 la_data_out[82]
+port 397 nsew signal tristate
+rlabel metal2 s 210675 -480 210731 240 8 la_data_out[83]
+port 398 nsew signal tristate
+rlabel metal2 s 212469 -480 212525 240 8 la_data_out[84]
+port 399 nsew signal tristate
+rlabel metal2 s 214217 -480 214273 240 8 la_data_out[85]
+port 400 nsew signal tristate
+rlabel metal2 s 216011 -480 216067 240 8 la_data_out[86]
+port 401 nsew signal tristate
+rlabel metal2 s 217759 -480 217815 240 8 la_data_out[87]
+port 402 nsew signal tristate
+rlabel metal2 s 219553 -480 219609 240 8 la_data_out[88]
+port 403 nsew signal tristate
+rlabel metal2 s 221301 -480 221357 240 8 la_data_out[89]
+port 404 nsew signal tristate
+rlabel metal2 s 77689 -480 77745 240 8 la_data_out[8]
+port 405 nsew signal tristate
+rlabel metal2 s 223095 -480 223151 240 8 la_data_out[90]
+port 406 nsew signal tristate
+rlabel metal2 s 224889 -480 224945 240 8 la_data_out[91]
+port 407 nsew signal tristate
+rlabel metal2 s 226637 -480 226693 240 8 la_data_out[92]
+port 408 nsew signal tristate
+rlabel metal2 s 228431 -480 228487 240 8 la_data_out[93]
+port 409 nsew signal tristate
+rlabel metal2 s 230179 -480 230235 240 8 la_data_out[94]
+port 410 nsew signal tristate
+rlabel metal2 s 231973 -480 232029 240 8 la_data_out[95]
+port 411 nsew signal tristate
+rlabel metal2 s 233721 -480 233777 240 8 la_data_out[96]
+port 412 nsew signal tristate
+rlabel metal2 s 235515 -480 235571 240 8 la_data_out[97]
+port 413 nsew signal tristate
+rlabel metal2 s 237263 -480 237319 240 8 la_data_out[98]
+port 414 nsew signal tristate
+rlabel metal2 s 239057 -480 239113 240 8 la_data_out[99]
+port 415 nsew signal tristate
+rlabel metal2 s 79437 -480 79493 240 8 la_data_out[9]
+port 416 nsew signal tristate
+rlabel metal2 s 64073 -480 64129 240 8 la_oenb[0]
+port 417 nsew signal input
+rlabel metal2 s 241403 -480 241459 240 8 la_oenb[100]
+port 418 nsew signal input
+rlabel metal2 s 243197 -480 243253 240 8 la_oenb[101]
+port 419 nsew signal input
+rlabel metal2 s 244945 -480 245001 240 8 la_oenb[102]
+port 420 nsew signal input
+rlabel metal2 s 246739 -480 246795 240 8 la_oenb[103]
+port 421 nsew signal input
+rlabel metal2 s 248533 -480 248589 240 8 la_oenb[104]
+port 422 nsew signal input
+rlabel metal2 s 250281 -480 250337 240 8 la_oenb[105]
+port 423 nsew signal input
+rlabel metal2 s 252075 -480 252131 240 8 la_oenb[106]
+port 424 nsew signal input
+rlabel metal2 s 253823 -480 253879 240 8 la_oenb[107]
+port 425 nsew signal input
+rlabel metal2 s 255617 -480 255673 240 8 la_oenb[108]
+port 426 nsew signal input
+rlabel metal2 s 257365 -480 257421 240 8 la_oenb[109]
+port 427 nsew signal input
+rlabel metal2 s 81829 -480 81885 240 8 la_oenb[10]
+port 428 nsew signal input
+rlabel metal2 s 259159 -480 259215 240 8 la_oenb[110]
+port 429 nsew signal input
+rlabel metal2 s 260907 -480 260963 240 8 la_oenb[111]
+port 430 nsew signal input
+rlabel metal2 s 262701 -480 262757 240 8 la_oenb[112]
+port 431 nsew signal input
+rlabel metal2 s 264495 -480 264551 240 8 la_oenb[113]
+port 432 nsew signal input
+rlabel metal2 s 266243 -480 266299 240 8 la_oenb[114]
+port 433 nsew signal input
+rlabel metal2 s 268037 -480 268093 240 8 la_oenb[115]
+port 434 nsew signal input
+rlabel metal2 s 269785 -480 269841 240 8 la_oenb[116]
+port 435 nsew signal input
+rlabel metal2 s 271579 -480 271635 240 8 la_oenb[117]
+port 436 nsew signal input
+rlabel metal2 s 273327 -480 273383 240 8 la_oenb[118]
+port 437 nsew signal input
+rlabel metal2 s 275121 -480 275177 240 8 la_oenb[119]
+port 438 nsew signal input
+rlabel metal2 s 83577 -480 83633 240 8 la_oenb[11]
+port 439 nsew signal input
+rlabel metal2 s 276869 -480 276925 240 8 la_oenb[120]
+port 440 nsew signal input
+rlabel metal2 s 278663 -480 278719 240 8 la_oenb[121]
+port 441 nsew signal input
+rlabel metal2 s 280411 -480 280467 240 8 la_oenb[122]
+port 442 nsew signal input
+rlabel metal2 s 282205 -480 282261 240 8 la_oenb[123]
+port 443 nsew signal input
+rlabel metal2 s 283999 -480 284055 240 8 la_oenb[124]
+port 444 nsew signal input
+rlabel metal2 s 285747 -480 285803 240 8 la_oenb[125]
+port 445 nsew signal input
+rlabel metal2 s 287541 -480 287597 240 8 la_oenb[126]
+port 446 nsew signal input
+rlabel metal2 s 289289 -480 289345 240 8 la_oenb[127]
+port 447 nsew signal input
+rlabel metal2 s 85371 -480 85427 240 8 la_oenb[12]
+port 448 nsew signal input
+rlabel metal2 s 87119 -480 87175 240 8 la_oenb[13]
+port 449 nsew signal input
+rlabel metal2 s 88913 -480 88969 240 8 la_oenb[14]
+port 450 nsew signal input
+rlabel metal2 s 90707 -480 90763 240 8 la_oenb[15]
+port 451 nsew signal input
+rlabel metal2 s 92455 -480 92511 240 8 la_oenb[16]
+port 452 nsew signal input
+rlabel metal2 s 94249 -480 94305 240 8 la_oenb[17]
+port 453 nsew signal input
+rlabel metal2 s 95997 -480 96053 240 8 la_oenb[18]
+port 454 nsew signal input
+rlabel metal2 s 97791 -480 97847 240 8 la_oenb[19]
+port 455 nsew signal input
+rlabel metal2 s 65867 -480 65923 240 8 la_oenb[1]
+port 456 nsew signal input
+rlabel metal2 s 99539 -480 99595 240 8 la_oenb[20]
+port 457 nsew signal input
+rlabel metal2 s 101333 -480 101389 240 8 la_oenb[21]
+port 458 nsew signal input
+rlabel metal2 s 103081 -480 103137 240 8 la_oenb[22]
+port 459 nsew signal input
+rlabel metal2 s 104875 -480 104931 240 8 la_oenb[23]
+port 460 nsew signal input
+rlabel metal2 s 106669 -480 106725 240 8 la_oenb[24]
+port 461 nsew signal input
+rlabel metal2 s 108417 -480 108473 240 8 la_oenb[25]
+port 462 nsew signal input
+rlabel metal2 s 110211 -480 110267 240 8 la_oenb[26]
+port 463 nsew signal input
+rlabel metal2 s 111959 -480 112015 240 8 la_oenb[27]
+port 464 nsew signal input
+rlabel metal2 s 113753 -480 113809 240 8 la_oenb[28]
+port 465 nsew signal input
+rlabel metal2 s 115501 -480 115557 240 8 la_oenb[29]
+port 466 nsew signal input
+rlabel metal2 s 67615 -480 67671 240 8 la_oenb[2]
+port 467 nsew signal input
+rlabel metal2 s 117295 -480 117351 240 8 la_oenb[30]
+port 468 nsew signal input
+rlabel metal2 s 119043 -480 119099 240 8 la_oenb[31]
+port 469 nsew signal input
+rlabel metal2 s 120837 -480 120893 240 8 la_oenb[32]
+port 470 nsew signal input
+rlabel metal2 s 122585 -480 122641 240 8 la_oenb[33]
+port 471 nsew signal input
+rlabel metal2 s 124379 -480 124435 240 8 la_oenb[34]
+port 472 nsew signal input
+rlabel metal2 s 126173 -480 126229 240 8 la_oenb[35]
+port 473 nsew signal input
+rlabel metal2 s 127921 -480 127977 240 8 la_oenb[36]
+port 474 nsew signal input
+rlabel metal2 s 129715 -480 129771 240 8 la_oenb[37]
+port 475 nsew signal input
+rlabel metal2 s 131463 -480 131519 240 8 la_oenb[38]
+port 476 nsew signal input
+rlabel metal2 s 133257 -480 133313 240 8 la_oenb[39]
+port 477 nsew signal input
+rlabel metal2 s 69409 -480 69465 240 8 la_oenb[3]
+port 478 nsew signal input
+rlabel metal2 s 135005 -480 135061 240 8 la_oenb[40]
+port 479 nsew signal input
+rlabel metal2 s 136799 -480 136855 240 8 la_oenb[41]
+port 480 nsew signal input
+rlabel metal2 s 138547 -480 138603 240 8 la_oenb[42]
+port 481 nsew signal input
+rlabel metal2 s 140341 -480 140397 240 8 la_oenb[43]
+port 482 nsew signal input
+rlabel metal2 s 142135 -480 142191 240 8 la_oenb[44]
+port 483 nsew signal input
+rlabel metal2 s 143883 -480 143939 240 8 la_oenb[45]
+port 484 nsew signal input
+rlabel metal2 s 145677 -480 145733 240 8 la_oenb[46]
+port 485 nsew signal input
+rlabel metal2 s 147425 -480 147481 240 8 la_oenb[47]
+port 486 nsew signal input
+rlabel metal2 s 149219 -480 149275 240 8 la_oenb[48]
+port 487 nsew signal input
+rlabel metal2 s 150967 -480 151023 240 8 la_oenb[49]
+port 488 nsew signal input
+rlabel metal2 s 71203 -480 71259 240 8 la_oenb[4]
+port 489 nsew signal input
+rlabel metal2 s 152761 -480 152817 240 8 la_oenb[50]
+port 490 nsew signal input
+rlabel metal2 s 154509 -480 154565 240 8 la_oenb[51]
+port 491 nsew signal input
+rlabel metal2 s 156303 -480 156359 240 8 la_oenb[52]
+port 492 nsew signal input
+rlabel metal2 s 158097 -480 158153 240 8 la_oenb[53]
+port 493 nsew signal input
+rlabel metal2 s 159845 -480 159901 240 8 la_oenb[54]
+port 494 nsew signal input
+rlabel metal2 s 161639 -480 161695 240 8 la_oenb[55]
+port 495 nsew signal input
+rlabel metal2 s 163387 -480 163443 240 8 la_oenb[56]
+port 496 nsew signal input
+rlabel metal2 s 165181 -480 165237 240 8 la_oenb[57]
+port 497 nsew signal input
+rlabel metal2 s 166929 -480 166985 240 8 la_oenb[58]
+port 498 nsew signal input
+rlabel metal2 s 168723 -480 168779 240 8 la_oenb[59]
+port 499 nsew signal input
+rlabel metal2 s 72951 -480 73007 240 8 la_oenb[5]
+port 500 nsew signal input
+rlabel metal2 s 170471 -480 170527 240 8 la_oenb[60]
+port 501 nsew signal input
+rlabel metal2 s 172265 -480 172321 240 8 la_oenb[61]
+port 502 nsew signal input
+rlabel metal2 s 174013 -480 174069 240 8 la_oenb[62]
+port 503 nsew signal input
+rlabel metal2 s 175807 -480 175863 240 8 la_oenb[63]
+port 504 nsew signal input
+rlabel metal2 s 177601 -480 177657 240 8 la_oenb[64]
+port 505 nsew signal input
+rlabel metal2 s 179349 -480 179405 240 8 la_oenb[65]
+port 506 nsew signal input
+rlabel metal2 s 181143 -480 181199 240 8 la_oenb[66]
+port 507 nsew signal input
+rlabel metal2 s 182891 -480 182947 240 8 la_oenb[67]
+port 508 nsew signal input
+rlabel metal2 s 184685 -480 184741 240 8 la_oenb[68]
+port 509 nsew signal input
+rlabel metal2 s 186433 -480 186489 240 8 la_oenb[69]
+port 510 nsew signal input
+rlabel metal2 s 74745 -480 74801 240 8 la_oenb[6]
+port 511 nsew signal input
+rlabel metal2 s 188227 -480 188283 240 8 la_oenb[70]
+port 512 nsew signal input
+rlabel metal2 s 189975 -480 190031 240 8 la_oenb[71]
+port 513 nsew signal input
+rlabel metal2 s 191769 -480 191825 240 8 la_oenb[72]
+port 514 nsew signal input
+rlabel metal2 s 193563 -480 193619 240 8 la_oenb[73]
+port 515 nsew signal input
+rlabel metal2 s 195311 -480 195367 240 8 la_oenb[74]
+port 516 nsew signal input
+rlabel metal2 s 197105 -480 197161 240 8 la_oenb[75]
+port 517 nsew signal input
+rlabel metal2 s 198853 -480 198909 240 8 la_oenb[76]
+port 518 nsew signal input
+rlabel metal2 s 200647 -480 200703 240 8 la_oenb[77]
+port 519 nsew signal input
+rlabel metal2 s 202395 -480 202451 240 8 la_oenb[78]
+port 520 nsew signal input
+rlabel metal2 s 204189 -480 204245 240 8 la_oenb[79]
+port 521 nsew signal input
+rlabel metal2 s 76493 -480 76549 240 8 la_oenb[7]
+port 522 nsew signal input
+rlabel metal2 s 205937 -480 205993 240 8 la_oenb[80]
+port 523 nsew signal input
+rlabel metal2 s 207731 -480 207787 240 8 la_oenb[81]
+port 524 nsew signal input
+rlabel metal2 s 209479 -480 209535 240 8 la_oenb[82]
+port 525 nsew signal input
+rlabel metal2 s 211273 -480 211329 240 8 la_oenb[83]
+port 526 nsew signal input
+rlabel metal2 s 213067 -480 213123 240 8 la_oenb[84]
+port 527 nsew signal input
+rlabel metal2 s 214815 -480 214871 240 8 la_oenb[85]
+port 528 nsew signal input
+rlabel metal2 s 216609 -480 216665 240 8 la_oenb[86]
+port 529 nsew signal input
+rlabel metal2 s 218357 -480 218413 240 8 la_oenb[87]
+port 530 nsew signal input
+rlabel metal2 s 220151 -480 220207 240 8 la_oenb[88]
+port 531 nsew signal input
+rlabel metal2 s 221899 -480 221955 240 8 la_oenb[89]
+port 532 nsew signal input
+rlabel metal2 s 78287 -480 78343 240 8 la_oenb[8]
+port 533 nsew signal input
+rlabel metal2 s 223693 -480 223749 240 8 la_oenb[90]
+port 534 nsew signal input
+rlabel metal2 s 225441 -480 225497 240 8 la_oenb[91]
+port 535 nsew signal input
+rlabel metal2 s 227235 -480 227291 240 8 la_oenb[92]
+port 536 nsew signal input
+rlabel metal2 s 229029 -480 229085 240 8 la_oenb[93]
+port 537 nsew signal input
+rlabel metal2 s 230777 -480 230833 240 8 la_oenb[94]
+port 538 nsew signal input
+rlabel metal2 s 232571 -480 232627 240 8 la_oenb[95]
+port 539 nsew signal input
+rlabel metal2 s 234319 -480 234375 240 8 la_oenb[96]
+port 540 nsew signal input
+rlabel metal2 s 236113 -480 236169 240 8 la_oenb[97]
+port 541 nsew signal input
+rlabel metal2 s 237861 -480 237917 240 8 la_oenb[98]
+port 542 nsew signal input
+rlabel metal2 s 239655 -480 239711 240 8 la_oenb[99]
+port 543 nsew signal input
+rlabel metal2 s 80035 -480 80091 240 8 la_oenb[9]
+port 544 nsew signal input
+rlabel metal2 s 289887 -480 289943 240 8 user_clock2
+port 545 nsew signal input
+rlabel metal2 s 290485 -480 290541 240 8 user_irq[0]
+port 546 nsew signal tristate
+rlabel metal2 s 291083 -480 291139 240 8 user_irq[1]
+port 547 nsew signal tristate
+rlabel metal2 s 291681 -480 291737 240 8 user_irq[2]
+port 548 nsew signal tristate
+rlabel metal2 s 271 -480 327 240 8 wb_clk_i
+port 549 nsew signal input
+rlabel metal2 s 823 -480 879 240 8 wb_rst_i
+port 550 nsew signal input
+rlabel metal2 s 1421 -480 1477 240 8 wbs_ack_o
+port 551 nsew signal tristate
+rlabel metal2 s 3813 -480 3869 240 8 wbs_adr_i[0]
+port 552 nsew signal input
+rlabel metal2 s 23915 -480 23971 240 8 wbs_adr_i[10]
+port 553 nsew signal input
+rlabel metal2 s 25663 -480 25719 240 8 wbs_adr_i[11]
+port 554 nsew signal input
+rlabel metal2 s 27457 -480 27513 240 8 wbs_adr_i[12]
+port 555 nsew signal input
+rlabel metal2 s 29205 -480 29261 240 8 wbs_adr_i[13]
+port 556 nsew signal input
+rlabel metal2 s 30999 -480 31055 240 8 wbs_adr_i[14]
+port 557 nsew signal input
+rlabel metal2 s 32747 -480 32803 240 8 wbs_adr_i[15]
+port 558 nsew signal input
+rlabel metal2 s 34541 -480 34597 240 8 wbs_adr_i[16]
+port 559 nsew signal input
+rlabel metal2 s 36289 -480 36345 240 8 wbs_adr_i[17]
+port 560 nsew signal input
+rlabel metal2 s 38083 -480 38139 240 8 wbs_adr_i[18]
+port 561 nsew signal input
+rlabel metal2 s 39831 -480 39887 240 8 wbs_adr_i[19]
+port 562 nsew signal input
+rlabel metal2 s 6159 -480 6215 240 8 wbs_adr_i[1]
+port 563 nsew signal input
+rlabel metal2 s 41625 -480 41681 240 8 wbs_adr_i[20]
+port 564 nsew signal input
+rlabel metal2 s 43419 -480 43475 240 8 wbs_adr_i[21]
+port 565 nsew signal input
+rlabel metal2 s 45167 -480 45223 240 8 wbs_adr_i[22]
+port 566 nsew signal input
+rlabel metal2 s 46961 -480 47017 240 8 wbs_adr_i[23]
+port 567 nsew signal input
+rlabel metal2 s 48709 -480 48765 240 8 wbs_adr_i[24]
+port 568 nsew signal input
+rlabel metal2 s 50503 -480 50559 240 8 wbs_adr_i[25]
+port 569 nsew signal input
+rlabel metal2 s 52251 -480 52307 240 8 wbs_adr_i[26]
+port 570 nsew signal input
+rlabel metal2 s 54045 -480 54101 240 8 wbs_adr_i[27]
+port 571 nsew signal input
+rlabel metal2 s 55793 -480 55849 240 8 wbs_adr_i[28]
+port 572 nsew signal input
+rlabel metal2 s 57587 -480 57643 240 8 wbs_adr_i[29]
+port 573 nsew signal input
+rlabel metal2 s 8505 -480 8561 240 8 wbs_adr_i[2]
+port 574 nsew signal input
+rlabel metal2 s 59381 -480 59437 240 8 wbs_adr_i[30]
+port 575 nsew signal input
+rlabel metal2 s 61129 -480 61185 240 8 wbs_adr_i[31]
+port 576 nsew signal input
+rlabel metal2 s 10897 -480 10953 240 8 wbs_adr_i[3]
+port 577 nsew signal input
+rlabel metal2 s 13243 -480 13299 240 8 wbs_adr_i[4]
+port 578 nsew signal input
+rlabel metal2 s 15037 -480 15093 240 8 wbs_adr_i[5]
+port 579 nsew signal input
+rlabel metal2 s 16785 -480 16841 240 8 wbs_adr_i[6]
+port 580 nsew signal input
+rlabel metal2 s 18579 -480 18635 240 8 wbs_adr_i[7]
+port 581 nsew signal input
+rlabel metal2 s 20327 -480 20383 240 8 wbs_adr_i[8]
+port 582 nsew signal input
+rlabel metal2 s 22121 -480 22177 240 8 wbs_adr_i[9]
+port 583 nsew signal input
+rlabel metal2 s 2019 -480 2075 240 8 wbs_cyc_i
+port 584 nsew signal input
+rlabel metal2 s 4365 -480 4421 240 8 wbs_dat_i[0]
+port 585 nsew signal input
+rlabel metal2 s 24467 -480 24523 240 8 wbs_dat_i[10]
+port 586 nsew signal input
+rlabel metal2 s 26261 -480 26317 240 8 wbs_dat_i[11]
+port 587 nsew signal input
+rlabel metal2 s 28009 -480 28065 240 8 wbs_dat_i[12]
+port 588 nsew signal input
+rlabel metal2 s 29803 -480 29859 240 8 wbs_dat_i[13]
+port 589 nsew signal input
+rlabel metal2 s 31597 -480 31653 240 8 wbs_dat_i[14]
+port 590 nsew signal input
+rlabel metal2 s 33345 -480 33401 240 8 wbs_dat_i[15]
+port 591 nsew signal input
+rlabel metal2 s 35139 -480 35195 240 8 wbs_dat_i[16]
+port 592 nsew signal input
+rlabel metal2 s 36887 -480 36943 240 8 wbs_dat_i[17]
+port 593 nsew signal input
+rlabel metal2 s 38681 -480 38737 240 8 wbs_dat_i[18]
+port 594 nsew signal input
+rlabel metal2 s 40429 -480 40485 240 8 wbs_dat_i[19]
+port 595 nsew signal input
+rlabel metal2 s 6757 -480 6813 240 8 wbs_dat_i[1]
+port 596 nsew signal input
+rlabel metal2 s 42223 -480 42279 240 8 wbs_dat_i[20]
+port 597 nsew signal input
+rlabel metal2 s 43971 -480 44027 240 8 wbs_dat_i[21]
+port 598 nsew signal input
+rlabel metal2 s 45765 -480 45821 240 8 wbs_dat_i[22]
+port 599 nsew signal input
+rlabel metal2 s 47559 -480 47615 240 8 wbs_dat_i[23]
+port 600 nsew signal input
+rlabel metal2 s 49307 -480 49363 240 8 wbs_dat_i[24]
+port 601 nsew signal input
+rlabel metal2 s 51101 -480 51157 240 8 wbs_dat_i[25]
+port 602 nsew signal input
+rlabel metal2 s 52849 -480 52905 240 8 wbs_dat_i[26]
+port 603 nsew signal input
+rlabel metal2 s 54643 -480 54699 240 8 wbs_dat_i[27]
+port 604 nsew signal input
+rlabel metal2 s 56391 -480 56447 240 8 wbs_dat_i[28]
+port 605 nsew signal input
+rlabel metal2 s 58185 -480 58241 240 8 wbs_dat_i[29]
+port 606 nsew signal input
+rlabel metal2 s 9103 -480 9159 240 8 wbs_dat_i[2]
+port 607 nsew signal input
+rlabel metal2 s 59933 -480 59989 240 8 wbs_dat_i[30]
+port 608 nsew signal input
+rlabel metal2 s 61727 -480 61783 240 8 wbs_dat_i[31]
+port 609 nsew signal input
+rlabel metal2 s 11495 -480 11551 240 8 wbs_dat_i[3]
+port 610 nsew signal input
+rlabel metal2 s 13841 -480 13897 240 8 wbs_dat_i[4]
+port 611 nsew signal input
+rlabel metal2 s 15635 -480 15691 240 8 wbs_dat_i[5]
+port 612 nsew signal input
+rlabel metal2 s 17383 -480 17439 240 8 wbs_dat_i[6]
+port 613 nsew signal input
+rlabel metal2 s 19177 -480 19233 240 8 wbs_dat_i[7]
+port 614 nsew signal input
+rlabel metal2 s 20925 -480 20981 240 8 wbs_dat_i[8]
+port 615 nsew signal input
+rlabel metal2 s 22719 -480 22775 240 8 wbs_dat_i[9]
+port 616 nsew signal input
+rlabel metal2 s 4963 -480 5019 240 8 wbs_dat_o[0]
+port 617 nsew signal tristate
+rlabel metal2 s 25065 -480 25121 240 8 wbs_dat_o[10]
+port 618 nsew signal tristate
+rlabel metal2 s 26859 -480 26915 240 8 wbs_dat_o[11]
+port 619 nsew signal tristate
+rlabel metal2 s 28607 -480 28663 240 8 wbs_dat_o[12]
+port 620 nsew signal tristate
+rlabel metal2 s 30401 -480 30457 240 8 wbs_dat_o[13]
+port 621 nsew signal tristate
+rlabel metal2 s 32149 -480 32205 240 8 wbs_dat_o[14]
+port 622 nsew signal tristate
+rlabel metal2 s 33943 -480 33999 240 8 wbs_dat_o[15]
+port 623 nsew signal tristate
+rlabel metal2 s 35737 -480 35793 240 8 wbs_dat_o[16]
+port 624 nsew signal tristate
+rlabel metal2 s 37485 -480 37541 240 8 wbs_dat_o[17]
+port 625 nsew signal tristate
+rlabel metal2 s 39279 -480 39335 240 8 wbs_dat_o[18]
+port 626 nsew signal tristate
+rlabel metal2 s 41027 -480 41083 240 8 wbs_dat_o[19]
+port 627 nsew signal tristate
+rlabel metal2 s 7355 -480 7411 240 8 wbs_dat_o[1]
+port 628 nsew signal tristate
+rlabel metal2 s 42821 -480 42877 240 8 wbs_dat_o[20]
+port 629 nsew signal tristate
+rlabel metal2 s 44569 -480 44625 240 8 wbs_dat_o[21]
+port 630 nsew signal tristate
+rlabel metal2 s 46363 -480 46419 240 8 wbs_dat_o[22]
+port 631 nsew signal tristate
+rlabel metal2 s 48111 -480 48167 240 8 wbs_dat_o[23]
+port 632 nsew signal tristate
+rlabel metal2 s 49905 -480 49961 240 8 wbs_dat_o[24]
+port 633 nsew signal tristate
+rlabel metal2 s 51653 -480 51709 240 8 wbs_dat_o[25]
+port 634 nsew signal tristate
+rlabel metal2 s 53447 -480 53503 240 8 wbs_dat_o[26]
+port 635 nsew signal tristate
+rlabel metal2 s 55241 -480 55297 240 8 wbs_dat_o[27]
+port 636 nsew signal tristate
+rlabel metal2 s 56989 -480 57045 240 8 wbs_dat_o[28]
+port 637 nsew signal tristate
+rlabel metal2 s 58783 -480 58839 240 8 wbs_dat_o[29]
+port 638 nsew signal tristate
+rlabel metal2 s 9701 -480 9757 240 8 wbs_dat_o[2]
+port 639 nsew signal tristate
+rlabel metal2 s 60531 -480 60587 240 8 wbs_dat_o[30]
+port 640 nsew signal tristate
+rlabel metal2 s 62325 -480 62381 240 8 wbs_dat_o[31]
+port 641 nsew signal tristate
+rlabel metal2 s 12093 -480 12149 240 8 wbs_dat_o[3]
+port 642 nsew signal tristate
+rlabel metal2 s 14439 -480 14495 240 8 wbs_dat_o[4]
+port 643 nsew signal tristate
+rlabel metal2 s 16187 -480 16243 240 8 wbs_dat_o[5]
+port 644 nsew signal tristate
+rlabel metal2 s 17981 -480 18037 240 8 wbs_dat_o[6]
+port 645 nsew signal tristate
+rlabel metal2 s 19775 -480 19831 240 8 wbs_dat_o[7]
+port 646 nsew signal tristate
+rlabel metal2 s 21523 -480 21579 240 8 wbs_dat_o[8]
+port 647 nsew signal tristate
+rlabel metal2 s 23317 -480 23373 240 8 wbs_dat_o[9]
+port 648 nsew signal tristate
+rlabel metal2 s 5561 -480 5617 240 8 wbs_sel_i[0]
+port 649 nsew signal input
+rlabel metal2 s 7953 -480 8009 240 8 wbs_sel_i[1]
+port 650 nsew signal input
+rlabel metal2 s 10299 -480 10355 240 8 wbs_sel_i[2]
+port 651 nsew signal input
+rlabel metal2 s 12645 -480 12701 240 8 wbs_sel_i[3]
+port 652 nsew signal input
+rlabel metal2 s 2617 -480 2673 240 8 wbs_stb_i
+port 653 nsew signal input
+rlabel metal2 s 3215 -480 3271 240 8 wbs_we_i
+port 654 nsew signal input
+rlabel metal4 s 292660 -462 292960 352430 6 vccd1
+port 655 nsew power bidirectional
+rlabel metal4 s -998 -462 -698 352430 4 vccd1.extra1
+port 656 nsew power bidirectional
+rlabel metal5 s -998 352130 292960 352430 6 vccd1.extra2
+port 657 nsew power bidirectional
+rlabel metal5 s -998 -462 292960 -162 8 vccd1.extra3
+port 658 nsew power bidirectional
+rlabel metal4 s 293130 -932 293430 352900 6 vssd1
+port 659 nsew ground bidirectional
+rlabel metal4 s -1468 -932 -1168 352900 4 vssd1.extra1
+port 660 nsew ground bidirectional
+rlabel metal5 s -1468 352600 293430 352900 6 vssd1.extra2
+port 661 nsew ground bidirectional
+rlabel metal5 s -1468 -932 293430 -632 8 vssd1.extra3
+port 662 nsew ground bidirectional
+rlabel metal4 s 293600 -1402 293900 353370 6 vccd2
+port 663 nsew power bidirectional
+rlabel metal4 s -1938 -1402 -1638 353370 4 vccd2.extra1
+port 664 nsew power bidirectional
+rlabel metal5 s -1938 353070 293900 353370 6 vccd2.extra2
+port 665 nsew power bidirectional
+rlabel metal5 s -1938 -1402 293900 -1102 8 vccd2.extra3
+port 666 nsew power bidirectional
+rlabel metal4 s 294070 -1872 294370 353840 6 vssd2
+port 667 nsew ground bidirectional
+rlabel metal4 s -2408 -1872 -2108 353840 4 vssd2.extra1
+port 668 nsew ground bidirectional
+rlabel metal5 s -2408 353540 294370 353840 6 vssd2.extra2
+port 669 nsew ground bidirectional
+rlabel metal5 s -2408 -1872 294370 -1572 8 vssd2.extra3
+port 670 nsew ground bidirectional
+rlabel metal4 s 294540 -2342 294840 354310 6 vdda1
+port 671 nsew power bidirectional
+rlabel metal4 s -2878 -2342 -2578 354310 4 vdda1.extra1
+port 672 nsew power bidirectional
+rlabel metal5 s -2878 354010 294840 354310 6 vdda1.extra2
+port 673 nsew power bidirectional
+rlabel metal5 s -2878 -2342 294840 -2042 8 vdda1.extra3
+port 674 nsew power bidirectional
+rlabel metal4 s 295010 -2812 295310 354780 6 vssa1
+port 675 nsew ground bidirectional
+rlabel metal4 s -3348 -2812 -3048 354780 4 vssa1.extra1
+port 676 nsew ground bidirectional
+rlabel metal5 s -3348 354480 295310 354780 6 vssa1.extra2
+port 677 nsew ground bidirectional
+rlabel metal5 s -3348 -2812 295310 -2512 8 vssa1.extra3
+port 678 nsew ground bidirectional
+rlabel metal4 s 295480 -3282 295780 355250 6 vdda2
+port 679 nsew power bidirectional
+rlabel metal4 s -3818 -3282 -3518 355250 4 vdda2.extra1
+port 680 nsew power bidirectional
+rlabel metal5 s -3818 354950 295780 355250 6 vdda2.extra2
+port 681 nsew power bidirectional
+rlabel metal5 s -3818 -3282 295780 -2982 8 vdda2.extra3
+port 682 nsew power bidirectional
+rlabel metal4 s 295950 -3752 296250 355720 6 vssa2
+port 683 nsew ground bidirectional
+rlabel metal4 s -4288 -3752 -3988 355720 4 vssa2.extra1
+port 684 nsew ground bidirectional
+rlabel metal5 s -4288 355420 296250 355720 6 vssa2.extra2
+port 685 nsew ground bidirectional
+rlabel metal5 s -4288 -3752 296250 -3452 8 vssa2.extra3
+port 686 nsew ground bidirectional
+<< properties >>
+string FIXED_BBOX 0 0 292000 352000
+<< end >>
diff --git a/mag/user_analog_project_wrapper_empty.mag b/mag/user_analog_project_wrapper_empty.mag
new file mode 100644
index 0000000..e10e4e7
--- /dev/null
+++ b/mag/user_analog_project_wrapper_empty.mag
@@ -0,0 +1,2521 @@
+magic
+tech sky130A
+timestamp 1619448499
+<< metal2 >>
+rect 9701 351760 9757 352480
+rect 29159 351760 29215 352480
+rect 48617 351760 48673 352480
+rect 68075 351760 68131 352480
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+<< metal5 >>
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+rect 295950 -3753 296250 -3752
+<< labels >>
+rlabel metal3 s 291760 141210 292480 141330 6 gpio_analog[0]
+port 0 nsew signal bidirectional
+rlabel metal3 s -480 279114 240 279234 4 gpio_analog[10]
+port 1 nsew signal bidirectional
+rlabel metal3 s -480 250962 240 251082 4 gpio_analog[11]
+port 2 nsew signal bidirectional
+rlabel metal3 s -480 222810 240 222930 4 gpio_analog[12]
+port 3 nsew signal bidirectional
+rlabel metal3 s -480 194658 240 194778 4 gpio_analog[13]
+port 4 nsew signal bidirectional
+rlabel metal3 s -480 166506 240 166626 4 gpio_analog[14]
+port 5 nsew signal bidirectional
+rlabel metal3 s -480 138354 240 138474 4 gpio_analog[15]
+port 6 nsew signal bidirectional
+rlabel metal3 s -480 110202 240 110322 4 gpio_analog[16]
+port 7 nsew signal bidirectional
+rlabel metal3 s -480 82050 240 82170 4 gpio_analog[17]
+port 8 nsew signal bidirectional
+rlabel metal3 s 291760 170926 292480 171046 6 gpio_analog[1]
+port 9 nsew signal bidirectional
+rlabel metal3 s 291760 200710 292480 200830 6 gpio_analog[2]
+port 10 nsew signal bidirectional
+rlabel metal3 s 291760 230426 292480 230546 6 gpio_analog[3]
+port 11 nsew signal bidirectional
+rlabel metal3 s 291760 260142 292480 260262 6 gpio_analog[4]
+port 12 nsew signal bidirectional
+rlabel metal3 s 291760 289926 292480 290046 6 gpio_analog[5]
+port 13 nsew signal bidirectional
+rlabel metal3 s 291760 319642 292480 319762 6 gpio_analog[6]
+port 14 nsew signal bidirectional
+rlabel metal3 s -480 344802 240 344922 4 gpio_analog[7]
+port 15 nsew signal bidirectional
+rlabel metal3 s -480 335418 240 335538 4 gpio_analog[8]
+port 16 nsew signal bidirectional
+rlabel metal3 s -480 307266 240 307386 4 gpio_analog[9]
+port 17 nsew signal bidirectional
+rlabel metal3 s 291760 146174 292480 146294 6 gpio_noesd[0]
+port 18 nsew signal bidirectional
+rlabel metal3 s -480 274422 240 274542 4 gpio_noesd[10]
+port 19 nsew signal bidirectional
+rlabel metal3 s -480 246270 240 246390 4 gpio_noesd[11]
+port 20 nsew signal bidirectional
+rlabel metal3 s -480 218118 240 218238 4 gpio_noesd[12]
+port 21 nsew signal bidirectional
+rlabel metal3 s -480 189966 240 190086 4 gpio_noesd[13]
+port 22 nsew signal bidirectional
+rlabel metal3 s -480 161814 240 161934 4 gpio_noesd[14]
+port 23 nsew signal bidirectional
+rlabel metal3 s -480 133662 240 133782 4 gpio_noesd[15]
+port 24 nsew signal bidirectional
+rlabel metal3 s -480 105510 240 105630 4 gpio_noesd[16]
+port 25 nsew signal bidirectional
+rlabel metal3 s -480 77358 240 77478 4 gpio_noesd[17]
+port 26 nsew signal bidirectional
+rlabel metal3 s 291760 175890 292480 176010 6 gpio_noesd[1]
+port 27 nsew signal bidirectional
+rlabel metal3 s 291760 205606 292480 205726 6 gpio_noesd[2]
+port 28 nsew signal bidirectional
+rlabel metal3 s 291760 235390 292480 235510 6 gpio_noesd[3]
+port 29 nsew signal bidirectional
+rlabel metal3 s 291760 265106 292480 265226 6 gpio_noesd[4]
+port 30 nsew signal bidirectional
+rlabel metal3 s 291760 294890 292480 295010 6 gpio_noesd[5]
+port 31 nsew signal bidirectional
+rlabel metal3 s 291760 324606 292480 324726 6 gpio_noesd[6]
+port 32 nsew signal bidirectional
+rlabel metal3 s -480 340110 240 340230 4 gpio_noesd[7]
+port 33 nsew signal bidirectional
+rlabel metal3 s -480 330726 240 330846 4 gpio_noesd[8]
+port 34 nsew signal bidirectional
+rlabel metal3 s -480 302574 240 302694 4 gpio_noesd[9]
+port 35 nsew signal bidirectional
+rlabel metal3 s 291760 349426 292480 349546 6 io_analog[0]
+port 36 nsew signal bidirectional
+rlabel metal3 s -480 349494 240 349614 4 io_analog[10]
+port 37 nsew signal bidirectional
+rlabel metal2 s 282205 351760 282261 352480 6 io_analog[1]
+port 38 nsew signal bidirectional
+rlabel metal2 s 262747 351760 262803 352480 6 io_analog[2]
+port 39 nsew signal bidirectional
+rlabel metal2 s 243289 351760 243345 352480 6 io_analog[3]
+port 40 nsew signal bidirectional
+rlabel metal2 s 184869 351760 184925 352480 6 io_analog[4]
+port 41 nsew signal bidirectional
+rlabel metal2 s 126495 351760 126551 352480 6 io_analog[5]
+port 42 nsew signal bidirectional
+rlabel metal2 s 68075 351760 68131 352480 6 io_analog[6]
+port 43 nsew signal bidirectional
+rlabel metal2 s 48617 351760 48673 352480 6 io_analog[7]
+port 44 nsew signal bidirectional
+rlabel metal2 s 29159 351760 29215 352480 6 io_analog[8]
+port 45 nsew signal bidirectional
+rlabel metal2 s 9701 351760 9757 352480 6 io_analog[9]
+port 46 nsew signal bidirectional
+rlabel metal2 s 223831 351760 223887 352480 6 io_clamp_high[0]
+port 47 nsew signal bidirectional
+rlabel metal2 s 165411 351760 165467 352480 6 io_clamp_high[1]
+port 48 nsew signal bidirectional
+rlabel metal2 s 107037 351760 107093 352480 6 io_clamp_high[2]
+port 49 nsew signal bidirectional
+rlabel metal2 s 204373 351760 204429 352480 6 io_clamp_low[0]
+port 50 nsew signal bidirectional
+rlabel metal2 s 145953 351760 146009 352480 6 io_clamp_low[1]
+port 51 nsew signal bidirectional
+rlabel metal2 s 87533 351760 87589 352480 6 io_clamp_low[2]
+port 52 nsew signal bidirectional
+rlabel metal3 s 291760 7318 292480 7438 6 io_in[0]
+port 53 nsew signal input
+rlabel metal3 s 291760 12282 292480 12402 6 io_out[0]
+port 54 nsew signal tristate
+rlabel metal3 s 291760 245318 292480 245438 6 io_in[10]
+port 55 nsew signal input
+rlabel metal3 s 291760 250282 292480 250402 6 io_out[10]
+port 56 nsew signal tristate
+rlabel metal3 s 291760 275034 292480 275154 6 io_in[11]
+port 57 nsew signal input
+rlabel metal3 s 291760 279998 292480 280118 6 io_out[11]
+port 58 nsew signal tristate
+rlabel metal3 s 291760 304750 292480 304870 6 io_in[12]
+port 59 nsew signal input
+rlabel metal3 s 291760 309714 292480 309834 6 io_out[12]
+port 60 nsew signal tristate
+rlabel metal3 s 291760 334534 292480 334654 6 io_in[13]
+port 61 nsew signal input
+rlabel metal3 s 291760 339498 292480 339618 6 io_out[13]
+port 62 nsew signal tristate
+rlabel metal3 s -480 321342 240 321462 4 io_in[14]
+port 63 nsew signal input
+rlabel metal3 s -480 316650 240 316770 4 io_out[14]
+port 64 nsew signal tristate
+rlabel metal3 s -480 293190 240 293310 4 io_in[15]
+port 65 nsew signal input
+rlabel metal3 s -480 288498 240 288618 4 io_out[15]
+port 66 nsew signal tristate
+rlabel metal3 s -480 265038 240 265158 4 io_in[16]
+port 67 nsew signal input
+rlabel metal3 s -480 260346 240 260466 4 io_out[16]
+port 68 nsew signal tristate
+rlabel metal3 s -480 236886 240 237006 4 io_in[17]
+port 69 nsew signal input
+rlabel metal3 s -480 232194 240 232314 4 io_out[17]
+port 70 nsew signal tristate
+rlabel metal3 s -480 208734 240 208854 4 io_in[18]
+port 71 nsew signal input
+rlabel metal3 s -480 204042 240 204162 4 io_out[18]
+port 72 nsew signal tristate
+rlabel metal3 s -480 180582 240 180702 4 io_in[19]
+port 73 nsew signal input
+rlabel metal3 s -480 175890 240 176010 4 io_out[19]
+port 74 nsew signal tristate
+rlabel metal3 s 291760 27174 292480 27294 6 io_in[1]
+port 75 nsew signal input
+rlabel metal3 s 291760 32138 292480 32258 6 io_out[1]
+port 76 nsew signal tristate
+rlabel metal3 s -480 152430 240 152550 4 io_in[20]
+port 77 nsew signal input
+rlabel metal3 s -480 147738 240 147858 4 io_out[20]
+port 78 nsew signal tristate
+rlabel metal3 s -480 124278 240 124398 4 io_in[21]
+port 79 nsew signal input
+rlabel metal3 s -480 119586 240 119706 4 io_out[21]
+port 80 nsew signal tristate
+rlabel metal3 s -480 96126 240 96246 4 io_in[22]
+port 81 nsew signal input
+rlabel metal3 s -480 91434 240 91554 4 io_out[22]
+port 82 nsew signal tristate
+rlabel metal3 s -480 67974 240 68094 4 io_in[23]
+port 83 nsew signal input
+rlabel metal3 s -480 63282 240 63402 4 io_out[23]
+port 84 nsew signal tristate
+rlabel metal3 s -480 49206 240 49326 4 io_in[24]
+port 85 nsew signal input
+rlabel metal3 s -480 44514 240 44634 4 io_out[24]
+port 86 nsew signal tristate
+rlabel metal3 s -480 30438 240 30558 4 io_in[25]
+port 87 nsew signal input
+rlabel metal3 s -480 25746 240 25866 4 io_out[25]
+port 88 nsew signal tristate
+rlabel metal3 s -480 11670 240 11790 4 io_in[26]
+port 89 nsew signal input
+rlabel metal3 s -480 6978 240 7098 4 io_out[26]
+port 90 nsew signal tristate
+rlabel metal3 s 291760 47030 292480 47150 6 io_in[2]
+port 91 nsew signal input
+rlabel metal3 s 291760 51994 292480 52114 6 io_out[2]
+port 92 nsew signal tristate
+rlabel metal3 s 291760 66818 292480 66938 6 io_in[3]
+port 93 nsew signal input
+rlabel metal3 s 291760 71782 292480 71902 6 io_out[3]
+port 94 nsew signal tristate
+rlabel metal3 s 291760 86674 292480 86794 6 io_in[4]
+port 95 nsew signal input
+rlabel metal3 s 291760 91638 292480 91758 6 io_out[4]
+port 96 nsew signal tristate
+rlabel metal3 s 291760 106462 292480 106582 6 io_in[5]
+port 97 nsew signal input
+rlabel metal3 s 291760 111426 292480 111546 6 io_out[5]
+port 98 nsew signal tristate
+rlabel metal3 s 291760 126318 292480 126438 6 io_in[6]
+port 99 nsew signal input
+rlabel metal3 s 291760 131282 292480 131402 6 io_out[6]
+port 100 nsew signal tristate
+rlabel metal3 s 291760 156034 292480 156154 6 io_in[7]
+port 101 nsew signal input
+rlabel metal3 s 291760 160998 292480 161118 6 io_out[7]
+port 102 nsew signal tristate
+rlabel metal3 s 291760 185818 292480 185938 6 io_in[8]
+port 103 nsew signal input
+rlabel metal3 s 291760 190782 292480 190902 6 io_out[8]
+port 104 nsew signal tristate
+rlabel metal3 s 291760 215534 292480 215654 6 io_in[9]
+port 105 nsew signal input
+rlabel metal3 s 291760 220498 292480 220618 6 io_out[9]
+port 106 nsew signal tristate
+rlabel metal3 s 291760 2422 292480 2542 6 io_in_3v3[0]
+port 107 nsew signal input
+rlabel metal3 s 291760 240354 292480 240474 6 io_in_3v3[10]
+port 108 nsew signal input
+rlabel metal3 s 291760 270070 292480 270190 6 io_in_3v3[11]
+port 109 nsew signal input
+rlabel metal3 s 291760 299854 292480 299974 6 io_in_3v3[12]
+port 110 nsew signal input
+rlabel metal3 s 291760 329570 292480 329690 6 io_in_3v3[13]
+port 111 nsew signal input
+rlabel metal3 s -480 326034 240 326154 4 io_in_3v3[14]
+port 112 nsew signal input
+rlabel metal3 s -480 297882 240 298002 4 io_in_3v3[15]
+port 113 nsew signal input
+rlabel metal3 s -480 269730 240 269850 4 io_in_3v3[16]
+port 114 nsew signal input
+rlabel metal3 s -480 241578 240 241698 4 io_in_3v3[17]
+port 115 nsew signal input
+rlabel metal3 s -480 213426 240 213546 4 io_in_3v3[18]
+port 116 nsew signal input
+rlabel metal3 s -480 185274 240 185394 4 io_in_3v3[19]
+port 117 nsew signal input
+rlabel metal3 s 291760 22210 292480 22330 6 io_in_3v3[1]
+port 118 nsew signal input
+rlabel metal3 s -480 157122 240 157242 4 io_in_3v3[20]
+port 119 nsew signal input
+rlabel metal3 s -480 128970 240 129090 4 io_in_3v3[21]
+port 120 nsew signal input
+rlabel metal3 s -480 100818 240 100938 4 io_in_3v3[22]
+port 121 nsew signal input
+rlabel metal3 s -480 72666 240 72786 4 io_in_3v3[23]
+port 122 nsew signal input
+rlabel metal3 s -480 53898 240 54018 4 io_in_3v3[24]
+port 123 nsew signal input
+rlabel metal3 s -480 35130 240 35250 4 io_in_3v3[25]
+port 124 nsew signal input
+rlabel metal3 s -480 16362 240 16482 4 io_in_3v3[26]
+port 125 nsew signal input
+rlabel metal3 s 291760 42066 292480 42186 6 io_in_3v3[2]
+port 126 nsew signal input
+rlabel metal3 s 291760 61854 292480 61974 6 io_in_3v3[3]
+port 127 nsew signal input
+rlabel metal3 s 291760 81710 292480 81830 6 io_in_3v3[4]
+port 128 nsew signal input
+rlabel metal3 s 291760 101566 292480 101686 6 io_in_3v3[5]
+port 129 nsew signal input
+rlabel metal3 s 291760 121354 292480 121474 6 io_in_3v3[6]
+port 130 nsew signal input
+rlabel metal3 s 291760 151138 292480 151258 6 io_in_3v3[7]
+port 131 nsew signal input
+rlabel metal3 s 291760 180854 292480 180974 6 io_in_3v3[8]
+port 132 nsew signal input
+rlabel metal3 s 291760 210570 292480 210690 6 io_in_3v3[9]
+port 133 nsew signal input
+rlabel metal3 s 291760 17246 292480 17366 6 io_oeb[0]
+port 134 nsew signal tristate
+rlabel metal3 s 291760 255178 292480 255298 6 io_oeb[10]
+port 135 nsew signal tristate
+rlabel metal3 s 291760 284962 292480 285082 6 io_oeb[11]
+port 136 nsew signal tristate
+rlabel metal3 s 291760 314678 292480 314798 6 io_oeb[12]
+port 137 nsew signal tristate
+rlabel metal3 s 291760 344462 292480 344582 6 io_oeb[13]
+port 138 nsew signal tristate
+rlabel metal3 s -480 311958 240 312078 4 io_oeb[14]
+port 139 nsew signal tristate
+rlabel metal3 s -480 283806 240 283926 4 io_oeb[15]
+port 140 nsew signal tristate
+rlabel metal3 s -480 255654 240 255774 4 io_oeb[16]
+port 141 nsew signal tristate
+rlabel metal3 s -480 227502 240 227622 4 io_oeb[17]
+port 142 nsew signal tristate
+rlabel metal3 s -480 199350 240 199470 4 io_oeb[18]
+port 143 nsew signal tristate
+rlabel metal3 s -480 171198 240 171318 4 io_oeb[19]
+port 144 nsew signal tristate
+rlabel metal3 s 291760 37102 292480 37222 6 io_oeb[1]
+port 145 nsew signal tristate
+rlabel metal3 s -480 143046 240 143166 4 io_oeb[20]
+port 146 nsew signal tristate
+rlabel metal3 s -480 114894 240 115014 4 io_oeb[21]
+port 147 nsew signal tristate
+rlabel metal3 s -480 86742 240 86862 4 io_oeb[22]
+port 148 nsew signal tristate
+rlabel metal3 s -480 58590 240 58710 4 io_oeb[23]
+port 149 nsew signal tristate
+rlabel metal3 s -480 39822 240 39942 4 io_oeb[24]
+port 150 nsew signal tristate
+rlabel metal3 s -480 21054 240 21174 4 io_oeb[25]
+port 151 nsew signal tristate
+rlabel metal3 s -480 2286 240 2406 4 io_oeb[26]
+port 152 nsew signal tristate
+rlabel metal3 s 291760 56890 292480 57010 6 io_oeb[2]
+port 153 nsew signal tristate
+rlabel metal3 s 291760 76746 292480 76866 6 io_oeb[3]
+port 154 nsew signal tristate
+rlabel metal3 s 291760 96602 292480 96722 6 io_oeb[4]
+port 155 nsew signal tristate
+rlabel metal3 s 291760 116390 292480 116510 6 io_oeb[5]
+port 156 nsew signal tristate
+rlabel metal3 s 291760 136246 292480 136366 6 io_oeb[6]
+port 157 nsew signal tristate
+rlabel metal3 s 291760 165962 292480 166082 6 io_oeb[7]
+port 158 nsew signal tristate
+rlabel metal3 s 291760 195746 292480 195866 6 io_oeb[8]
+port 159 nsew signal tristate
+rlabel metal3 s 291760 225462 292480 225582 6 io_oeb[9]
+port 160 nsew signal tristate
+rlabel metal2 s 62923 -480 62979 240 8 la_data_in[0]
+port 161 nsew signal input
+rlabel metal2 s 240253 -480 240309 240 8 la_data_in[100]
+port 162 nsew signal input
+rlabel metal2 s 242001 -480 242057 240 8 la_data_in[101]
+port 163 nsew signal input
+rlabel metal2 s 243795 -480 243851 240 8 la_data_in[102]
+port 164 nsew signal input
+rlabel metal2 s 245543 -480 245599 240 8 la_data_in[103]
+port 165 nsew signal input
+rlabel metal2 s 247337 -480 247393 240 8 la_data_in[104]
+port 166 nsew signal input
+rlabel metal2 s 249085 -480 249141 240 8 la_data_in[105]
+port 167 nsew signal input
+rlabel metal2 s 250879 -480 250935 240 8 la_data_in[106]
+port 168 nsew signal input
+rlabel metal2 s 252673 -480 252729 240 8 la_data_in[107]
+port 169 nsew signal input
+rlabel metal2 s 254421 -480 254477 240 8 la_data_in[108]
+port 170 nsew signal input
+rlabel metal2 s 256215 -480 256271 240 8 la_data_in[109]
+port 171 nsew signal input
+rlabel metal2 s 80633 -480 80689 240 8 la_data_in[10]
+port 172 nsew signal input
+rlabel metal2 s 257963 -480 258019 240 8 la_data_in[110]
+port 173 nsew signal input
+rlabel metal2 s 259757 -480 259813 240 8 la_data_in[111]
+port 174 nsew signal input
+rlabel metal2 s 261505 -480 261561 240 8 la_data_in[112]
+port 175 nsew signal input
+rlabel metal2 s 263299 -480 263355 240 8 la_data_in[113]
+port 176 nsew signal input
+rlabel metal2 s 265047 -480 265103 240 8 la_data_in[114]
+port 177 nsew signal input
+rlabel metal2 s 266841 -480 266897 240 8 la_data_in[115]
+port 178 nsew signal input
+rlabel metal2 s 268589 -480 268645 240 8 la_data_in[116]
+port 179 nsew signal input
+rlabel metal2 s 270383 -480 270439 240 8 la_data_in[117]
+port 180 nsew signal input
+rlabel metal2 s 272177 -480 272233 240 8 la_data_in[118]
+port 181 nsew signal input
+rlabel metal2 s 273925 -480 273981 240 8 la_data_in[119]
+port 182 nsew signal input
+rlabel metal2 s 82427 -480 82483 240 8 la_data_in[11]
+port 183 nsew signal input
+rlabel metal2 s 275719 -480 275775 240 8 la_data_in[120]
+port 184 nsew signal input
+rlabel metal2 s 277467 -480 277523 240 8 la_data_in[121]
+port 185 nsew signal input
+rlabel metal2 s 279261 -480 279317 240 8 la_data_in[122]
+port 186 nsew signal input
+rlabel metal2 s 281009 -480 281065 240 8 la_data_in[123]
+port 187 nsew signal input
+rlabel metal2 s 282803 -480 282859 240 8 la_data_in[124]
+port 188 nsew signal input
+rlabel metal2 s 284551 -480 284607 240 8 la_data_in[125]
+port 189 nsew signal input
+rlabel metal2 s 286345 -480 286401 240 8 la_data_in[126]
+port 190 nsew signal input
+rlabel metal2 s 288139 -480 288195 240 8 la_data_in[127]
+port 191 nsew signal input
+rlabel metal2 s 84175 -480 84231 240 8 la_data_in[12]
+port 192 nsew signal input
+rlabel metal2 s 85969 -480 86025 240 8 la_data_in[13]
+port 193 nsew signal input
+rlabel metal2 s 87717 -480 87773 240 8 la_data_in[14]
+port 194 nsew signal input
+rlabel metal2 s 89511 -480 89567 240 8 la_data_in[15]
+port 195 nsew signal input
+rlabel metal2 s 91259 -480 91315 240 8 la_data_in[16]
+port 196 nsew signal input
+rlabel metal2 s 93053 -480 93109 240 8 la_data_in[17]
+port 197 nsew signal input
+rlabel metal2 s 94847 -480 94903 240 8 la_data_in[18]
+port 198 nsew signal input
+rlabel metal2 s 96595 -480 96651 240 8 la_data_in[19]
+port 199 nsew signal input
+rlabel metal2 s 64671 -480 64727 240 8 la_data_in[1]
+port 200 nsew signal input
+rlabel metal2 s 98389 -480 98445 240 8 la_data_in[20]
+port 201 nsew signal input
+rlabel metal2 s 100137 -480 100193 240 8 la_data_in[21]
+port 202 nsew signal input
+rlabel metal2 s 101931 -480 101987 240 8 la_data_in[22]
+port 203 nsew signal input
+rlabel metal2 s 103679 -480 103735 240 8 la_data_in[23]
+port 204 nsew signal input
+rlabel metal2 s 105473 -480 105529 240 8 la_data_in[24]
+port 205 nsew signal input
+rlabel metal2 s 107221 -480 107277 240 8 la_data_in[25]
+port 206 nsew signal input
+rlabel metal2 s 109015 -480 109071 240 8 la_data_in[26]
+port 207 nsew signal input
+rlabel metal2 s 110763 -480 110819 240 8 la_data_in[27]
+port 208 nsew signal input
+rlabel metal2 s 112557 -480 112613 240 8 la_data_in[28]
+port 209 nsew signal input
+rlabel metal2 s 114351 -480 114407 240 8 la_data_in[29]
+port 210 nsew signal input
+rlabel metal2 s 66465 -480 66521 240 8 la_data_in[2]
+port 211 nsew signal input
+rlabel metal2 s 116099 -480 116155 240 8 la_data_in[30]
+port 212 nsew signal input
+rlabel metal2 s 117893 -480 117949 240 8 la_data_in[31]
+port 213 nsew signal input
+rlabel metal2 s 119641 -480 119697 240 8 la_data_in[32]
+port 214 nsew signal input
+rlabel metal2 s 121435 -480 121491 240 8 la_data_in[33]
+port 215 nsew signal input
+rlabel metal2 s 123183 -480 123239 240 8 la_data_in[34]
+port 216 nsew signal input
+rlabel metal2 s 124977 -480 125033 240 8 la_data_in[35]
+port 217 nsew signal input
+rlabel metal2 s 126725 -480 126781 240 8 la_data_in[36]
+port 218 nsew signal input
+rlabel metal2 s 128519 -480 128575 240 8 la_data_in[37]
+port 219 nsew signal input
+rlabel metal2 s 130313 -480 130369 240 8 la_data_in[38]
+port 220 nsew signal input
+rlabel metal2 s 132061 -480 132117 240 8 la_data_in[39]
+port 221 nsew signal input
+rlabel metal2 s 68213 -480 68269 240 8 la_data_in[3]
+port 222 nsew signal input
+rlabel metal2 s 133855 -480 133911 240 8 la_data_in[40]
+port 223 nsew signal input
+rlabel metal2 s 135603 -480 135659 240 8 la_data_in[41]
+port 224 nsew signal input
+rlabel metal2 s 137397 -480 137453 240 8 la_data_in[42]
+port 225 nsew signal input
+rlabel metal2 s 139145 -480 139201 240 8 la_data_in[43]
+port 226 nsew signal input
+rlabel metal2 s 140939 -480 140995 240 8 la_data_in[44]
+port 227 nsew signal input
+rlabel metal2 s 142687 -480 142743 240 8 la_data_in[45]
+port 228 nsew signal input
+rlabel metal2 s 144481 -480 144537 240 8 la_data_in[46]
+port 229 nsew signal input
+rlabel metal2 s 146275 -480 146331 240 8 la_data_in[47]
+port 230 nsew signal input
+rlabel metal2 s 148023 -480 148079 240 8 la_data_in[48]
+port 231 nsew signal input
+rlabel metal2 s 149817 -480 149873 240 8 la_data_in[49]
+port 232 nsew signal input
+rlabel metal2 s 70007 -480 70063 240 8 la_data_in[4]
+port 233 nsew signal input
+rlabel metal2 s 151565 -480 151621 240 8 la_data_in[50]
+port 234 nsew signal input
+rlabel metal2 s 153359 -480 153415 240 8 la_data_in[51]
+port 235 nsew signal input
+rlabel metal2 s 155107 -480 155163 240 8 la_data_in[52]
+port 236 nsew signal input
+rlabel metal2 s 156901 -480 156957 240 8 la_data_in[53]
+port 237 nsew signal input
+rlabel metal2 s 158649 -480 158705 240 8 la_data_in[54]
+port 238 nsew signal input
+rlabel metal2 s 160443 -480 160499 240 8 la_data_in[55]
+port 239 nsew signal input
+rlabel metal2 s 162191 -480 162247 240 8 la_data_in[56]
+port 240 nsew signal input
+rlabel metal2 s 163985 -480 164041 240 8 la_data_in[57]
+port 241 nsew signal input
+rlabel metal2 s 165779 -480 165835 240 8 la_data_in[58]
+port 242 nsew signal input
+rlabel metal2 s 167527 -480 167583 240 8 la_data_in[59]
+port 243 nsew signal input
+rlabel metal2 s 71755 -480 71811 240 8 la_data_in[5]
+port 244 nsew signal input
+rlabel metal2 s 169321 -480 169377 240 8 la_data_in[60]
+port 245 nsew signal input
+rlabel metal2 s 171069 -480 171125 240 8 la_data_in[61]
+port 246 nsew signal input
+rlabel metal2 s 172863 -480 172919 240 8 la_data_in[62]
+port 247 nsew signal input
+rlabel metal2 s 174611 -480 174667 240 8 la_data_in[63]
+port 248 nsew signal input
+rlabel metal2 s 176405 -480 176461 240 8 la_data_in[64]
+port 249 nsew signal input
+rlabel metal2 s 178153 -480 178209 240 8 la_data_in[65]
+port 250 nsew signal input
+rlabel metal2 s 179947 -480 180003 240 8 la_data_in[66]
+port 251 nsew signal input
+rlabel metal2 s 181741 -480 181797 240 8 la_data_in[67]
+port 252 nsew signal input
+rlabel metal2 s 183489 -480 183545 240 8 la_data_in[68]
+port 253 nsew signal input
+rlabel metal2 s 185283 -480 185339 240 8 la_data_in[69]
+port 254 nsew signal input
+rlabel metal2 s 73549 -480 73605 240 8 la_data_in[6]
+port 255 nsew signal input
+rlabel metal2 s 187031 -480 187087 240 8 la_data_in[70]
+port 256 nsew signal input
+rlabel metal2 s 188825 -480 188881 240 8 la_data_in[71]
+port 257 nsew signal input
+rlabel metal2 s 190573 -480 190629 240 8 la_data_in[72]
+port 258 nsew signal input
+rlabel metal2 s 192367 -480 192423 240 8 la_data_in[73]
+port 259 nsew signal input
+rlabel metal2 s 194115 -480 194171 240 8 la_data_in[74]
+port 260 nsew signal input
+rlabel metal2 s 195909 -480 195965 240 8 la_data_in[75]
+port 261 nsew signal input
+rlabel metal2 s 197657 -480 197713 240 8 la_data_in[76]
+port 262 nsew signal input
+rlabel metal2 s 199451 -480 199507 240 8 la_data_in[77]
+port 263 nsew signal input
+rlabel metal2 s 201245 -480 201301 240 8 la_data_in[78]
+port 264 nsew signal input
+rlabel metal2 s 202993 -480 203049 240 8 la_data_in[79]
+port 265 nsew signal input
+rlabel metal2 s 75297 -480 75353 240 8 la_data_in[7]
+port 266 nsew signal input
+rlabel metal2 s 204787 -480 204843 240 8 la_data_in[80]
+port 267 nsew signal input
+rlabel metal2 s 206535 -480 206591 240 8 la_data_in[81]
+port 268 nsew signal input
+rlabel metal2 s 208329 -480 208385 240 8 la_data_in[82]
+port 269 nsew signal input
+rlabel metal2 s 210077 -480 210133 240 8 la_data_in[83]
+port 270 nsew signal input
+rlabel metal2 s 211871 -480 211927 240 8 la_data_in[84]
+port 271 nsew signal input
+rlabel metal2 s 213619 -480 213675 240 8 la_data_in[85]
+port 272 nsew signal input
+rlabel metal2 s 215413 -480 215469 240 8 la_data_in[86]
+port 273 nsew signal input
+rlabel metal2 s 217207 -480 217263 240 8 la_data_in[87]
+port 274 nsew signal input
+rlabel metal2 s 218955 -480 219011 240 8 la_data_in[88]
+port 275 nsew signal input
+rlabel metal2 s 220749 -480 220805 240 8 la_data_in[89]
+port 276 nsew signal input
+rlabel metal2 s 77091 -480 77147 240 8 la_data_in[8]
+port 277 nsew signal input
+rlabel metal2 s 222497 -480 222553 240 8 la_data_in[90]
+port 278 nsew signal input
+rlabel metal2 s 224291 -480 224347 240 8 la_data_in[91]
+port 279 nsew signal input
+rlabel metal2 s 226039 -480 226095 240 8 la_data_in[92]
+port 280 nsew signal input
+rlabel metal2 s 227833 -480 227889 240 8 la_data_in[93]
+port 281 nsew signal input
+rlabel metal2 s 229581 -480 229637 240 8 la_data_in[94]
+port 282 nsew signal input
+rlabel metal2 s 231375 -480 231431 240 8 la_data_in[95]
+port 283 nsew signal input
+rlabel metal2 s 233123 -480 233179 240 8 la_data_in[96]
+port 284 nsew signal input
+rlabel metal2 s 234917 -480 234973 240 8 la_data_in[97]
+port 285 nsew signal input
+rlabel metal2 s 236711 -480 236767 240 8 la_data_in[98]
+port 286 nsew signal input
+rlabel metal2 s 238459 -480 238515 240 8 la_data_in[99]
+port 287 nsew signal input
+rlabel metal2 s 78885 -480 78941 240 8 la_data_in[9]
+port 288 nsew signal input
+rlabel metal2 s 63475 -480 63531 240 8 la_data_out[0]
+port 289 nsew signal tristate
+rlabel metal2 s 240851 -480 240907 240 8 la_data_out[100]
+port 290 nsew signal tristate
+rlabel metal2 s 242599 -480 242655 240 8 la_data_out[101]
+port 291 nsew signal tristate
+rlabel metal2 s 244393 -480 244449 240 8 la_data_out[102]
+port 292 nsew signal tristate
+rlabel metal2 s 246141 -480 246197 240 8 la_data_out[103]
+port 293 nsew signal tristate
+rlabel metal2 s 247935 -480 247991 240 8 la_data_out[104]
+port 294 nsew signal tristate
+rlabel metal2 s 249683 -480 249739 240 8 la_data_out[105]
+port 295 nsew signal tristate
+rlabel metal2 s 251477 -480 251533 240 8 la_data_out[106]
+port 296 nsew signal tristate
+rlabel metal2 s 253225 -480 253281 240 8 la_data_out[107]
+port 297 nsew signal tristate
+rlabel metal2 s 255019 -480 255075 240 8 la_data_out[108]
+port 298 nsew signal tristate
+rlabel metal2 s 256767 -480 256823 240 8 la_data_out[109]
+port 299 nsew signal tristate
+rlabel metal2 s 81231 -480 81287 240 8 la_data_out[10]
+port 300 nsew signal tristate
+rlabel metal2 s 258561 -480 258617 240 8 la_data_out[110]
+port 301 nsew signal tristate
+rlabel metal2 s 260355 -480 260411 240 8 la_data_out[111]
+port 302 nsew signal tristate
+rlabel metal2 s 262103 -480 262159 240 8 la_data_out[112]
+port 303 nsew signal tristate
+rlabel metal2 s 263897 -480 263953 240 8 la_data_out[113]
+port 304 nsew signal tristate
+rlabel metal2 s 265645 -480 265701 240 8 la_data_out[114]
+port 305 nsew signal tristate
+rlabel metal2 s 267439 -480 267495 240 8 la_data_out[115]
+port 306 nsew signal tristate
+rlabel metal2 s 269187 -480 269243 240 8 la_data_out[116]
+port 307 nsew signal tristate
+rlabel metal2 s 270981 -480 271037 240 8 la_data_out[117]
+port 308 nsew signal tristate
+rlabel metal2 s 272729 -480 272785 240 8 la_data_out[118]
+port 309 nsew signal tristate
+rlabel metal2 s 274523 -480 274579 240 8 la_data_out[119]
+port 310 nsew signal tristate
+rlabel metal2 s 83025 -480 83081 240 8 la_data_out[11]
+port 311 nsew signal tristate
+rlabel metal2 s 276317 -480 276373 240 8 la_data_out[120]
+port 312 nsew signal tristate
+rlabel metal2 s 278065 -480 278121 240 8 la_data_out[121]
+port 313 nsew signal tristate
+rlabel metal2 s 279859 -480 279915 240 8 la_data_out[122]
+port 314 nsew signal tristate
+rlabel metal2 s 281607 -480 281663 240 8 la_data_out[123]
+port 315 nsew signal tristate
+rlabel metal2 s 283401 -480 283457 240 8 la_data_out[124]
+port 316 nsew signal tristate
+rlabel metal2 s 285149 -480 285205 240 8 la_data_out[125]
+port 317 nsew signal tristate
+rlabel metal2 s 286943 -480 286999 240 8 la_data_out[126]
+port 318 nsew signal tristate
+rlabel metal2 s 288691 -480 288747 240 8 la_data_out[127]
+port 319 nsew signal tristate
+rlabel metal2 s 84773 -480 84829 240 8 la_data_out[12]
+port 320 nsew signal tristate
+rlabel metal2 s 86567 -480 86623 240 8 la_data_out[13]
+port 321 nsew signal tristate
+rlabel metal2 s 88315 -480 88371 240 8 la_data_out[14]
+port 322 nsew signal tristate
+rlabel metal2 s 90109 -480 90165 240 8 la_data_out[15]
+port 323 nsew signal tristate
+rlabel metal2 s 91857 -480 91913 240 8 la_data_out[16]
+port 324 nsew signal tristate
+rlabel metal2 s 93651 -480 93707 240 8 la_data_out[17]
+port 325 nsew signal tristate
+rlabel metal2 s 95399 -480 95455 240 8 la_data_out[18]
+port 326 nsew signal tristate
+rlabel metal2 s 97193 -480 97249 240 8 la_data_out[19]
+port 327 nsew signal tristate
+rlabel metal2 s 65269 -480 65325 240 8 la_data_out[1]
+port 328 nsew signal tristate
+rlabel metal2 s 98941 -480 98997 240 8 la_data_out[20]
+port 329 nsew signal tristate
+rlabel metal2 s 100735 -480 100791 240 8 la_data_out[21]
+port 330 nsew signal tristate
+rlabel metal2 s 102529 -480 102585 240 8 la_data_out[22]
+port 331 nsew signal tristate
+rlabel metal2 s 104277 -480 104333 240 8 la_data_out[23]
+port 332 nsew signal tristate
+rlabel metal2 s 106071 -480 106127 240 8 la_data_out[24]
+port 333 nsew signal tristate
+rlabel metal2 s 107819 -480 107875 240 8 la_data_out[25]
+port 334 nsew signal tristate
+rlabel metal2 s 109613 -480 109669 240 8 la_data_out[26]
+port 335 nsew signal tristate
+rlabel metal2 s 111361 -480 111417 240 8 la_data_out[27]
+port 336 nsew signal tristate
+rlabel metal2 s 113155 -480 113211 240 8 la_data_out[28]
+port 337 nsew signal tristate
+rlabel metal2 s 114903 -480 114959 240 8 la_data_out[29]
+port 338 nsew signal tristate
+rlabel metal2 s 67063 -480 67119 240 8 la_data_out[2]
+port 339 nsew signal tristate
+rlabel metal2 s 116697 -480 116753 240 8 la_data_out[30]
+port 340 nsew signal tristate
+rlabel metal2 s 118491 -480 118547 240 8 la_data_out[31]
+port 341 nsew signal tristate
+rlabel metal2 s 120239 -480 120295 240 8 la_data_out[32]
+port 342 nsew signal tristate
+rlabel metal2 s 122033 -480 122089 240 8 la_data_out[33]
+port 343 nsew signal tristate
+rlabel metal2 s 123781 -480 123837 240 8 la_data_out[34]
+port 344 nsew signal tristate
+rlabel metal2 s 125575 -480 125631 240 8 la_data_out[35]
+port 345 nsew signal tristate
+rlabel metal2 s 127323 -480 127379 240 8 la_data_out[36]
+port 346 nsew signal tristate
+rlabel metal2 s 129117 -480 129173 240 8 la_data_out[37]
+port 347 nsew signal tristate
+rlabel metal2 s 130865 -480 130921 240 8 la_data_out[38]
+port 348 nsew signal tristate
+rlabel metal2 s 132659 -480 132715 240 8 la_data_out[39]
+port 349 nsew signal tristate
+rlabel metal2 s 68811 -480 68867 240 8 la_data_out[3]
+port 350 nsew signal tristate
+rlabel metal2 s 134407 -480 134463 240 8 la_data_out[40]
+port 351 nsew signal tristate
+rlabel metal2 s 136201 -480 136257 240 8 la_data_out[41]
+port 352 nsew signal tristate
+rlabel metal2 s 137995 -480 138051 240 8 la_data_out[42]
+port 353 nsew signal tristate
+rlabel metal2 s 139743 -480 139799 240 8 la_data_out[43]
+port 354 nsew signal tristate
+rlabel metal2 s 141537 -480 141593 240 8 la_data_out[44]
+port 355 nsew signal tristate
+rlabel metal2 s 143285 -480 143341 240 8 la_data_out[45]
+port 356 nsew signal tristate
+rlabel metal2 s 145079 -480 145135 240 8 la_data_out[46]
+port 357 nsew signal tristate
+rlabel metal2 s 146827 -480 146883 240 8 la_data_out[47]
+port 358 nsew signal tristate
+rlabel metal2 s 148621 -480 148677 240 8 la_data_out[48]
+port 359 nsew signal tristate
+rlabel metal2 s 150369 -480 150425 240 8 la_data_out[49]
+port 360 nsew signal tristate
+rlabel metal2 s 70605 -480 70661 240 8 la_data_out[4]
+port 361 nsew signal tristate
+rlabel metal2 s 152163 -480 152219 240 8 la_data_out[50]
+port 362 nsew signal tristate
+rlabel metal2 s 153957 -480 154013 240 8 la_data_out[51]
+port 363 nsew signal tristate
+rlabel metal2 s 155705 -480 155761 240 8 la_data_out[52]
+port 364 nsew signal tristate
+rlabel metal2 s 157499 -480 157555 240 8 la_data_out[53]
+port 365 nsew signal tristate
+rlabel metal2 s 159247 -480 159303 240 8 la_data_out[54]
+port 366 nsew signal tristate
+rlabel metal2 s 161041 -480 161097 240 8 la_data_out[55]
+port 367 nsew signal tristate
+rlabel metal2 s 162789 -480 162845 240 8 la_data_out[56]
+port 368 nsew signal tristate
+rlabel metal2 s 164583 -480 164639 240 8 la_data_out[57]
+port 369 nsew signal tristate
+rlabel metal2 s 166331 -480 166387 240 8 la_data_out[58]
+port 370 nsew signal tristate
+rlabel metal2 s 168125 -480 168181 240 8 la_data_out[59]
+port 371 nsew signal tristate
+rlabel metal2 s 72353 -480 72409 240 8 la_data_out[5]
+port 372 nsew signal tristate
+rlabel metal2 s 169919 -480 169975 240 8 la_data_out[60]
+port 373 nsew signal tristate
+rlabel metal2 s 171667 -480 171723 240 8 la_data_out[61]
+port 374 nsew signal tristate
+rlabel metal2 s 173461 -480 173517 240 8 la_data_out[62]
+port 375 nsew signal tristate
+rlabel metal2 s 175209 -480 175265 240 8 la_data_out[63]
+port 376 nsew signal tristate
+rlabel metal2 s 177003 -480 177059 240 8 la_data_out[64]
+port 377 nsew signal tristate
+rlabel metal2 s 178751 -480 178807 240 8 la_data_out[65]
+port 378 nsew signal tristate
+rlabel metal2 s 180545 -480 180601 240 8 la_data_out[66]
+port 379 nsew signal tristate
+rlabel metal2 s 182293 -480 182349 240 8 la_data_out[67]
+port 380 nsew signal tristate
+rlabel metal2 s 184087 -480 184143 240 8 la_data_out[68]
+port 381 nsew signal tristate
+rlabel metal2 s 185835 -480 185891 240 8 la_data_out[69]
+port 382 nsew signal tristate
+rlabel metal2 s 74147 -480 74203 240 8 la_data_out[6]
+port 383 nsew signal tristate
+rlabel metal2 s 187629 -480 187685 240 8 la_data_out[70]
+port 384 nsew signal tristate
+rlabel metal2 s 189423 -480 189479 240 8 la_data_out[71]
+port 385 nsew signal tristate
+rlabel metal2 s 191171 -480 191227 240 8 la_data_out[72]
+port 386 nsew signal tristate
+rlabel metal2 s 192965 -480 193021 240 8 la_data_out[73]
+port 387 nsew signal tristate
+rlabel metal2 s 194713 -480 194769 240 8 la_data_out[74]
+port 388 nsew signal tristate
+rlabel metal2 s 196507 -480 196563 240 8 la_data_out[75]
+port 389 nsew signal tristate
+rlabel metal2 s 198255 -480 198311 240 8 la_data_out[76]
+port 390 nsew signal tristate
+rlabel metal2 s 200049 -480 200105 240 8 la_data_out[77]
+port 391 nsew signal tristate
+rlabel metal2 s 201797 -480 201853 240 8 la_data_out[78]
+port 392 nsew signal tristate
+rlabel metal2 s 203591 -480 203647 240 8 la_data_out[79]
+port 393 nsew signal tristate
+rlabel metal2 s 75895 -480 75951 240 8 la_data_out[7]
+port 394 nsew signal tristate
+rlabel metal2 s 205385 -480 205441 240 8 la_data_out[80]
+port 395 nsew signal tristate
+rlabel metal2 s 207133 -480 207189 240 8 la_data_out[81]
+port 396 nsew signal tristate
+rlabel metal2 s 208927 -480 208983 240 8 la_data_out[82]
+port 397 nsew signal tristate
+rlabel metal2 s 210675 -480 210731 240 8 la_data_out[83]
+port 398 nsew signal tristate
+rlabel metal2 s 212469 -480 212525 240 8 la_data_out[84]
+port 399 nsew signal tristate
+rlabel metal2 s 214217 -480 214273 240 8 la_data_out[85]
+port 400 nsew signal tristate
+rlabel metal2 s 216011 -480 216067 240 8 la_data_out[86]
+port 401 nsew signal tristate
+rlabel metal2 s 217759 -480 217815 240 8 la_data_out[87]
+port 402 nsew signal tristate
+rlabel metal2 s 219553 -480 219609 240 8 la_data_out[88]
+port 403 nsew signal tristate
+rlabel metal2 s 221301 -480 221357 240 8 la_data_out[89]
+port 404 nsew signal tristate
+rlabel metal2 s 77689 -480 77745 240 8 la_data_out[8]
+port 405 nsew signal tristate
+rlabel metal2 s 223095 -480 223151 240 8 la_data_out[90]
+port 406 nsew signal tristate
+rlabel metal2 s 224889 -480 224945 240 8 la_data_out[91]
+port 407 nsew signal tristate
+rlabel metal2 s 226637 -480 226693 240 8 la_data_out[92]
+port 408 nsew signal tristate
+rlabel metal2 s 228431 -480 228487 240 8 la_data_out[93]
+port 409 nsew signal tristate
+rlabel metal2 s 230179 -480 230235 240 8 la_data_out[94]
+port 410 nsew signal tristate
+rlabel metal2 s 231973 -480 232029 240 8 la_data_out[95]
+port 411 nsew signal tristate
+rlabel metal2 s 233721 -480 233777 240 8 la_data_out[96]
+port 412 nsew signal tristate
+rlabel metal2 s 235515 -480 235571 240 8 la_data_out[97]
+port 413 nsew signal tristate
+rlabel metal2 s 237263 -480 237319 240 8 la_data_out[98]
+port 414 nsew signal tristate
+rlabel metal2 s 239057 -480 239113 240 8 la_data_out[99]
+port 415 nsew signal tristate
+rlabel metal2 s 79437 -480 79493 240 8 la_data_out[9]
+port 416 nsew signal tristate
+rlabel metal2 s 64073 -480 64129 240 8 la_oenb[0]
+port 417 nsew signal input
+rlabel metal2 s 241403 -480 241459 240 8 la_oenb[100]
+port 418 nsew signal input
+rlabel metal2 s 243197 -480 243253 240 8 la_oenb[101]
+port 419 nsew signal input
+rlabel metal2 s 244945 -480 245001 240 8 la_oenb[102]
+port 420 nsew signal input
+rlabel metal2 s 246739 -480 246795 240 8 la_oenb[103]
+port 421 nsew signal input
+rlabel metal2 s 248533 -480 248589 240 8 la_oenb[104]
+port 422 nsew signal input
+rlabel metal2 s 250281 -480 250337 240 8 la_oenb[105]
+port 423 nsew signal input
+rlabel metal2 s 252075 -480 252131 240 8 la_oenb[106]
+port 424 nsew signal input
+rlabel metal2 s 253823 -480 253879 240 8 la_oenb[107]
+port 425 nsew signal input
+rlabel metal2 s 255617 -480 255673 240 8 la_oenb[108]
+port 426 nsew signal input
+rlabel metal2 s 257365 -480 257421 240 8 la_oenb[109]
+port 427 nsew signal input
+rlabel metal2 s 81829 -480 81885 240 8 la_oenb[10]
+port 428 nsew signal input
+rlabel metal2 s 259159 -480 259215 240 8 la_oenb[110]
+port 429 nsew signal input
+rlabel metal2 s 260907 -480 260963 240 8 la_oenb[111]
+port 430 nsew signal input
+rlabel metal2 s 262701 -480 262757 240 8 la_oenb[112]
+port 431 nsew signal input
+rlabel metal2 s 264495 -480 264551 240 8 la_oenb[113]
+port 432 nsew signal input
+rlabel metal2 s 266243 -480 266299 240 8 la_oenb[114]
+port 433 nsew signal input
+rlabel metal2 s 268037 -480 268093 240 8 la_oenb[115]
+port 434 nsew signal input
+rlabel metal2 s 269785 -480 269841 240 8 la_oenb[116]
+port 435 nsew signal input
+rlabel metal2 s 271579 -480 271635 240 8 la_oenb[117]
+port 436 nsew signal input
+rlabel metal2 s 273327 -480 273383 240 8 la_oenb[118]
+port 437 nsew signal input
+rlabel metal2 s 275121 -480 275177 240 8 la_oenb[119]
+port 438 nsew signal input
+rlabel metal2 s 83577 -480 83633 240 8 la_oenb[11]
+port 439 nsew signal input
+rlabel metal2 s 276869 -480 276925 240 8 la_oenb[120]
+port 440 nsew signal input
+rlabel metal2 s 278663 -480 278719 240 8 la_oenb[121]
+port 441 nsew signal input
+rlabel metal2 s 280411 -480 280467 240 8 la_oenb[122]
+port 442 nsew signal input
+rlabel metal2 s 282205 -480 282261 240 8 la_oenb[123]
+port 443 nsew signal input
+rlabel metal2 s 283999 -480 284055 240 8 la_oenb[124]
+port 444 nsew signal input
+rlabel metal2 s 285747 -480 285803 240 8 la_oenb[125]
+port 445 nsew signal input
+rlabel metal2 s 287541 -480 287597 240 8 la_oenb[126]
+port 446 nsew signal input
+rlabel metal2 s 289289 -480 289345 240 8 la_oenb[127]
+port 447 nsew signal input
+rlabel metal2 s 85371 -480 85427 240 8 la_oenb[12]
+port 448 nsew signal input
+rlabel metal2 s 87119 -480 87175 240 8 la_oenb[13]
+port 449 nsew signal input
+rlabel metal2 s 88913 -480 88969 240 8 la_oenb[14]
+port 450 nsew signal input
+rlabel metal2 s 90707 -480 90763 240 8 la_oenb[15]
+port 451 nsew signal input
+rlabel metal2 s 92455 -480 92511 240 8 la_oenb[16]
+port 452 nsew signal input
+rlabel metal2 s 94249 -480 94305 240 8 la_oenb[17]
+port 453 nsew signal input
+rlabel metal2 s 95997 -480 96053 240 8 la_oenb[18]
+port 454 nsew signal input
+rlabel metal2 s 97791 -480 97847 240 8 la_oenb[19]
+port 455 nsew signal input
+rlabel metal2 s 65867 -480 65923 240 8 la_oenb[1]
+port 456 nsew signal input
+rlabel metal2 s 99539 -480 99595 240 8 la_oenb[20]
+port 457 nsew signal input
+rlabel metal2 s 101333 -480 101389 240 8 la_oenb[21]
+port 458 nsew signal input
+rlabel metal2 s 103081 -480 103137 240 8 la_oenb[22]
+port 459 nsew signal input
+rlabel metal2 s 104875 -480 104931 240 8 la_oenb[23]
+port 460 nsew signal input
+rlabel metal2 s 106669 -480 106725 240 8 la_oenb[24]
+port 461 nsew signal input
+rlabel metal2 s 108417 -480 108473 240 8 la_oenb[25]
+port 462 nsew signal input
+rlabel metal2 s 110211 -480 110267 240 8 la_oenb[26]
+port 463 nsew signal input
+rlabel metal2 s 111959 -480 112015 240 8 la_oenb[27]
+port 464 nsew signal input
+rlabel metal2 s 113753 -480 113809 240 8 la_oenb[28]
+port 465 nsew signal input
+rlabel metal2 s 115501 -480 115557 240 8 la_oenb[29]
+port 466 nsew signal input
+rlabel metal2 s 67615 -480 67671 240 8 la_oenb[2]
+port 467 nsew signal input
+rlabel metal2 s 117295 -480 117351 240 8 la_oenb[30]
+port 468 nsew signal input
+rlabel metal2 s 119043 -480 119099 240 8 la_oenb[31]
+port 469 nsew signal input
+rlabel metal2 s 120837 -480 120893 240 8 la_oenb[32]
+port 470 nsew signal input
+rlabel metal2 s 122585 -480 122641 240 8 la_oenb[33]
+port 471 nsew signal input
+rlabel metal2 s 124379 -480 124435 240 8 la_oenb[34]
+port 472 nsew signal input
+rlabel metal2 s 126173 -480 126229 240 8 la_oenb[35]
+port 473 nsew signal input
+rlabel metal2 s 127921 -480 127977 240 8 la_oenb[36]
+port 474 nsew signal input
+rlabel metal2 s 129715 -480 129771 240 8 la_oenb[37]
+port 475 nsew signal input
+rlabel metal2 s 131463 -480 131519 240 8 la_oenb[38]
+port 476 nsew signal input
+rlabel metal2 s 133257 -480 133313 240 8 la_oenb[39]
+port 477 nsew signal input
+rlabel metal2 s 69409 -480 69465 240 8 la_oenb[3]
+port 478 nsew signal input
+rlabel metal2 s 135005 -480 135061 240 8 la_oenb[40]
+port 479 nsew signal input
+rlabel metal2 s 136799 -480 136855 240 8 la_oenb[41]
+port 480 nsew signal input
+rlabel metal2 s 138547 -480 138603 240 8 la_oenb[42]
+port 481 nsew signal input
+rlabel metal2 s 140341 -480 140397 240 8 la_oenb[43]
+port 482 nsew signal input
+rlabel metal2 s 142135 -480 142191 240 8 la_oenb[44]
+port 483 nsew signal input
+rlabel metal2 s 143883 -480 143939 240 8 la_oenb[45]
+port 484 nsew signal input
+rlabel metal2 s 145677 -480 145733 240 8 la_oenb[46]
+port 485 nsew signal input
+rlabel metal2 s 147425 -480 147481 240 8 la_oenb[47]
+port 486 nsew signal input
+rlabel metal2 s 149219 -480 149275 240 8 la_oenb[48]
+port 487 nsew signal input
+rlabel metal2 s 150967 -480 151023 240 8 la_oenb[49]
+port 488 nsew signal input
+rlabel metal2 s 71203 -480 71259 240 8 la_oenb[4]
+port 489 nsew signal input
+rlabel metal2 s 152761 -480 152817 240 8 la_oenb[50]
+port 490 nsew signal input
+rlabel metal2 s 154509 -480 154565 240 8 la_oenb[51]
+port 491 nsew signal input
+rlabel metal2 s 156303 -480 156359 240 8 la_oenb[52]
+port 492 nsew signal input
+rlabel metal2 s 158097 -480 158153 240 8 la_oenb[53]
+port 493 nsew signal input
+rlabel metal2 s 159845 -480 159901 240 8 la_oenb[54]
+port 494 nsew signal input
+rlabel metal2 s 161639 -480 161695 240 8 la_oenb[55]
+port 495 nsew signal input
+rlabel metal2 s 163387 -480 163443 240 8 la_oenb[56]
+port 496 nsew signal input
+rlabel metal2 s 165181 -480 165237 240 8 la_oenb[57]
+port 497 nsew signal input
+rlabel metal2 s 166929 -480 166985 240 8 la_oenb[58]
+port 498 nsew signal input
+rlabel metal2 s 168723 -480 168779 240 8 la_oenb[59]
+port 499 nsew signal input
+rlabel metal2 s 72951 -480 73007 240 8 la_oenb[5]
+port 500 nsew signal input
+rlabel metal2 s 170471 -480 170527 240 8 la_oenb[60]
+port 501 nsew signal input
+rlabel metal2 s 172265 -480 172321 240 8 la_oenb[61]
+port 502 nsew signal input
+rlabel metal2 s 174013 -480 174069 240 8 la_oenb[62]
+port 503 nsew signal input
+rlabel metal2 s 175807 -480 175863 240 8 la_oenb[63]
+port 504 nsew signal input
+rlabel metal2 s 177601 -480 177657 240 8 la_oenb[64]
+port 505 nsew signal input
+rlabel metal2 s 179349 -480 179405 240 8 la_oenb[65]
+port 506 nsew signal input
+rlabel metal2 s 181143 -480 181199 240 8 la_oenb[66]
+port 507 nsew signal input
+rlabel metal2 s 182891 -480 182947 240 8 la_oenb[67]
+port 508 nsew signal input
+rlabel metal2 s 184685 -480 184741 240 8 la_oenb[68]
+port 509 nsew signal input
+rlabel metal2 s 186433 -480 186489 240 8 la_oenb[69]
+port 510 nsew signal input
+rlabel metal2 s 74745 -480 74801 240 8 la_oenb[6]
+port 511 nsew signal input
+rlabel metal2 s 188227 -480 188283 240 8 la_oenb[70]
+port 512 nsew signal input
+rlabel metal2 s 189975 -480 190031 240 8 la_oenb[71]
+port 513 nsew signal input
+rlabel metal2 s 191769 -480 191825 240 8 la_oenb[72]
+port 514 nsew signal input
+rlabel metal2 s 193563 -480 193619 240 8 la_oenb[73]
+port 515 nsew signal input
+rlabel metal2 s 195311 -480 195367 240 8 la_oenb[74]
+port 516 nsew signal input
+rlabel metal2 s 197105 -480 197161 240 8 la_oenb[75]
+port 517 nsew signal input
+rlabel metal2 s 198853 -480 198909 240 8 la_oenb[76]
+port 518 nsew signal input
+rlabel metal2 s 200647 -480 200703 240 8 la_oenb[77]
+port 519 nsew signal input
+rlabel metal2 s 202395 -480 202451 240 8 la_oenb[78]
+port 520 nsew signal input
+rlabel metal2 s 204189 -480 204245 240 8 la_oenb[79]
+port 521 nsew signal input
+rlabel metal2 s 76493 -480 76549 240 8 la_oenb[7]
+port 522 nsew signal input
+rlabel metal2 s 205937 -480 205993 240 8 la_oenb[80]
+port 523 nsew signal input
+rlabel metal2 s 207731 -480 207787 240 8 la_oenb[81]
+port 524 nsew signal input
+rlabel metal2 s 209479 -480 209535 240 8 la_oenb[82]
+port 525 nsew signal input
+rlabel metal2 s 211273 -480 211329 240 8 la_oenb[83]
+port 526 nsew signal input
+rlabel metal2 s 213067 -480 213123 240 8 la_oenb[84]
+port 527 nsew signal input
+rlabel metal2 s 214815 -480 214871 240 8 la_oenb[85]
+port 528 nsew signal input
+rlabel metal2 s 216609 -480 216665 240 8 la_oenb[86]
+port 529 nsew signal input
+rlabel metal2 s 218357 -480 218413 240 8 la_oenb[87]
+port 530 nsew signal input
+rlabel metal2 s 220151 -480 220207 240 8 la_oenb[88]
+port 531 nsew signal input
+rlabel metal2 s 221899 -480 221955 240 8 la_oenb[89]
+port 532 nsew signal input
+rlabel metal2 s 78287 -480 78343 240 8 la_oenb[8]
+port 533 nsew signal input
+rlabel metal2 s 223693 -480 223749 240 8 la_oenb[90]
+port 534 nsew signal input
+rlabel metal2 s 225441 -480 225497 240 8 la_oenb[91]
+port 535 nsew signal input
+rlabel metal2 s 227235 -480 227291 240 8 la_oenb[92]
+port 536 nsew signal input
+rlabel metal2 s 229029 -480 229085 240 8 la_oenb[93]
+port 537 nsew signal input
+rlabel metal2 s 230777 -480 230833 240 8 la_oenb[94]
+port 538 nsew signal input
+rlabel metal2 s 232571 -480 232627 240 8 la_oenb[95]
+port 539 nsew signal input
+rlabel metal2 s 234319 -480 234375 240 8 la_oenb[96]
+port 540 nsew signal input
+rlabel metal2 s 236113 -480 236169 240 8 la_oenb[97]
+port 541 nsew signal input
+rlabel metal2 s 237861 -480 237917 240 8 la_oenb[98]
+port 542 nsew signal input
+rlabel metal2 s 239655 -480 239711 240 8 la_oenb[99]
+port 543 nsew signal input
+rlabel metal2 s 80035 -480 80091 240 8 la_oenb[9]
+port 544 nsew signal input
+rlabel metal2 s 289887 -480 289943 240 8 user_clock2
+port 545 nsew signal input
+rlabel metal2 s 290485 -480 290541 240 8 user_irq[0]
+port 546 nsew signal tristate
+rlabel metal2 s 291083 -480 291139 240 8 user_irq[1]
+port 547 nsew signal tristate
+rlabel metal2 s 291681 -480 291737 240 8 user_irq[2]
+port 548 nsew signal tristate
+rlabel metal2 s 271 -480 327 240 8 wb_clk_i
+port 549 nsew signal input
+rlabel metal2 s 823 -480 879 240 8 wb_rst_i
+port 550 nsew signal input
+rlabel metal2 s 1421 -480 1477 240 8 wbs_ack_o
+port 551 nsew signal tristate
+rlabel metal2 s 3813 -480 3869 240 8 wbs_adr_i[0]
+port 552 nsew signal input
+rlabel metal2 s 23915 -480 23971 240 8 wbs_adr_i[10]
+port 553 nsew signal input
+rlabel metal2 s 25663 -480 25719 240 8 wbs_adr_i[11]
+port 554 nsew signal input
+rlabel metal2 s 27457 -480 27513 240 8 wbs_adr_i[12]
+port 555 nsew signal input
+rlabel metal2 s 29205 -480 29261 240 8 wbs_adr_i[13]
+port 556 nsew signal input
+rlabel metal2 s 30999 -480 31055 240 8 wbs_adr_i[14]
+port 557 nsew signal input
+rlabel metal2 s 32747 -480 32803 240 8 wbs_adr_i[15]
+port 558 nsew signal input
+rlabel metal2 s 34541 -480 34597 240 8 wbs_adr_i[16]
+port 559 nsew signal input
+rlabel metal2 s 36289 -480 36345 240 8 wbs_adr_i[17]
+port 560 nsew signal input
+rlabel metal2 s 38083 -480 38139 240 8 wbs_adr_i[18]
+port 561 nsew signal input
+rlabel metal2 s 39831 -480 39887 240 8 wbs_adr_i[19]
+port 562 nsew signal input
+rlabel metal2 s 6159 -480 6215 240 8 wbs_adr_i[1]
+port 563 nsew signal input
+rlabel metal2 s 41625 -480 41681 240 8 wbs_adr_i[20]
+port 564 nsew signal input
+rlabel metal2 s 43419 -480 43475 240 8 wbs_adr_i[21]
+port 565 nsew signal input
+rlabel metal2 s 45167 -480 45223 240 8 wbs_adr_i[22]
+port 566 nsew signal input
+rlabel metal2 s 46961 -480 47017 240 8 wbs_adr_i[23]
+port 567 nsew signal input
+rlabel metal2 s 48709 -480 48765 240 8 wbs_adr_i[24]
+port 568 nsew signal input
+rlabel metal2 s 50503 -480 50559 240 8 wbs_adr_i[25]
+port 569 nsew signal input
+rlabel metal2 s 52251 -480 52307 240 8 wbs_adr_i[26]
+port 570 nsew signal input
+rlabel metal2 s 54045 -480 54101 240 8 wbs_adr_i[27]
+port 571 nsew signal input
+rlabel metal2 s 55793 -480 55849 240 8 wbs_adr_i[28]
+port 572 nsew signal input
+rlabel metal2 s 57587 -480 57643 240 8 wbs_adr_i[29]
+port 573 nsew signal input
+rlabel metal2 s 8505 -480 8561 240 8 wbs_adr_i[2]
+port 574 nsew signal input
+rlabel metal2 s 59381 -480 59437 240 8 wbs_adr_i[30]
+port 575 nsew signal input
+rlabel metal2 s 61129 -480 61185 240 8 wbs_adr_i[31]
+port 576 nsew signal input
+rlabel metal2 s 10897 -480 10953 240 8 wbs_adr_i[3]
+port 577 nsew signal input
+rlabel metal2 s 13243 -480 13299 240 8 wbs_adr_i[4]
+port 578 nsew signal input
+rlabel metal2 s 15037 -480 15093 240 8 wbs_adr_i[5]
+port 579 nsew signal input
+rlabel metal2 s 16785 -480 16841 240 8 wbs_adr_i[6]
+port 580 nsew signal input
+rlabel metal2 s 18579 -480 18635 240 8 wbs_adr_i[7]
+port 581 nsew signal input
+rlabel metal2 s 20327 -480 20383 240 8 wbs_adr_i[8]
+port 582 nsew signal input
+rlabel metal2 s 22121 -480 22177 240 8 wbs_adr_i[9]
+port 583 nsew signal input
+rlabel metal2 s 2019 -480 2075 240 8 wbs_cyc_i
+port 584 nsew signal input
+rlabel metal2 s 4365 -480 4421 240 8 wbs_dat_i[0]
+port 585 nsew signal input
+rlabel metal2 s 24467 -480 24523 240 8 wbs_dat_i[10]
+port 586 nsew signal input
+rlabel metal2 s 26261 -480 26317 240 8 wbs_dat_i[11]
+port 587 nsew signal input
+rlabel metal2 s 28009 -480 28065 240 8 wbs_dat_i[12]
+port 588 nsew signal input
+rlabel metal2 s 29803 -480 29859 240 8 wbs_dat_i[13]
+port 589 nsew signal input
+rlabel metal2 s 31597 -480 31653 240 8 wbs_dat_i[14]
+port 590 nsew signal input
+rlabel metal2 s 33345 -480 33401 240 8 wbs_dat_i[15]
+port 591 nsew signal input
+rlabel metal2 s 35139 -480 35195 240 8 wbs_dat_i[16]
+port 592 nsew signal input
+rlabel metal2 s 36887 -480 36943 240 8 wbs_dat_i[17]
+port 593 nsew signal input
+rlabel metal2 s 38681 -480 38737 240 8 wbs_dat_i[18]
+port 594 nsew signal input
+rlabel metal2 s 40429 -480 40485 240 8 wbs_dat_i[19]
+port 595 nsew signal input
+rlabel metal2 s 6757 -480 6813 240 8 wbs_dat_i[1]
+port 596 nsew signal input
+rlabel metal2 s 42223 -480 42279 240 8 wbs_dat_i[20]
+port 597 nsew signal input
+rlabel metal2 s 43971 -480 44027 240 8 wbs_dat_i[21]
+port 598 nsew signal input
+rlabel metal2 s 45765 -480 45821 240 8 wbs_dat_i[22]
+port 599 nsew signal input
+rlabel metal2 s 47559 -480 47615 240 8 wbs_dat_i[23]
+port 600 nsew signal input
+rlabel metal2 s 49307 -480 49363 240 8 wbs_dat_i[24]
+port 601 nsew signal input
+rlabel metal2 s 51101 -480 51157 240 8 wbs_dat_i[25]
+port 602 nsew signal input
+rlabel metal2 s 52849 -480 52905 240 8 wbs_dat_i[26]
+port 603 nsew signal input
+rlabel metal2 s 54643 -480 54699 240 8 wbs_dat_i[27]
+port 604 nsew signal input
+rlabel metal2 s 56391 -480 56447 240 8 wbs_dat_i[28]
+port 605 nsew signal input
+rlabel metal2 s 58185 -480 58241 240 8 wbs_dat_i[29]
+port 606 nsew signal input
+rlabel metal2 s 9103 -480 9159 240 8 wbs_dat_i[2]
+port 607 nsew signal input
+rlabel metal2 s 59933 -480 59989 240 8 wbs_dat_i[30]
+port 608 nsew signal input
+rlabel metal2 s 61727 -480 61783 240 8 wbs_dat_i[31]
+port 609 nsew signal input
+rlabel metal2 s 11495 -480 11551 240 8 wbs_dat_i[3]
+port 610 nsew signal input
+rlabel metal2 s 13841 -480 13897 240 8 wbs_dat_i[4]
+port 611 nsew signal input
+rlabel metal2 s 15635 -480 15691 240 8 wbs_dat_i[5]
+port 612 nsew signal input
+rlabel metal2 s 17383 -480 17439 240 8 wbs_dat_i[6]
+port 613 nsew signal input
+rlabel metal2 s 19177 -480 19233 240 8 wbs_dat_i[7]
+port 614 nsew signal input
+rlabel metal2 s 20925 -480 20981 240 8 wbs_dat_i[8]
+port 615 nsew signal input
+rlabel metal2 s 22719 -480 22775 240 8 wbs_dat_i[9]
+port 616 nsew signal input
+rlabel metal2 s 4963 -480 5019 240 8 wbs_dat_o[0]
+port 617 nsew signal tristate
+rlabel metal2 s 25065 -480 25121 240 8 wbs_dat_o[10]
+port 618 nsew signal tristate
+rlabel metal2 s 26859 -480 26915 240 8 wbs_dat_o[11]
+port 619 nsew signal tristate
+rlabel metal2 s 28607 -480 28663 240 8 wbs_dat_o[12]
+port 620 nsew signal tristate
+rlabel metal2 s 30401 -480 30457 240 8 wbs_dat_o[13]
+port 621 nsew signal tristate
+rlabel metal2 s 32149 -480 32205 240 8 wbs_dat_o[14]
+port 622 nsew signal tristate
+rlabel metal2 s 33943 -480 33999 240 8 wbs_dat_o[15]
+port 623 nsew signal tristate
+rlabel metal2 s 35737 -480 35793 240 8 wbs_dat_o[16]
+port 624 nsew signal tristate
+rlabel metal2 s 37485 -480 37541 240 8 wbs_dat_o[17]
+port 625 nsew signal tristate
+rlabel metal2 s 39279 -480 39335 240 8 wbs_dat_o[18]
+port 626 nsew signal tristate
+rlabel metal2 s 41027 -480 41083 240 8 wbs_dat_o[19]
+port 627 nsew signal tristate
+rlabel metal2 s 7355 -480 7411 240 8 wbs_dat_o[1]
+port 628 nsew signal tristate
+rlabel metal2 s 42821 -480 42877 240 8 wbs_dat_o[20]
+port 629 nsew signal tristate
+rlabel metal2 s 44569 -480 44625 240 8 wbs_dat_o[21]
+port 630 nsew signal tristate
+rlabel metal2 s 46363 -480 46419 240 8 wbs_dat_o[22]
+port 631 nsew signal tristate
+rlabel metal2 s 48111 -480 48167 240 8 wbs_dat_o[23]
+port 632 nsew signal tristate
+rlabel metal2 s 49905 -480 49961 240 8 wbs_dat_o[24]
+port 633 nsew signal tristate
+rlabel metal2 s 51653 -480 51709 240 8 wbs_dat_o[25]
+port 634 nsew signal tristate
+rlabel metal2 s 53447 -480 53503 240 8 wbs_dat_o[26]
+port 635 nsew signal tristate
+rlabel metal2 s 55241 -480 55297 240 8 wbs_dat_o[27]
+port 636 nsew signal tristate
+rlabel metal2 s 56989 -480 57045 240 8 wbs_dat_o[28]
+port 637 nsew signal tristate
+rlabel metal2 s 58783 -480 58839 240 8 wbs_dat_o[29]
+port 638 nsew signal tristate
+rlabel metal2 s 9701 -480 9757 240 8 wbs_dat_o[2]
+port 639 nsew signal tristate
+rlabel metal2 s 60531 -480 60587 240 8 wbs_dat_o[30]
+port 640 nsew signal tristate
+rlabel metal2 s 62325 -480 62381 240 8 wbs_dat_o[31]
+port 641 nsew signal tristate
+rlabel metal2 s 12093 -480 12149 240 8 wbs_dat_o[3]
+port 642 nsew signal tristate
+rlabel metal2 s 14439 -480 14495 240 8 wbs_dat_o[4]
+port 643 nsew signal tristate
+rlabel metal2 s 16187 -480 16243 240 8 wbs_dat_o[5]
+port 644 nsew signal tristate
+rlabel metal2 s 17981 -480 18037 240 8 wbs_dat_o[6]
+port 645 nsew signal tristate
+rlabel metal2 s 19775 -480 19831 240 8 wbs_dat_o[7]
+port 646 nsew signal tristate
+rlabel metal2 s 21523 -480 21579 240 8 wbs_dat_o[8]
+port 647 nsew signal tristate
+rlabel metal2 s 23317 -480 23373 240 8 wbs_dat_o[9]
+port 648 nsew signal tristate
+rlabel metal2 s 5561 -480 5617 240 8 wbs_sel_i[0]
+port 649 nsew signal input
+rlabel metal2 s 7953 -480 8009 240 8 wbs_sel_i[1]
+port 650 nsew signal input
+rlabel metal2 s 10299 -480 10355 240 8 wbs_sel_i[2]
+port 651 nsew signal input
+rlabel metal2 s 12645 -480 12701 240 8 wbs_sel_i[3]
+port 652 nsew signal input
+rlabel metal2 s 2617 -480 2673 240 8 wbs_stb_i
+port 653 nsew signal input
+rlabel metal2 s 3215 -480 3271 240 8 wbs_we_i
+port 654 nsew signal input
+rlabel metal4 s 292660 -462 292960 352430 6 vccd1
+port 655 nsew power bidirectional
+rlabel metal4 s -998 -462 -698 352430 4 vccd1.extra1
+port 656 nsew power bidirectional
+rlabel metal5 s -998 352130 292960 352430 6 vccd1.extra2
+port 657 nsew power bidirectional
+rlabel metal5 s -998 -462 292960 -162 8 vccd1.extra3
+port 658 nsew power bidirectional
+rlabel metal4 s 293130 -932 293430 352900 6 vssd1
+port 659 nsew ground bidirectional
+rlabel metal4 s -1468 -932 -1168 352900 4 vssd1.extra1
+port 660 nsew ground bidirectional
+rlabel metal5 s -1468 352600 293430 352900 6 vssd1.extra2
+port 661 nsew ground bidirectional
+rlabel metal5 s -1468 -932 293430 -632 8 vssd1.extra3
+port 662 nsew ground bidirectional
+rlabel metal4 s 293600 -1402 293900 353370 6 vccd2
+port 663 nsew power bidirectional
+rlabel metal4 s -1938 -1402 -1638 353370 4 vccd2.extra1
+port 664 nsew power bidirectional
+rlabel metal5 s -1938 353070 293900 353370 6 vccd2.extra2
+port 665 nsew power bidirectional
+rlabel metal5 s -1938 -1402 293900 -1102 8 vccd2.extra3
+port 666 nsew power bidirectional
+rlabel metal4 s 294070 -1872 294370 353840 6 vssd2
+port 667 nsew ground bidirectional
+rlabel metal4 s -2408 -1872 -2108 353840 4 vssd2.extra1
+port 668 nsew ground bidirectional
+rlabel metal5 s -2408 353540 294370 353840 6 vssd2.extra2
+port 669 nsew ground bidirectional
+rlabel metal5 s -2408 -1872 294370 -1572 8 vssd2.extra3
+port 670 nsew ground bidirectional
+rlabel metal4 s 294540 -2342 294840 354310 6 vdda1
+port 671 nsew power bidirectional
+rlabel metal4 s -2878 -2342 -2578 354310 4 vdda1.extra1
+port 672 nsew power bidirectional
+rlabel metal5 s -2878 354010 294840 354310 6 vdda1.extra2
+port 673 nsew power bidirectional
+rlabel metal5 s -2878 -2342 294840 -2042 8 vdda1.extra3
+port 674 nsew power bidirectional
+rlabel metal4 s 295010 -2812 295310 354780 6 vssa1
+port 675 nsew ground bidirectional
+rlabel metal4 s -3348 -2812 -3048 354780 4 vssa1.extra1
+port 676 nsew ground bidirectional
+rlabel metal5 s -3348 354480 295310 354780 6 vssa1.extra2
+port 677 nsew ground bidirectional
+rlabel metal5 s -3348 -2812 295310 -2512 8 vssa1.extra3
+port 678 nsew ground bidirectional
+rlabel metal4 s 295480 -3282 295780 355250 6 vdda2
+port 679 nsew power bidirectional
+rlabel metal4 s -3818 -3282 -3518 355250 4 vdda2.extra1
+port 680 nsew power bidirectional
+rlabel metal5 s -3818 354950 295780 355250 6 vdda2.extra2
+port 681 nsew power bidirectional
+rlabel metal5 s -3818 -3282 295780 -2982 8 vdda2.extra3
+port 682 nsew power bidirectional
+rlabel metal4 s 295950 -3752 296250 355720 6 vssa2
+port 683 nsew ground bidirectional
+rlabel metal4 s -4288 -3752 -3988 355720 4 vssa2.extra1
+port 684 nsew ground bidirectional
+rlabel metal5 s -4288 355420 296250 355720 6 vssa2.extra2
+port 685 nsew ground bidirectional
+rlabel metal5 s -4288 -3752 296250 -3452 8 vssa2.extra3
+port 686 nsew ground bidirectional
+<< properties >>
+string FIXED_BBOX 0 0 292000 352000
+<< end >>
diff --git a/verilog/dv/mprj_por/Makefile b/verilog/dv/mprj_por/Makefile
new file mode 100644
index 0000000..e54380b
--- /dev/null
+++ b/verilog/dv/mprj_por/Makefile
@@ -0,0 +1,78 @@
+# SPDX-FileCopyrightText: 2020 Efabless Corporation
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+# SPDX-License-Identifier: Apache-2.0
+
+## Caravel Pointers
+CARAVEL_ROOT ?= ../../../caravel
+CARAVEL_PATH ?= $(CARAVEL_ROOT)
+CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel
+CARAVEL_VERILOG_PATH  = $(CARAVEL_PATH)/verilog
+CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl
+CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel
+
+## User Project Pointers
+UPRJ_VERILOG_PATH ?= ../../../verilog
+UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl
+UPRJ_BEHAVIOURAL_MODELS = ../
+
+## RISCV GCC 
+GCC_PATH?=/ef/apps/bin
+GCC_PREFIX?=riscv32-unknown-elf
+PDK_PATH?=/ef/tech/SW/sky130A
+
+## Simulation mode: RTL/GL
+SIM?=RTL
+
+.SUFFIXES:
+
+PATTERN = mprj_por
+
+all:  ${PATTERN:=.vcd}
+
+hex:  ${PATTERN:=.hex}
+
+%.vvp: %_tb.v %.hex
+ifeq ($(SIM),RTL)
+	iverilog -DFUNCTIONAL -DSIM -I $(PDK_PATH) \
+	-I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \
+	-I $(UPRJ_BEHAVIOURAL_MODELS)    -I $(UPRJ_RTL_PATH) \
+	$< -o $@ 
+else  
+	iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \
+	-I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \
+	-I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH)   -I $(UPRJ_VERILOG_PATH) \
+	$< -o $@ 
+endif
+
+%.vcd: %.vvp
+	vvp $<
+
+%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s
+	${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<
+
+%.hex: %.elf
+	${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@ 
+	# to fix flash base address
+	sed -i 's/@10000000/@00000000/g' $@
+
+%.bin: %.elf
+	${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@
+
+# ---- Clean ----
+
+clean:
+	rm -f *.elf *.hex *.bin *.vvp *.vcd *.log
+
+.PHONY: clean hex all
diff --git a/verilog/dv/mprj_por/mprj_por.c b/verilog/dv/mprj_por/mprj_por.c
new file mode 100644
index 0000000..9a51fc5
--- /dev/null
+++ b/verilog/dv/mprj_por/mprj_por.c
@@ -0,0 +1,49 @@
+/*
+ * SPDX-FileCopyrightText: 2020 Efabless Corporation
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// This include is relative to $CARAVEL_PATH (see Makefile)
+#include "verilog/dv/caravel/defs.h"
+
+// --------------------------------------------------------
+
+void main()
+{
+    reg_spimaster_config = 0xa002;	// Enable, prescaler = 2
+
+    reg_mprj_datal = 0x00000000;
+    reg_mprj_datah = 0x00000000;
+
+    // Configure mprj_io 10 and 25 as analog (digital in/out = off)
+    // Configure mprj_io 11, 12, 26, and 27 as digital output
+    // mprj_io 14 to 24 are analog pads and cannot be configured
+
+    reg_mprj_io_27 = GPIO_MODE_USER_STD_OUTPUT;
+    reg_mprj_io_26 = GPIO_MODE_USER_STD_OUTPUT;
+    reg_mprj_io_25 = GPIO_MODE_USER_STD_ANALOG;
+
+    reg_mprj_io_12 = GPIO_MODE_USER_STD_OUTPUT;
+    reg_mprj_io_11 = GPIO_MODE_USER_STD_OUTPUT;
+    reg_mprj_io_10 = GPIO_MODE_USER_STD_ANALOG;
+
+    /* Apply configuration */
+    reg_mprj_xfer = 1;
+    while (reg_mprj_xfer == 1);
+
+    /* Block until end of test */
+    while (1);
+}
+
diff --git a/verilog/dv/mprj_por/mprj_por_tb.v b/verilog/dv/mprj_por/mprj_por_tb.v
new file mode 100644
index 0000000..39e4a36
--- /dev/null
+++ b/verilog/dv/mprj_por/mprj_por_tb.v
@@ -0,0 +1,170 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype wire
+
+`timescale 1 ns / 1 ps
+
+`include "uprj_analog_netlists.v"
+`include "caravan_netlists.v"
+`include "spiflash.v"
+`include "tbuart.v"
+
+module mprj_por_tb;
+    // Signals declaration
+    reg clock;
+    reg RSTB;
+    reg CSB;
+    reg power1, power2;
+    reg power3;
+
+    wire HIGH;
+    wire LOW;
+    wire TRI;
+    assign HIGH = 1'b1;
+    assign LOW = 1'b0;
+    assign TRI = 1'bz;
+
+    wire gpio;
+    wire uart_tx;
+    wire [37:0] mprj_io;
+    wire [3:0] checkbits;
+    wire [1:0] status;
+
+    // Signals Assignment
+    assign uart_tx = mprj_io[6];
+    assign mprj_io[3] = (CSB == 1'b1) ? 1'b1 : 1'bz;
+
+    // Power supply for POR
+    assign mprj_io[18] = power3;
+
+    // Readback from POR (digital HV through analog pad connection)
+    assign status = {mprj_io[25],  mprj_io[10]};
+
+    // Readback from POR (digital LV)
+    assign checkbits = {mprj_io[27:26], mprj_io[12:11]};
+
+    always #12.5 clock <= (clock === 1'b0);
+
+    initial begin
+        clock = 0;
+    end
+
+    initial begin
+        $dumpfile("mprj_por.vcd");
+        $dumpvars(0, mprj_por_tb);
+
+        // Repeat cycles of 1000 clock edges as needed to complete testbench
+        repeat (150) begin
+            repeat (1000) @(posedge clock);
+        end
+        $display("%c[1;31m",27);
+        $display ("Monitor: Timeout, Test Project IO Stimulus (RTL) Failed");
+        $display("%c[0m",27);
+        $finish;
+    end
+
+    initial begin
+        wait(status == 2'h1);
+        $display("Monitor: mprj_por test started");
+	#100;
+	if (checkbits != 4'h9) begin
+		$display("Monitor: mprj_por test failed");
+		$finish;
+	end
+        wait(status == 2'h3);
+	#100;
+	if (checkbits != 4'h5) begin
+		$display("Monitor: mprj_por test failed");
+		$finish;
+	end
+        $display("Monitor: mprj_por test Passed");
+        #10000;
+        $finish;
+    end
+
+    // Reset Operation
+    initial begin
+        RSTB <= 1'b0;
+        CSB  <= 1'b1;       // Force CSB high
+        #2000;
+        RSTB <= 1'b1;       // Release reset
+    end
+
+    initial begin		// Power-up sequence
+        power1 <= 1'b0;
+        power2 <= 1'b0;
+        power3 <= 1'b0;
+        #200;
+        power1 <= 1'b1;
+        #200;
+        power2 <= 1'b1;
+	#150000;		// Need time to run the managment SoC setup.
+	power3 <= 1'b1;		// Power up the 2nd POR.
+    end
+
+    wire flash_csb;
+    wire flash_clk;
+    wire flash_io0;
+    wire flash_io1;
+
+    wire VDD3V3 = power1;
+    wire VDD1V8 = power2;
+    wire VSS = 1'b0;
+
+    caravan uut (
+        .vddio	  (VDD3V3),
+        .vssio	  (VSS),
+        .vdda	  (VDD3V3),
+        .vssa	  (VSS),
+        .vccd	  (VDD1V8),
+        .vssd	  (VSS),
+        .vdda1    (VDD3V3),
+        .vdda2    (VDD3V3),
+        .vssa1	  (VSS),
+        .vssa2	  (VSS),
+        .vccd1	  (VDD1V8),
+        .vccd2	  (VDD1V8),
+        .vssd1	  (VSS),
+        .vssd2	  (VSS),
+        .clock	  (clock),
+        .gpio     (gpio),
+        .mprj_io  (mprj_io),
+        .flash_csb(flash_csb),
+        .flash_clk(flash_clk),
+        .flash_io0(flash_io0),
+        .flash_io1(flash_io1),
+        .resetb	  (RSTB)
+    );
+
+
+    spiflash #(
+        .FILENAME("mprj_por.hex")
+    ) spiflash (
+        .csb(flash_csb),
+        .clk(flash_clk),
+        .io0(flash_io0),
+        .io1(flash_io1),
+        .io2(),         // not used
+        .io3()          // not used
+    );
+
+    // Testbench UART
+    tbuart tbuart (
+        .ser_rx(uart_tx)
+    );
+
+endmodule
+`default_nettype wire
diff --git a/verilog/rtl/example_por.v b/verilog/rtl/example_por.v
new file mode 100644
index 0000000..d318fba
--- /dev/null
+++ b/verilog/rtl/example_por.v
@@ -0,0 +1,95 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+`timescale 1 ns / 1 ps
+
+// This is just a copy of simple_por.v from the Caravel project, used
+// as an analog user project example.
+
+module example_por(
+`ifdef USE_POWER_PINS
+    inout vdd3v3,
+    inout vdd1v8,
+    inout vss,
+`endif
+    output porb_h,
+    output porb_l,
+    output por_l
+);
+
+    wire mid, porb_h;
+    reg inode;
+
+    // This is a behavioral model!  Actual circuit is a resitor dumping
+    // current (slowly) from vdd3v3 onto a capacitor, and this fed into
+    // two schmitt triggers for strong hysteresis/glitch tolerance.
+
+    initial begin
+	inode <= 1'b0; 
+    end 
+
+    // Emulate current source on capacitor as a 500ns delay either up or
+    // down.  Note that this is sped way up for verilog simulation;  the
+    // actual circuit is set to a 15ms delay.
+
+    always @(posedge vdd3v3) begin
+	#500 inode <= 1'b1;
+    end
+    always @(negedge vdd3v3) begin
+	#500 inode <= 1'b0;
+    end
+
+    // Instantiate two shmitt trigger buffers in series
+
+    sky130_fd_sc_hvl__schmittbuf_1 hystbuf1 (
+`ifdef USE_POWER_PINS
+	.VPWR(vdd3v3),
+	.VGND(vss),
+	.VPB(vdd3v3),
+	.VNB(vss),
+`endif
+	.A(inode),
+	.X(mid)
+    );
+
+    sky130_fd_sc_hvl__schmittbuf_1 hystbuf2 (
+`ifdef USE_POWER_PINS
+	.VPWR(vdd3v3),
+	.VGND(vss),
+	.VPB(vdd3v3),
+	.VNB(vss),
+`endif
+	.A(mid),
+	.X(porb_h)
+    );
+
+    sky130_fd_sc_hvl__lsbufhv2lv_1 porb_level (
+`ifdef USE_POWER_PINS
+	.VPWR(vdd3v3),
+	.VPB(vdd3v3),
+	.LVPWR(vdd1v8),
+	.VNB(vss),
+	.VGND(vss),
+`endif
+	.A(porb_h),
+	.X(porb_l)
+    );
+
+    // since this is behavioral anyway, but this should be
+    // replaced by a proper inverter
+    assign por_l = ~porb_l;
+endmodule
+`default_nettype wire
diff --git a/verilog/rtl/uprj_analog_netlists.v b/verilog/rtl/uprj_analog_netlists.v
new file mode 100644
index 0000000..46c2606
--- /dev/null
+++ b/verilog/rtl/uprj_analog_netlists.v
@@ -0,0 +1,37 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+/*--------------------------------------------------------------*/
+/* caravel, a project harness for the Google/SkyWater sky130	*/
+/* fabrication process and open source PDK			*/
+/*                                                          	*/
+/* Copyright 2020 efabless, Inc.                            	*/
+/* Written by Tim Edwards, December 2019                    	*/
+/* and Mohamed Shalan, August 2020			    	*/
+/* This file is open source hardware released under the     	*/
+/* Apache 2.0 license.  See file LICENSE.                   	*/
+/*                                                          	*/
+/*--------------------------------------------------------------*/
+
+`include "defines.v"
+`define USE_POWER_PINS
+
+`ifdef GL
+    `default_nettype wire
+    `include "gl/user_analog_project_wrapper.v"
+    `include "gl/user_analog_proj_example.v"
+`else
+    `include "user_analog_project_wrapper.v"
+    `include "user_analog_proj_example.v"
+`endif
diff --git a/verilog/rtl/uprj_netlists.v b/verilog/rtl/uprj_netlists.v
deleted file mode 100644
index 8e592c0..0000000
--- a/verilog/rtl/uprj_netlists.v
+++ /dev/null
@@ -1,26 +0,0 @@
-// SPDX-FileCopyrightText: 2020 Efabless Corporation
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//      http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-// SPDX-License-Identifier: Apache-2.0
-
-// Include caravel global defines for the number of the user project IO pads 
-`include "defines.v"
-`define USE_POWER_PINS
-
-`ifdef GL
-    // Assume default net type to be wire because GL netlists don't have the wire definitions
-    `default_nettype wire
-    `include "gl/user_analog_project_wrapper.v"
-`else
-    `include "user_analog_project_wrapper.v"
-`endif
\ No newline at end of file
diff --git a/verilog/rtl/user_analog_proj_example.v b/verilog/rtl/user_analog_proj_example.v
new file mode 100644
index 0000000..8764d47
--- /dev/null
+++ b/verilog/rtl/user_analog_proj_example.v
@@ -0,0 +1,221 @@
+// SPDX-FileCopyrightText: 2020 Efabless Corporation
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+// SPDX-License-Identifier: Apache-2.0
+
+`default_nettype none
+
+`include "example_por.v"
+
+/*
+ * I/O mapping for analog
+ *
+ * mprj_io[37]  io_in/out/oeb/in_3v3[26]  ---                    ---
+ * mprj_io[36]  io_in/out/oeb/in_3v3[25]  ---                    ---
+ * mprj_io[35]  io_in/out/oeb/in_3v3[24]  gpio_analog/noesd[17]  ---
+ * mprj_io[34]  io_in/out/oeb/in_3v3[23]  gpio_analog/noesd[16]  ---
+ * mprj_io[33]  io_in/out/oeb/in_3v3[22]  gpio_analog/noesd[15]  ---
+ * mprj_io[32]  io_in/out/oeb/in_3v3[21]  gpio_analog/noesd[14]  ---
+ * mprj_io[31]  io_in/out/oeb/in_3v3[20]  gpio_analog/noesd[13]  ---
+ * mprj_io[30]  io_in/out/oeb/in_3v3[19]  gpio_analog/noesd[12]  ---
+ * mprj_io[29]  io_in/out/oeb/in_3v3[18]  gpio_analog/noesd[11]  ---
+ * mprj_io[28]  io_in/out/oeb/in_3v3[17]  gpio_analog/noesd[10]  ---
+ * mprj_io[27]  io_in/out/oeb/in_3v3[16]  gpio_analog/noesd[9]   ---
+ * mprj_io[26]  io_in/out/oeb/in_3v3[15]  gpio_analog/noesd[8]   ---
+ * mprj_io[25]  io_in/out/oeb/in_3v3[14]  gpio_analog/noesd[7]   ---
+ * mprj_io[24]  ---                       ---                    user_analog[10]
+ * mprj_io[23]  ---                       ---                    user_analog[9]
+ * mprj_io[22]  ---                       ---                    user_analog[8]
+ * mprj_io[21]  ---                       ---                    user_analog[7]
+ * mprj_io[20]  ---                       ---                    user_analog[6]  clamp[2]
+ * mprj_io[19]  ---                       ---                    user_analog[5]  clamp[1]
+ * mprj_io[18]  ---                       ---                    user_analog[4]  clamp[0]
+ * mprj_io[17]  ---                       ---                    user_analog[3]
+ * mprj_io[16]  ---                       ---                    user_analog[2]
+ * mprj_io[15]  ---                       ---                    user_analog[1]
+ * mprj_io[14]  ---                       ---                    user_analog[0]
+ * mprj_io[13]  io_in/out/oeb/in_3v3[13]  gpio_analog/noesd[6]   ---
+ * mprj_io[12]  io_in/out/oeb/in_3v3[12]  gpio_analog/noesd[5]   ---
+ * mprj_io[11]  io_in/out/oeb/in_3v3[11]  gpio_analog/noesd[4]   ---
+ * mprj_io[10]  io_in/out/oeb/in_3v3[10]  gpio_analog/noesd[3]   ---
+ * mprj_io[9]   io_in/out/oeb/in_3v3[9]   gpio_analog/noesd[2]   ---
+ * mprj_io[8]   io_in/out/oeb/in_3v3[8]   gpio_analog/noesd[1]   ---
+ * mprj_io[7]   io_in/out/oeb/in_3v3[7]   gpio_analog/noesd[0]   ---
+ * mprj_io[6]   io_in/out/oeb/in_3v3[6]   ---                    ---
+ * mprj_io[5]   io_in/out/oeb/in_3v3[5]   ---                    ---
+ * mprj_io[4]   io_in/out/oeb/in_3v3[4]   ---                    ---
+ * mprj_io[3]   io_in/out/oeb/in_3v3[3]   ---                    ---
+ * mprj_io[2]   io_in/out/oeb/in_3v3[2]   ---                    ---
+ * mprj_io[1]   io_in/out/oeb/in_3v3[1]   ---                    ---
+ * mprj_io[0]   io_in/out/oeb/in_3v3[0]   ---                    ---
+ *
+ */
+
+/*
+ *----------------------------------------------------------------
+ *
+ * user_analog_proj_example
+ *
+ * This is an example of a (trivially simple) analog user project,
+ * showing how the user project can connect to the I/O pads, both
+ * the digital pads, the analog connection on the digital pads,
+ * and the dedicated analog pins used as an additional power supply
+ * input, with a connected ESD clamp.
+ *
+ * See the testbench in directory "mprj_por" for the example
+ * program that drives this user project.
+ *
+ *----------------------------------------------------------------
+ */
+
+module user_analog_proj_example (
+`ifdef USE_POWER_PINS
+    inout vdda1,	// User area 1 3.3V supply
+    inout vdda2,	// User area 2 3.3V supply
+    inout vssa1,	// User area 1 analog ground
+    inout vssa2,	// User area 2 analog ground
+    inout vccd1,	// User area 1 1.8V supply
+    inout vccd2,	// User area 2 1.8v supply
+    inout vssd1,	// User area 1 digital ground
+    inout vssd2,	// User area 2 digital ground
+`endif
+
+    // Wishbone Slave ports (WB MI A)
+    input wb_clk_i,
+    input wb_rst_i,
+    input wbs_stb_i,
+    input wbs_cyc_i,
+    input wbs_we_i,
+    input [3:0] wbs_sel_i,
+    input [31:0] wbs_dat_i,
+    input [31:0] wbs_adr_i,
+    output wbs_ack_o,
+    output [31:0] wbs_dat_o,
+
+    // Logic Analyzer Signals
+    input  [127:0] la_data_in,
+    output [127:0] la_data_out,
+    input  [127:0] la_oenb,
+
+    // IOs
+    input  [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in,
+    input  [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in_3v3,
+    output [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_out,
+    output [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_oeb,
+
+    // GPIO-analog
+    inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] gpio_analog,
+    inout [`MPRJ_IO_PADS-`ANALOG_PADS-10:0] gpio_noesd,
+
+    // Dedicated analog
+    inout [`ANALOG_PADS-1:0] io_analog,
+    inout [2:0] io_clamp_high,
+    inout [2:0] io_clamp_low,
+
+    // Clock
+    input   user_clock2,
+
+    // IRQ
+    output [2:0] irq
+);
+    wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in;
+    wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_in_3v3;
+    wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_out;
+    wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_oeb;
+    wire [`ANALOG_PADS-1:0] io_analog;
+
+    wire [31:0] rdata; 
+    wire [31:0] wdata;
+
+    wire valid;
+    wire [3:0] wstrb;
+
+    wire isupply;	// Independent 3.3V supply
+    wire io16, io15, io12, io11;
+
+    // WB MI A
+    assign valid = wbs_cyc_i && wbs_stb_i; 
+    assign wstrb = wbs_sel_i & {4{wbs_we_i}};
+    assign wbs_dat_o = rdata;
+    assign wdata = wbs_dat_i;
+
+    // IO --- unused
+    assign io_out[`MPRJ_IO_PADS-`ANALOG_PADS-1:17] = 0;
+    assign io_out[14:13] = 11'b0;
+    assign io_out[10:0] = 11'b0;
+
+    assign io_oeb[`MPRJ_IO_PADS-`ANALOG_PADS-1:17] = -1;
+    assign io_oeb[14:13] = 11'b1;
+    assign io_oeb[10:0] = 11'b1;
+
+    // IO --- enable outputs on 11, 12, 15, and 16
+    assign io_out[12:11] = {io12, io11};
+    assign io_oeb[12:11] = 2'b0;
+
+    assign io_out[16:15] = {io16, io15};
+    assign io_oeb[16:15] = 2'b0;
+
+    // IRQ
+    assign irq = 3'b000;	// Unused
+
+    // LA
+    assign la_data_out = {128{1'b0}};	// Unused
+
+    // Instantiate the POR.  Connect the digital power to user area 1
+    // VCCD, and connect the analog power to user area 1 VDDA.
+
+    // Monitor the 3.3V output with mprj_io[10] = gpio_analog[3]
+    // Monitor the 1.8V outputs with mprj_io[11,12] = io_out[11,12]
+
+    example_por por1 (
+	`ifdef USE_POWER_PINS
+	    .vdd3v3(vdda1),
+	    .vdd1v8(vccd1),
+	    .vss(vssa1),
+	`endif
+	.porb_h(gpio_analog[3]),	// 3.3V domain output
+	.porb_l(io11),			// 1.8V domain output
+	.por_l(io12)			// 1.8V domain output
+    );
+
+    // Instantiate 2nd POR with the analog power supply on one of the
+    // analog pins.  NOTE:  io_analog[4] = mproj_io[18] and is the same
+    // pad with io_clamp_high/low[0].
+
+    `ifdef USE_POWER_PINS
+	assign isupply = io_analog[4];
+    	assign io_clamp_high[0] = isupply;
+    	assign io_clamp_low[0] = vssa1;
+
+	// Tie off remaining clamps
+    	assign io_clamp_high[2:1] = vssa1;
+    	assign io_clamp_low[2:1] = vssa1;
+    `endif
+
+    // Monitor the 3.3V output with mprj_io[25] = gpio_analog[7]
+    // Monitor the 1.8V outputs with mprj_io[26,27] = io_out[15,16]
+
+    example_por por2 (
+	`ifdef USE_POWER_PINS
+	    .vdd3v3(isupply),
+	    .vdd1v8(vccd1),
+	    .vss(vssa1),
+	`endif
+	.porb_h(gpio_analog[7]),	// 3.3V domain output
+	.porb_l(io15),			// 1.8V domain output
+	.por_l(io16)			// 1.8V domain output
+    );
+
+endmodule
+
+`default_nettype wire
diff --git a/verilog/rtl/user_project_wrapper.v b/verilog/rtl/user_analog_project_wrapper.v
similarity index 73%
rename from verilog/rtl/user_project_wrapper.v
rename to verilog/rtl/user_analog_project_wrapper.v
index 5fd2096..a4a8c1a 100644
--- a/verilog/rtl/user_project_wrapper.v
+++ b/verilog/rtl/user_analog_project_wrapper.v
@@ -25,9 +25,7 @@
  *-------------------------------------------------------------
  */
 
-module user_analog_project_wrapper #(
-    parameter BITS = 32
-)(
+module user_analog_project_wrapper (
 `ifdef USE_POWER_PINS
     inout vdda1,	// User area 1 3.3V supply
     inout vdda2,	// User area 2 3.3V supply
@@ -86,7 +84,7 @@
      * GPIO pads, and so the analog_io indexing is offset from the
      * GPIO indexing by 7, as follows:
      *
-     * gpio_analog/noesd [18:7]  <--->  mprj_io[35:24]
+     * gpio_analog/noesd [17:7]  <--->  mprj_io[35:25]
      * gpio_analog/noesd [6:0]   <--->  mprj_io[13:7]	
      *
      */
@@ -120,7 +118,64 @@
     output [2:0] user_irq
 );
 
-// Dummy assignment so that we can take it through the openlane flow
-assign io_out = io_in;
+/*--------------------------------------*/
+/* User project is instantiated  here   */
+/*--------------------------------------*/
+
+user_analog_proj_example mprj (
+    `ifdef USE_POWER_PINS
+        .vdda1(vdda1),  // User area 1 3.3V power
+        .vdda2(vdda2),  // User area 2 3.3V power
+        .vssa1(vssa1),  // User area 1 analog ground
+        .vssa2(vssa2),  // User area 2 analog ground
+        .vccd1(vccd1),  // User area 1 1.8V power
+        .vccd2(vccd2),  // User area 2 1.8V power
+        .vssd1(vssd1),  // User area 1 digital ground
+        .vssd2(vssd2),  // User area 2 digital ground
+    `endif
+
+    .wb_clk_i(wb_clk_i),
+    .wb_rst_i(wb_rst_i),
+
+    // MGMT SoC Wishbone Slave
+
+    .wbs_cyc_i(wbs_cyc_i),
+    .wbs_stb_i(wbs_stb_i),
+    .wbs_we_i(wbs_we_i),
+    .wbs_sel_i(wbs_sel_i),
+    .wbs_adr_i(wbs_adr_i),
+    .wbs_dat_i(wbs_dat_i),
+    .wbs_ack_o(wbs_ack_o),
+    .wbs_dat_o(wbs_dat_o),
+
+    // Logic Analyzer
+
+    .la_data_in(la_data_in),
+    .la_data_out(la_data_out),
+    .la_oenb (la_oenb),
+
+    // IO Pads
+    .io_in (io_in),
+    .io_in_3v3 (io_in_3v3),
+    .io_out(io_out),
+    .io_oeb(io_oeb),
+
+    // GPIO-analog
+    .gpio_analog(gpio_analog),
+    .gpio_noesd(gpio_noesd),
+
+    // Dedicated analog
+    .io_analog(io_analog),
+    .io_clamp_high(io_clamp_high),
+    .io_clamp_low(io_clamp_low),
+
+    // Clock
+    .user_clock2(user_clock2),
+
+    // IRQ
+    .irq(user_irq)
+);
 
 endmodule	// user_analog_project_wrapper
+
+`default_nettype wire