caravel/verilog/dv/caravel/mgmt_soc/gpio_mgmt/README

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Caravel
gpio_mgmt testbench
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This testbench is the simplest "wake-up call" for the development
board.  It toggles the single "gpio" pin under exclusive control
of the management SoC;  first a few times quickly (so it can be
seen in simulation) then continuously at a slow pulse rate, so it
will blink the LED on the prototype board.