)]}'
{
  "commit": "d4ec2f0d93b90182cf84c8b545818b2176d1ed9a",
  "tree": "cb1db91caa2bc46bc9df9eed75a8db6e5ec88219",
  "parents": [
    "2f8702ecde470d675960c2a6f98ef6aa688e6899"
  ],
  "author": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Mon Apr 05 18:32:10 2021 +0200"
  },
  "committer": {
    "name": "Ahmed Ghazy",
    "email": "ax3ghazy@aucegypt.edu",
    "time": "Mon Apr 05 18:32:10 2021 +0200"
  },
  "message": "Example of a full run of user_project_wrapper\n",
  "tree_diff": [
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "7f8593da3c9358ccbe62bab594ad1d9afd9c4b50",
      "new_mode": 40960,
      "new_path": "Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "6a4301667264d49401c2e7c5082d2ba6f88710a7",
      "new_mode": 33188,
      "new_path": "def/user_proj_example.def"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "0ebcba31f00ab61e175e251fe5bf694dede271fb",
      "new_mode": 33188,
      "new_path": "def/user_project_wrapper.def"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "5c64c075d1c4478db33b662d38a10676251b5568",
      "new_mode": 33188,
      "new_path": "gds/user_proj_example.gds.gz"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a82483a890c40326b01f72ecc14367f4a04dc5aa",
      "new_mode": 33188,
      "new_path": "gds/user_project_wrapper.gds.gz"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "654c8157c70836694cb2fca5f8b9e5314d10a49c",
      "new_mode": 33188,
      "new_path": "lef/user_proj_example.lef"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "115741679d4fdd505ec7d395d580d09501a3f3ee",
      "new_mode": 33188,
      "new_path": "lef/user_project_wrapper.lef"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a2aaec38634a305382193fd8bbc18140c9e63d25",
      "new_mode": 33188,
      "new_path": "mag/user_proj_example.mag"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "d94cd343eab90c711aaa30aaf6009cee7566fc13",
      "new_mode": 33188,
      "new_path": "mag/user_project_wrapper.mag"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "2645e03936c708ced480de71102815125b8d9a5f",
      "new_mode": 33188,
      "new_path": "maglef/user_proj_example.mag"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "921f565467b8009f5a3ff5cd2a8d63468ef16195",
      "new_mode": 33188,
      "new_path": "maglef/user_project_wrapper.mag"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "e4867d8377ed15cdb9fbd6f9591917ecd797ab2c",
      "new_mode": 33188,
      "new_path": "openlane/.gitignore"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "48e5b4a5b8bca258db4fdb7032fe36b9ea21a6eb",
      "new_mode": 40960,
      "new_path": "openlane/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a9ebbea6d1a3f411021f21e3cfd9ababba827b0c",
      "new_mode": 33261,
      "new_path": "openlane/user_proj_example/config.tcl"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "8128f788014858fff85f3ecdb6655c5e00fd934a",
      "new_mode": 33188,
      "new_path": "openlane/user_proj_example/pin_order.cfg"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "82814d42062342f9a0a3c9a15e59402786611cfc",
      "new_mode": 33261,
      "new_path": "openlane/user_project_wrapper/config.tcl"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "a7365ab26ff25197ed46ceb62342f48e1473ea19",
      "new_mode": 33188,
      "new_path": "openlane/user_project_wrapper/macro.cfg"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "267d91c68441a18d6035c9f882b1c6f3ac8447a1",
      "new_mode": 40960,
      "new_path": "openlane/user_project_wrapper/pin_order.cfg"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "66eff96f8f17af66df8fb1e1cecd06f1c27e9fa8",
      "new_mode": 33188,
      "new_path": "signoff/user_proj_example/OPENLANE_VERSION"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "41f8684364f1ed2cf4b1548316596dbc9934f726",
      "new_mode": 33188,
      "new_path": "signoff/user_proj_example/PDK_SOURCES"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "66eff96f8f17af66df8fb1e1cecd06f1c27e9fa8",
      "new_mode": 33188,
      "new_path": "signoff/user_project_wrapper/OPENLANE_VERSION"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "41f8684364f1ed2cf4b1548316596dbc9934f726",
      "new_mode": 33188,
      "new_path": "signoff/user_project_wrapper/PDK_SOURCES"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "966efd02aceaf9b54fac7bf40b2b3cd28a15e21f",
      "new_mode": 33188,
      "new_path": "spi/lvs/user_proj_example.spice"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "6a1c86a6a65355c12fb5e9cc4b7d7113d55efc31",
      "new_mode": 33188,
      "new_path": "spi/lvs/user_project_wrapper.spice"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "7e37e0268e65ce376163bb81f2a3d84f21198c3b",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "503b8f481da181f318c8315b1d7403a98cf7e03c",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/README.md"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "321de72bb14e07521b5b27f79de6149058017935",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/io_ports/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "f0542f6c417861c2e046ba6087f78fea04d3b860",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/io_ports/io_ports.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "e6443476e6931c1db87705a40c91f55075289243",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/io_ports/io_ports_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "e9ad798fd975741a6296a825b3ee39b2c5ce6aaa",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/la_test1/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "c5d47bcd96b3232b8c4294ec85179c67e53b4a6c",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/la_test1/la_test1.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "125f84252a779e681b63b42d3fb8f90e12210d3e",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/la_test1/la_test1_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "189dfa45b60b430d63718bb600f1c1b3fd62df20",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/la_test2/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "ef1b5e93bdeaffc0870926d2db817013bfb8c695",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/la_test2/la_test2.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "d00426983125d37ac4b565cbc6235c7756055792",
      "new_mode": 33188,
      "new_path": "verilog/dv/user_proj_example/la_test2/la_test2_tb.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "4e2ec97cafadfdfd8b769a19497d868a61e80cfc",
      "new_mode": 33188,
      "new_path": "verilog/gl/user_proj_example.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "7ac04edb2131544c929bf2484b943ef6c7291dce",
      "new_mode": 33188,
      "new_path": "verilog/gl/user_project_wrapper.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "44e8eda5ca7d217b73fcf02ecca77d4f5d4bd3d3",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_proj_example.v"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "7cf8dada254bcb4192ace356ebdeb788ac3579fb",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
  ]
}