)]}'
{
  "commit": "22f3cd028945f0dc4c216e5a72368255f9b4bf10",
  "tree": "f469842b629d51dd3cd483b9537d1b9103851a25",
  "parents": [
    "740194b8b85a9afbb7ffd482ee875753409a3a8a"
  ],
  "author": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Mon Apr 19 17:39:50 2021 +0200"
  },
  "committer": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Mon Apr 19 17:39:50 2021 +0200"
  },
  "message": "Submodule caravel-lite\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5bdfdaeba1b5d93657a268466dd9406608382011",
      "old_mode": 33188,
      "old_path": ".gitmodules",
      "new_id": "a7e5bf73a08e8a6792ca798d7dc2a66ed1b667b2",
      "new_mode": 33188,
      "new_path": ".gitmodules"
    },
    {
      "type": "delete",
      "old_id": "cac0a20d29435a312b4c04862dd66dc286218ebc",
      "old_mode": 57344,
      "old_path": "caravel",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "02393a2ffd5676ce7c16fcba89e668f94d58f21f",
      "new_mode": 57344,
      "new_path": "caravel-lite"
    },
    {
      "type": "modify",
      "old_id": "6fb1c2541ec2f2331309bc7cf4ff4f5751b368a2",
      "old_mode": 33188,
      "old_path": "verilog/dv/io_ports/Makefile",
      "new_id": "c3a5e54a3e72d94303008d03e71fbb0a099cc7b9",
      "new_mode": 33188,
      "new_path": "verilog/dv/io_ports/Makefile"
    },
    {
      "type": "modify",
      "old_id": "701a42592cc3a3539eff26c6386df657237e128b",
      "old_mode": 33188,
      "old_path": "verilog/dv/la_test1/Makefile",
      "new_id": "adae20d44a97ba79d61ccbe36d7b1f1a736d97fa",
      "new_mode": 33188,
      "new_path": "verilog/dv/la_test1/Makefile"
    },
    {
      "type": "modify",
      "old_id": "3688e7c0b715ddf5fb859c606e30a53cf9838c4c",
      "old_mode": 33188,
      "old_path": "verilog/dv/la_test2/Makefile",
      "new_id": "6ba368fb7a870c3e84bef7bfcae6fce50a563b93",
      "new_mode": 33188,
      "new_path": "verilog/dv/la_test2/Makefile"
    },
    {
      "type": "modify",
      "old_id": "6dbfb288e09b577748c975eee99b5e6c262ce408",
      "old_mode": 33188,
      "old_path": "verilog/dv/mprj_stimulus/Makefile",
      "new_id": "c9a6ca75000bb67bb1f112f095eebdb5e7882869",
      "new_mode": 33188,
      "new_path": "verilog/dv/mprj_stimulus/Makefile"
    },
    {
      "type": "modify",
      "old_id": "ce20a88aa985bb85c9980ae633f1cb665814bd68",
      "old_mode": 33188,
      "old_path": "verilog/dv/wb_port/Makefile",
      "new_id": "70ad01fd17084868a04d4e61919f3a9de781c162",
      "new_mode": 33188,
      "new_path": "verilog/dv/wb_port/Makefile"
    }
  ]
}