#BUS_SORT

#MANUAL_PLACE


#W
cpu_rst_n           0000 0 2
cpu_clk
rtc_clk


#S
user_clock2         0000 0  2
user_clock1     
wbm_clk_i       
wbm_rst_i       
wbm_ack_o       
wbm_cyc_i       
wbm_stb_i       
wbm_we_i        
wbm_adr_i\[0\]  
wbm_dat_i\[0\]  
wbm_dat_o\[0\]  
wbm_sel_i\[0\]  
wbm_adr_i\[1\]  
wbm_dat_i\[1\]  
wbm_dat_o\[1\]  
wbm_sel_i\[1\]  
wbm_adr_i\[2\]  
wbm_dat_i\[2\]  
wbm_dat_o\[2\]  
wbm_sel_i\[2\]  
wbm_adr_i\[3\]  
wbm_dat_i\[3\]  
wbm_dat_o\[3\]  
wbm_sel_i\[3\]  
wbm_adr_i\[4\]  
wbm_dat_i\[4\]  
wbm_dat_o\[4\]  
wbm_adr_i\[5\]  
wbm_dat_i\[5\]  
wbm_dat_o\[5\]  
wbm_adr_i\[6\]  
wbm_dat_i\[6\]  
wbm_dat_o\[6\]  
wbm_adr_i\[7\]  
wbm_dat_i\[7\]  
wbm_dat_o\[7\]  
wbm_adr_i\[8\]  
wbm_dat_i\[8\]  
wbm_dat_o\[8\]  
wbm_adr_i\[9\]  
wbm_dat_i\[9\]  
wbm_dat_o\[9\]  
wbm_adr_i\[10\] 
wbm_dat_i\[10\] 
wbm_dat_o\[10\] 
wbm_adr_i\[11\] 
wbm_dat_i\[11\] 
wbm_dat_o\[11\] 
wbm_adr_i\[12\] 
wbm_dat_i\[12\] 
wbm_dat_o\[12\] 
wbm_adr_i\[13\] 
wbm_dat_i\[13\] 
wbm_dat_o\[13\] 
wbm_adr_i\[14\] 
wbm_dat_i\[14\] 
wbm_dat_o\[14\] 
wbm_adr_i\[15\] 
wbm_dat_i\[15\] 
wbm_dat_o\[15\] 
wbm_adr_i\[16\] 
wbm_dat_i\[16\] 
wbm_dat_o\[16\] 
wbm_adr_i\[17\] 

wbm_dat_i\[17\] 
wbm_dat_o\[17\] 
wbm_adr_i\[18\] 
wbm_dat_i\[18\] 
wbm_dat_o\[18\] 
wbm_adr_i\[19\] 
wbm_dat_i\[19\] 
wbm_dat_o\[19\] 
wbm_adr_i\[20\] 
wbm_dat_i\[20\] 
wbm_dat_o\[20\] 
wbm_adr_i\[21\] 
wbm_dat_i\[21\] 
wbm_dat_o\[21\]  
wbm_adr_i\[22\]  
wbm_dat_i\[22\]  
wbm_dat_o\[22\]  
wbm_adr_i\[23\]  
wbm_dat_i\[23\]  
wbm_dat_o\[23\]  
wbm_adr_i\[24\]  
wbm_dat_i\[24\]  
wbm_dat_o\[24\]  
wbm_adr_i\[25\]  
wbm_dat_i\[25\]  
wbm_dat_o\[25\]  
wbm_adr_i\[26\]  
wbm_dat_i\[26\]  
wbm_dat_o\[26\]  
wbm_adr_i\[27\]  
wbm_dat_i\[27\]  
wbm_dat_o\[27\]  
wbm_adr_i\[28\]  
wbm_dat_i\[28\]  
wbm_dat_o\[28\]  
wbm_adr_i\[29\]  
wbm_dat_i\[29\]  
wbm_dat_o\[29\]  
wbm_adr_i\[30\]  
wbm_dat_i\[30\]  
wbm_dat_o\[30\]  
wbm_adr_i\[31\]  
wbm_dat_i\[31\]  
wbm_dat_o\[31\]  
wbm_err_o        


#N
wbd_int_rst_n         0000 0 2
cfg_boot_remap\[3\]
cfg_boot_remap\[2\]
cfg_boot_remap\[1\]
cfg_boot_remap\[0\]

cfg_clk_ctrl2\[11\]
cfg_clk_ctrl2\[10\]
cfg_clk_ctrl2\[9\]
cfg_clk_ctrl2\[8\]
cfg_clk_ctrl2\[7\]
cfg_clk_ctrl2\[6\]
cfg_clk_ctrl2\[5\]
cfg_clk_ctrl2\[4\]
cfg_clk_ctrl2\[3\]
cfg_clk_ctrl2\[2\]
cfg_clk_ctrl2\[1\]
cfg_clk_ctrl2\[0\]

cfg_clk_ctrl1\[27\]
cfg_clk_ctrl1\[26\]
cfg_clk_ctrl1\[25\]
cfg_clk_ctrl1\[24\]
cfg_clk_ctrl1\[23\]
cfg_clk_ctrl1\[22\]
cfg_clk_ctrl1\[21\]
cfg_clk_ctrl1\[20\]
cfg_clk_ctrl1\[19\]
cfg_clk_ctrl1\[18\]
cfg_clk_ctrl1\[17\]
cfg_clk_ctrl1\[16\]
cfg_clk_ctrl1\[15\]
cfg_clk_ctrl1\[14\]
cfg_clk_ctrl1\[13\]
cfg_clk_ctrl1\[12\]
cfg_clk_ctrl1\[11\]
cfg_clk_ctrl1\[10\]
cfg_clk_ctrl1\[9\]
cfg_clk_ctrl1\[8\]
cfg_clk_ctrl1\[7\]
cfg_clk_ctrl1\[6\]
cfg_clk_ctrl1\[5\]
cfg_clk_ctrl1\[4\]
cfg_clk_ctrl1\[3\]
cfg_clk_ctrl1\[2\]
cfg_clk_ctrl1\[1\]
cfg_clk_ctrl1\[0\]
wbd_clk_int
wbs_clk_out   
wbs_clk_i            
wbd_clk_wh
cfg_clk_ctrl1\[31\]
cfg_cska_wh\[3\]
cfg_clk_ctrl1\[30\]
cfg_cska_wh\[2\]
cfg_clk_ctrl1\[29\]
cfg_cska_wh\[1\]
cfg_clk_ctrl1\[28\]
cfg_cska_wh\[0\]

wbs_stb_o        0060 0 2
wbs_we_o         
wbs_adr_o\[31\]  
wbs_adr_o\[30\]  
wbs_adr_o\[29\]  
wbs_adr_o\[28\]  
wbs_adr_o\[27\]  
wbs_adr_o\[26\]  
wbs_adr_o\[25\]  
wbs_adr_o\[24\]  
wbs_adr_o\[23\]  
wbs_adr_o\[22\]  
wbs_adr_o\[21\]  
wbs_adr_o\[20\]  
wbs_adr_o\[19\]  
wbs_adr_o\[18\]  
wbs_adr_o\[17\]  
wbs_adr_o\[16\]  
wbs_adr_o\[15\]  
wbs_adr_o\[14\]  
wbs_adr_o\[13\]  
wbs_adr_o\[12\]  
wbs_adr_o\[11\]  
wbs_adr_o\[10\]  
wbs_adr_o\[9\]   
wbs_adr_o\[8\]   
wbs_adr_o\[7\]   
wbs_adr_o\[6\]   
wbs_adr_o\[5\]   
wbs_adr_o\[4\]   
wbs_adr_o\[3\]   
wbs_adr_o\[2\]   
wbs_adr_o\[1\]   
wbs_adr_o\[0\]   
wbs_sel_o\[3\]   
wbs_sel_o\[2\]   
wbs_sel_o\[1\]   
wbs_sel_o\[0\]   
wbs_dat_o\[31\]  
wbs_dat_o\[30\]  
wbs_dat_o\[29\]  
wbs_dat_o\[28\]  
wbs_dat_o\[27\]  
wbs_dat_o\[26\]  
wbs_dat_o\[25\]  
wbs_dat_o\[24\]  
wbs_dat_o\[23\]  
wbs_dat_o\[22\]  
wbs_dat_o\[21\]  
wbs_dat_o\[20\]  
wbs_dat_o\[19\]  
wbs_dat_o\[18\]  
wbs_dat_o\[17\]  
wbs_dat_o\[16\]  
wbs_dat_o\[15\]  
wbs_dat_o\[14\]  
wbs_dat_o\[13\]  
wbs_dat_o\[12\]  
wbs_dat_o\[11\]  
wbs_dat_o\[10\]  
wbs_dat_o\[9\]   
wbs_dat_o\[8\]   
wbs_dat_o\[7\]   
wbs_dat_o\[6\]   
wbs_dat_o\[5\]   
wbs_dat_o\[4\]   
wbs_dat_o\[3\]   
wbs_dat_o\[2\]   
wbs_dat_o\[1\]   
wbs_dat_o\[0\]   
wbs_dat_i\[31\]  
wbs_dat_i\[30\]  
wbs_dat_i\[29\]  
wbs_dat_i\[28\]  
wbs_dat_i\[27\]  
wbs_dat_i\[26\]  
wbs_dat_i\[25\]  
wbs_dat_i\[24\]  
wbs_dat_i\[23\]  
wbs_dat_i\[22\]  
wbs_dat_i\[21\]  
wbs_dat_i\[20\]  
wbs_dat_i\[19\]  
wbs_dat_i\[18\]  
wbs_dat_i\[17\]  
wbs_dat_i\[16\]  
wbs_dat_i\[15\]  
wbs_dat_i\[14\]  
wbs_dat_i\[13\]  
wbs_dat_i\[12\]  
wbs_dat_i\[11\]  
wbs_dat_i\[10\]  
wbs_dat_i\[9\]   
wbs_dat_i\[8\]   
wbs_dat_i\[7\]   
wbs_dat_i\[6\]   
wbs_dat_i\[5\]   
wbs_dat_i\[4\]   
wbs_dat_i\[3\]   
wbs_dat_i\[2\]   
wbs_dat_i\[1\]   
wbs_dat_i\[0\]   
wbs_ack_i        
wbs_err_i        
wbs_cyc_o      


#E 
uart_rst_n              0000 0 2
i2cm_rst_n
mbist_rst_n
usb_clk
sdram_clk           
sdram_rst_n
spi_rst_n
uart_i2c_usb_sel\[1\]
uart_i2c_usb_sel\[0\]

cfg_clk_ctrl2\[31\]
cfg_clk_ctrl2\[30\]
cfg_clk_ctrl2\[29\]
cfg_clk_ctrl2\[28\]
cfg_clk_ctrl2\[27\]
cfg_clk_ctrl2\[26\]
cfg_clk_ctrl2\[25\]
cfg_clk_ctrl2\[24\]
cfg_clk_ctrl2\[23\]
cfg_clk_ctrl2\[22\]
cfg_clk_ctrl2\[21\]
cfg_clk_ctrl2\[20\]
cfg_clk_ctrl2\[19\]
cfg_clk_ctrl2\[18\]
cfg_clk_ctrl2\[17\]
cfg_clk_ctrl2\[16\]
cfg_clk_ctrl2\[15\]
cfg_clk_ctrl2\[14\]
cfg_clk_ctrl2\[13\]
cfg_clk_ctrl2\[12\]