diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
index 2c2da7b..c0409a4 100644
--- a/gds/user_analog_project_wrapper.gds
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/cp.ext b/mag/cp.ext
index 77aa998..5e55f4e 100644
--- a/mag/cp.ext
+++ b/mag/cp.ext
@@ -1,4 +1,4 @@
-timestamp 1640602475
+timestamp 1640906950
 version 8.3
 tech sky130A
 style ngspice()
@@ -8,32 +8,35 @@
 parameters sky130_fd_pr__pfet_01v8 l=l w=w a1=as p1=ps a2=ad p2=pd
 node "a_7110_n2840#" 1577 169.05 7110 -2840 ndif 0 0 0 0 0 0 0 0 1368000 8720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1171600 8420 0 0 0 0 0 0 0 0 0 0 0 0
 node "a_3060_n2840#" 2510 1394.14 3060 -2840 ndif 0 0 0 0 0 0 0 0 2052000 13080 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1670400 12360 528000 4880 0 0 0 0 0 0 0 0 0 0
-node "down" 323 897.53 6750 -2900 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 745200 5020 0 0 71600 1100 0 0 0 0 0 0 0 0 0 0 0 0
+node "down" 425 1537.05 6750 -2900 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 802800 5500 0 0 129200 2060 0 0 0 0 0 0 0 0 0 0 0 0
 node "vbias" 897 2407.88 10 -2900 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1490400 10040 0 0 224200 3900 0 0 0 0 0 0 0 0 0 0 0 0
 node "a_7110_0#" 4454 126.5 7110 0 pdif 0 0 0 0 0 0 0 0 0 0 2736000 15920 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2323600 15620 0 0 0 0 0 0 0 0 0 0 0 0
+node "a_6370_0#" 2001 0 6370 0 pdif 0 0 0 0 0 0 0 0 0 0 1368000 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1132800 7720 0 0 0 0 0 0 0 0 0 0 0 0
 node "a_3060_0#" 6901 -135.4 3060 0 pdif 0 0 0 0 0 0 0 0 0 0 4104000 23880 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3398400 23160 528000 4880 0 0 0 0 0 0 0 0 0 0
 node "a_1710_0#" 3581 5050.11 1710 0 pdif 0 0 0 0 0 0 0 0 684000 4360 1368000 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1490400 10040 0 0 1996800 17200 115200 1920 1147200 11840 0 0 0 0 0 0 0 0
-node "upbar" 560 882.49 6750 -50 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1389600 8600 0 0 71600 1100 0 0 0 0 0 0 0 0 0 0 0 0
 node "out" 3763 4860.96 5400 -2900 p 0 0 0 0 0 0 0 0 684000 4360 1368000 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2134800 13620 0 0 1948400 16040 979200 8640 0 0 0 0 0 0 0 0 0 0
 node "a_1710_n2840#" 3920 4600.4 1710 -2840 ndif 0 0 0 0 0 0 0 0 684000 4360 1368000 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2779200 17200 0 0 1804800 13760 436400 7560 115200 1920 1147200 11840 0 0 0 0 0 0
 node "a_10_n50#" 3989 2430.18 10 -50 p 0 0 0 0 0 0 0 0 684000 4360 1368000 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2779200 17200 0 0 1936200 15780 239200 4200 0 0 0 0 0 0 0 0 0 0
-node "vdd!" 16208 127784 -490 -160 nw 0 0 0 0 40009000 27420 0 0 78300 1120 6840000 39800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 745200 5020 0 0 6275100 44200 960700 13000 348300 5280 348300 5280 3226600 19660 0 0 0 0
-substrate "gnd!" 0 0 -370 -2840 ndif 0 0 0 0 0 0 0 0 3419400 21800 81200 1140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1389600 8600 0 0 3576600 28780 732600 8960 351000 5300 351000 5300 4550400 19920 0 0 0 0
-cap "a_1710_n2840#" "out" 606.81
-cap "vdd!" "out" 281.2
-cap "vdd!" "a_1710_n2840#" 254.08
-cap "vdd!" "a_10_n50#" 530.297
+node "upbar" 658 1347.77 6750 -50 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1444800 9060 0 0 126800 2040 0 0 0 0 0 0 0 0 0 0 0 0
+node "vdd!" 13744 126954 -490 -160 nw 0 0 0 0 40009000 27420 0 0 78300 1120 5472000 31840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 745200 5020 0 0 5020800 35580 890500 11940 278100 4220 278100 4220 3226600 19660 0 0 0 0
+substrate "gnd!" 0 0 -370 -2840 ndif 0 0 0 0 0 0 0 0 3419400 21800 81200 1140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1389600 8600 0 0 3496900 27940 662400 7900 280800 4240 280800 4240 4550400 19920 0 0 0 0
+cap "vdd!" "upbar" 149.92
 cap "a_1710_0#" "down" 320.4
-cap "upbar" "down" 20.625
 cap "vdd!" "a_3060_n2840#" 320.4
-cap "a_10_n50#" "vbias" 192.9
+cap "upbar" "down" 20.625
 cap "out" "a_1710_0#" 841.733
 cap "a_1710_n2840#" "a_1710_0#" 828.847
-cap "vdd!" "a_7110_0#" 42.55
 cap "a_10_n50#" "a_1710_0#" 41.6842
+cap "vdd!" "a_6370_0#" 402.828
 cap "vdd!" "a_3060_0#" 1788.27
-cap "a_1710_n2840#" "upbar" 291.6
 cap "vdd!" "a_1710_0#" 707.2
+cap "a_10_n50#" "vbias" 192.9
+cap "vdd!" "a_7110_0#" 42.55
+cap "a_1710_n2840#" "out" 606.81
+cap "vdd!" "out" 281.2
+cap "upbar" "a_1710_n2840#" 291.6
+cap "vdd!" "a_1710_n2840#" 254.08
+cap "vdd!" "a_10_n50#" 530.297
 device msubckt sky130_fd_pr__nfet_01v8 8100 -2840 8101 -2839 l=360 w=1800 "gnd!" "a_1710_0#" 720 0 "a_7110_n2840#" 1800 0 "out" 1800 0
 device msubckt sky130_fd_pr__nfet_01v8 6750 -2840 6751 -2839 l=360 w=1800 "gnd!" "down" 720 0 "gnd!" 1800 0 "a_7110_n2840#" 1800 0
 device msubckt sky130_fd_pr__nfet_01v8 5400 -2840 5401 -2839 l=360 w=1800 "gnd!" "out" 720 0 "a_3060_n2840#" 1800 0 "gnd!" 1800 0
@@ -42,7 +45,7 @@
 device msubckt sky130_fd_pr__nfet_01v8 1350 -2840 1351 -2839 l=360 w=1800 "gnd!" "vbias" 720 0 "gnd!" 1800 0 "a_1710_n2840#" 1800 0
 device msubckt sky130_fd_pr__nfet_01v8 10 -2840 11 -2839 l=360 w=1800 "gnd!" "vbias" 720 0 "gnd!" 1800 0 "a_10_n50#" 1800 0
 device msubckt sky130_fd_pr__pfet_01v8 8100 0 8101 1 l=360 w=3600 "vdd!" "a_1710_n2840#" 720 0 "a_7110_0#" 3600 0 "out" 3600 0
-device msubckt sky130_fd_pr__pfet_01v8 6750 0 6751 1 l=360 w=3600 "vdd!" "upbar" 720 0 "vdd!" 3600 0 "a_7110_0#" 3600 0
+device msubckt sky130_fd_pr__pfet_01v8 6750 0 6751 1 l=360 w=3600 "vdd!" "upbar" 720 0 "a_6370_0#" 3600 0 "a_7110_0#" 3600 0
 device msubckt sky130_fd_pr__pfet_01v8 5400 0 5401 1 l=360 w=3600 "vdd!" "out" 720 0 "a_3060_0#" 3600 0 "vdd!" 3600 0
 device msubckt sky130_fd_pr__pfet_01v8 4050 0 4051 1 l=360 w=3600 "vdd!" "gnd!" 720 0 "a_3060_0#" 3600 0 "vdd!" 3600 0
 device msubckt sky130_fd_pr__pfet_01v8 2700 0 2701 1 l=360 w=3600 "vdd!" "a_1710_n2840#" 720 0 "a_1710_n2840#" 3600 0 "a_3060_0#" 3600 0
diff --git a/mag/cp.mag b/mag/cp.mag
index 68a3757..e616f32 100644
--- a/mag/cp.mag
+++ b/mag/cp.mag
@@ -1,6 +1,6 @@
 magic
 tech sky130A
-timestamp 1640602475
+timestamp 1640906950
 << nwell >>
 rect -245 1860 4500 2030
 rect -245 -80 4495 1860
@@ -628,6 +628,10 @@
 << nsubdiffcont >>
 rect 2060 1885 2175 1995
 << poly >>
+rect 3405 1935 3525 1940
+rect 3405 1835 3415 1935
+rect 3515 1835 3525 1935
+rect 3405 1825 3525 1835
 rect 5 1800 185 1825
 rect 675 1800 855 1825
 rect 1350 1800 1530 1825
@@ -712,7 +716,12 @@
 rect 2700 -1450 2880 -1420
 rect 3375 -1450 3555 -1420
 rect 4050 -1450 4230 -1420
+rect 3405 -1460 3525 -1450
+rect 3405 -1560 3415 -1460
+rect 3515 -1560 3525 -1460
+rect 3405 -1570 3525 -1560
 << polycont >>
+rect 3415 1835 3515 1935
 rect 50 -135 150 -35
 rect 715 -135 815 -35
 rect 1390 -135 1490 -35
@@ -727,6 +736,7 @@
 rect 2740 -485 2840 -385
 rect 3415 -485 3515 -385
 rect 4090 -485 4190 -385
+rect 3415 -1560 3515 -1460
 << locali >>
 rect -155 2000 -20 2010
 rect -155 1890 -145 2000
@@ -744,10 +754,10 @@
 rect 2905 1890 2915 2000
 rect 3030 1890 3040 2000
 rect 2905 1785 3040 1890
-rect 3215 2000 3350 2010
-rect 3215 1890 3225 2000
-rect 3340 1890 3350 2000
-rect 3215 1785 3350 1890
+rect 3405 1935 3525 1940
+rect 3405 1835 3415 1935
+rect 3515 1835 3525 1935
+rect 3405 1825 3525 1835
 rect -170 1715 -10 1785
 rect -170 1615 -140 1715
 rect -40 1615 -10 1715
@@ -1221,8 +1231,7 @@
 rect 3025 -1120 3055 -1020
 rect 2895 -1230 3055 -1120
 rect 2895 -1330 2925 -1230
-rect 3025 -1330 3055 -1230
-rect 2895 -1405 3055 -1330
+rect 3025 -1305 3055 -1230
 rect 3200 -600 3360 -535
 rect 3200 -700 3230 -600
 rect 3330 -700 3360 -600
@@ -1233,9 +1242,10 @@
 rect 3200 -1120 3230 -1020
 rect 3330 -1120 3360 -1020
 rect 3200 -1230 3360 -1120
-rect 3200 -1330 3230 -1230
+rect 3200 -1305 3230 -1230
+rect 3025 -1330 3230 -1305
 rect 3330 -1330 3360 -1230
-rect 3200 -1405 3360 -1330
+rect 2895 -1405 3360 -1330
 rect 3570 -600 3730 -535
 rect 3570 -700 3600 -600
 rect 3700 -605 3730 -600
@@ -1292,17 +1302,16 @@
 rect 2910 -1540 3045 -1405
 rect 2910 -1650 2920 -1540
 rect 3035 -1650 3045 -1540
+rect 3405 -1460 3525 -1450
+rect 3405 -1560 3415 -1460
+rect 3515 -1560 3525 -1460
+rect 3405 -1570 3525 -1560
 rect 2910 -1660 3045 -1650
-rect 3215 -1540 3350 -1405
-rect 3215 -1650 3225 -1540
-rect 3340 -1650 3350 -1540
-rect 3215 -1660 3350 -1650
 << viali >>
 rect -145 1890 -30 2000
 rect 525 1890 640 2000
 rect 2060 1885 2175 1995
 rect 2915 1890 3030 2000
-rect 3225 1890 3340 2000
 rect 230 40 330 140
 rect 1205 40 1305 140
 rect 1575 700 1675 800
@@ -1330,7 +1339,6 @@
 rect 525 -1650 640 -1540
 rect 2060 -1650 2175 -1540
 rect 2920 -1650 3035 -1540
-rect 3225 -1650 3340 -1540
 << metal1 >>
 rect -155 2000 -20 2010
 rect -155 1890 -145 2000
@@ -1348,10 +1356,6 @@
 rect 2905 1890 2915 2000
 rect 3030 1890 3040 2000
 rect 2905 1880 3040 1890
-rect 3215 2000 3350 2010
-rect 3215 1890 3225 2000
-rect 3340 1890 3350 2000
-rect 3215 1880 3350 1890
 rect 1565 800 2665 810
 rect 1565 700 1575 800
 rect 1675 700 1880 800
@@ -1451,16 +1455,11 @@
 rect 2910 -1650 2920 -1540
 rect 3035 -1650 3045 -1540
 rect 2910 -1660 3045 -1650
-rect 3215 -1540 3350 -1530
-rect 3215 -1650 3225 -1540
-rect 3340 -1650 3350 -1540
-rect 3215 -1660 3350 -1650
 << via1 >>
 rect -145 1890 -30 2000
 rect 525 1890 640 2000
 rect 2060 1885 2175 1995
 rect 2915 1890 3030 2000
-rect 3225 1890 3340 2000
 rect 1390 -135 1490 -35
 rect 4090 -135 4190 -35
 rect 1390 -485 1490 -385
@@ -1469,7 +1468,6 @@
 rect 525 -1650 640 -1540
 rect 2060 -1650 2175 -1540
 rect 2920 -1650 3035 -1540
-rect 3225 -1650 3340 -1540
 << metal2 >>
 rect -155 2000 -20 2010
 rect -155 1890 -145 2000
@@ -1487,10 +1485,6 @@
 rect 2905 1890 2915 2000
 rect 3030 1890 3040 2000
 rect 2905 1880 3040 1890
-rect 3215 2000 3350 2010
-rect 3215 1890 3225 2000
-rect 3340 1890 3350 2000
-rect 3215 1880 3350 1890
 rect 1380 -35 1500 -25
 rect 1380 -135 1390 -35
 rect 1490 -135 1500 -35
@@ -1522,23 +1516,17 @@
 rect 2910 -1650 2920 -1540
 rect 3035 -1650 3045 -1540
 rect 2910 -1660 3045 -1650
-rect 3215 -1540 3350 -1530
-rect 3215 -1650 3225 -1540
-rect 3340 -1650 3350 -1540
-rect 3215 -1660 3350 -1650
 << via2 >>
 rect -145 1890 -30 2000
 rect 525 1890 640 2000
 rect 2060 1885 2175 1995
 rect 2915 1890 3030 2000
-rect 3225 1890 3340 2000
 rect 1390 -135 1490 -35
 rect 4090 -135 4190 -35
 rect -145 -1650 -30 -1540
 rect 525 -1650 640 -1540
 rect 2060 -1650 2175 -1540
 rect 2920 -1650 3035 -1540
-rect 3225 -1650 3340 -1540
 << metal3 >>
 rect -155 2000 -20 2010
 rect -155 1890 -145 2000
@@ -1556,10 +1544,6 @@
 rect 2905 1890 2915 2000
 rect 3030 1890 3040 2000
 rect 2905 1880 3040 1890
-rect 3215 2000 3350 2010
-rect 3215 1890 3225 2000
-rect 3340 1890 3350 2000
-rect 3215 1880 3350 1890
 rect 1380 -35 1500 -25
 rect 4080 -35 4200 -25
 rect 1380 -135 1390 -35
@@ -1583,21 +1567,15 @@
 rect 2910 -1650 2920 -1540
 rect 3035 -1650 3045 -1540
 rect 2910 -1660 3045 -1650
-rect 3215 -1540 3350 -1530
-rect 3215 -1650 3225 -1540
-rect 3340 -1650 3350 -1540
-rect 3215 -1660 3350 -1650
 << via3 >>
 rect -145 1890 -30 2000
 rect 525 1890 640 2000
 rect 2060 1885 2175 1995
 rect 2915 1890 3030 2000
-rect 3225 1890 3340 2000
 rect -145 -1650 -30 -1540
 rect 525 -1650 640 -1540
 rect 2060 -1650 2175 -1540
 rect 2920 -1650 3035 -1540
-rect 3225 -1650 3340 -1540
 << metal4 >>
 rect -245 2000 4500 2030
 rect -245 1890 -145 2000
@@ -1606,8 +1584,7 @@
 rect 640 1890 2060 1995
 rect -245 1885 2060 1890
 rect 2175 1890 2915 1995
-rect 3030 1890 3225 2000
-rect 3340 1890 4500 2000
+rect 3030 1890 4500 2000
 rect 2175 1885 4500 1890
 rect -245 1860 4500 1885
 rect -245 -1540 4495 -1475
@@ -1615,8 +1592,7 @@
 rect -30 -1650 525 -1540
 rect 640 -1650 2060 -1540
 rect 2175 -1650 2920 -1540
-rect 3035 -1650 3225 -1540
-rect 3340 -1650 4495 -1540
+rect 3035 -1650 4495 -1540
 rect -245 -1715 4495 -1650
 << labels >>
 rlabel locali 430 -435 430 -435 1 vbias
diff --git a/mag/user_analog_project_wrapper.ext b/mag/user_analog_project_wrapper.ext
index 865fda0..91b8b34 100644
--- a/mag/user_analog_project_wrapper.ext
+++ b/mag/user_analog_project_wrapper.ext
@@ -1,10 +1,10 @@
-timestamp 1640904528
+timestamp 1640907300
 version 8.3
 tech sky130A
 style ngspice()
 scale 1000 1 500000
 resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
-use cp cp_0 1 0 66630 0 1 683860
+use cp cp_1 1 0 531400 0 1 683270
 port "io_analog[4]" 41 329294 702300 334294 704800 m5
 port "io_analog[4]" 47 318994 702300 323994 704800 m5
 port "io_analog[5]" 42 227594 702300 232594 704800 m5
@@ -166,9 +166,7 @@
 port "gpio_noesd[7]" 33 -800 510348 480 510460 m3
 port "gpio_analog[7]" 15 -800 511530 480 511642 m3
 port "vdda1" 556 582340 540562 584800 545362 m3
-port "vdda1" 557 582340 550562 584800 555362 m3
 port "vssa2" 567 0 549442 1660 554242 m3
-port "vssa2" 566 0 559442 1660 564242 m3
 port "gpio_analog[6]" 14 583520 583562 584800 583674 m3
 port "gpio_noesd[6]" 32 583520 584744 584800 584856 m3
 port "io_in_3v3[13]" 87 583520 585926 584800 586038 m3
@@ -176,16 +174,14 @@
 port "io_out[13]" 141 583520 588290 584800 588402 m3
 port "io_oeb[13]" 114 583520 589472 584800 589584 m3
 port "vccd1" 553 582340 629784 584800 634584 m3
-port "vccd2" 555 0 633842 1660 638642 m3
 port "vccd1" 552 582340 639784 584800 644584 m3
+port "vssa2" 566 0 559442 1660 564242 m3
+port "vccd2" 555 0 633842 1660 638642 m3
 port "vccd2" 554 0 643842 1660 648642 m3
-port "io_analog[0]" 36 582300 677984 584800 682984 m3
+port "vdda1" 557 582340 550562 584800 555362 m3
 port "io_analog[10]" 37 0 680242 1700 685242 m3
-port "io_analog[1]" 38 566594 702300 571594 704800 m3
 port "vssa1" 562 520594 702340 525394 704800 m3
 port "vssa1" 563 510594 702340 515394 704800 m3
-port "io_analog[2]" 39 465394 702300 470394 704800 m3
-port "io_analog[3]" 40 413394 702300 418394 704800 m3
 port "io_analog[4]" 41 329294 702300 334294 704800 m3
 port "io_clamp_high[0]" 50 326794 702300 328994 704800 m3
 port "io_clamp_low[0]" 53 324294 702300 326494 704800 m3
@@ -695,6 +691,10 @@
 port "wbs_ack_o" 574 2888 -800 3000 480 m2
 port "wb_rst_i" 573 1706 -800 1818 480 m2
 port "wb_clk_i" 572 524 -800 636 480 m2
+port "io_analog[0]" 36 582300 677984 584800 682984 m3
+port "io_analog[1]" 38 566594 702300 571594 704800 m3
+port "io_analog[3]" 40 413394 702300 418394 704800 m3
+port "io_analog[2]" 39 465394 702300 470394 704800 m3
 node "io_analog[4]" 0 2925 329294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
 node "io_analog[4]" 0 2925 318994 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
 node "io_analog[5]" 0 2925 227594 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0
@@ -856,9 +856,7 @@
 node "gpio_noesd[7]" 1 613.728 -800 510348 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
 node "gpio_analog[7]" 1 613.728 -800 511530 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
 node "vdda1" 0 6519 582340 540562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "vdda1" 0 6519 582340 550562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
 node "vssa2" 0 6519 0 549442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "vssa2" 0 6519 0 559442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
 node "gpio_analog[6]" 1 613.728 583520 583562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
 node "gpio_noesd[6]" 1 613.728 583520 584744 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
 node "io_in_3v3[13]" 1 613.728 583520 585926 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
@@ -866,16 +864,14 @@
 node "io_out[13]" 1 613.728 583520 588290 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
 node "io_oeb[13]" 1 613.728 583520 589472 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0
 node "vccd1" 0 6519 582340 629784 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "vccd2" 0 6519 0 633842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
 node "vccd1" 0 6519 582340 639784 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
+node "vssa2" 0 6519 0 559442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
+node "vccd2" 0 6519 0 633842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
 node "vccd2" 0 6519 0 643842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "io_analog[0]" 0 6825 582300 677984 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
+node "vdda1" 0 304555 582340 550562 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 781372760 373488 0 0 0 0 0 0
 node "io_analog[10]" 0 6825 0 680242 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
-node "io_analog[1]" 0 6825 566594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
-node "vssa1" 0 6519 520594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
+node "vssa1" 0 33111.9 520594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 68061692 74872 0 0 0 0 0 0
 node "vssa1" 0 6519 510594 702340 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0
-node "io_analog[2]" 0 6825 465394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
-node "io_analog[3]" 0 6825 413394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
 node "io_analog[4]" 0 6825 329294 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 0 0 0 0
 node "io_clamp_high[0]" 0 3577 326794 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5500000 9400 0 0 0 0 0 0
 node "io_clamp_low[0]" 0 3577 324294 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5500000 9400 0 0 0 0 0 0
@@ -1385,26 +1381,59 @@
 node "wbs_ack_o" 1 631.648 2888 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
 node "wb_rst_i" 1 631.648 1706 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
 node "wb_clk_i" 1 631.648 524 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0
+node "io_analog[0]" 1 53088.9 582300 677984 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1399200 8000 59736100 82760 17531936 20824 0 0 0 0 0 0
+node "io_analog[1]" 82 91732 566594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 497300 4200 259700 2040 69682400 78900 107764700 76660 0 0 0 0 0 0
+node "io_analog[3]" 132 195439 413394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 648900 5760 313500 2240 13544800 30700 427749500 261480 0 0 0 0 0 0
+node "io_analog[2]" 74 103560 465394 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 708000 4820 422500 2600 43183600 62740 150550400 128060 0 0 0 0 0 0
 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "io_clamp_high[2]" "io_analog[6]" 525
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_clamp_low[2]" "io_clamp_high[2]" 525
+cap "io_analog[6]" "io_clamp_low[2]" 525
+cap "io_analog[4]" "io_analog[4]" 26250
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_analog[5]" "io_analog[5]" 26250
+cap "io_analog[4]" "io_analog[4]" 21250
+cap "io_analog[1]" "io_analog[0]" 12301.4
+cap "io_analog[6]" "io_analog[6]" 26250
+cap "io_analog[4]" "io_analog[4]" 21250
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_analog[6]" "io_analog[6]" 26250
+cap "io_analog[0]" "vdda1" 18313.2
+cap "io_analog[1]" "vdda1" 23516.2
+cap "io_analog[5]" "io_analog[5]" 21250
+cap "io_analog[6]" "io_analog[6]" 21250
+cap "io_analog[3]" "vssa1" 6389.64
+cap "io_analog[6]" "io_analog[6]" 21250
+cap "io_analog[2]" "vdda1" 219.25
+cap "io_analog[2]" "vssa1" 9275.17
 cap "io_clamp_high[0]" "io_analog[4]" 525
 cap "io_clamp_low[0]" "io_clamp_high[0]" 525
 cap "io_analog[4]" "io_clamp_low[0]" 525
 cap "io_clamp_high[1]" "io_analog[5]" 525
 cap "io_clamp_low[1]" "io_clamp_high[1]" 525
 cap "io_analog[5]" "io_clamp_low[1]" 525
-cap "io_analog[4]" "io_analog[4]" 26250
-cap "io_clamp_high[2]" "io_analog[6]" 525
-cap "io_analog[4]" "io_analog[4]" 26250
-cap "io_clamp_low[2]" "io_clamp_high[2]" 525
-cap "io_analog[5]" "io_analog[5]" 26250
-cap "io_analog[4]" "io_analog[4]" 21250
-cap "io_analog[6]" "io_clamp_low[2]" 525
-cap "io_analog[4]" "io_analog[4]" 21250
-cap "io_analog[5]" "io_analog[5]" 26250
-cap "io_analog[5]" "io_analog[5]" 21250
-cap "io_analog[6]" "io_analog[6]" 26250
-cap "io_analog[5]" "io_analog[5]" 21250
-cap "io_analog[6]" "io_analog[6]" 21250
-cap "io_analog[6]" "io_analog[6]" 26250
-cap "io_analog[6]" "io_analog[6]" 21250
-merge "cp_0/gnd!" "VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+cap "cp_1/down" "cp_1/gnd!" 439.89
+cap "io_analog[1]" "cp_1/gnd!" -55.89
+cap "cp_1/vbias" "cp_1/gnd!" 6.79412
+cap "cp_1/vbias" "cp_1/gnd!" 8.73529
+cap "cp_1/vbias" "cp_1/gnd!" 6.79412
+cap "cp_1/a_10_n50#" "cp_1/vbias" 31.68
+cap "cp_1/vbias" "cp_1/gnd!" 8.73529
+cap "cp_1/vdd!" "cp_1/vdd!" 27.826
+cap "cp_1/vdd!" "cp_1/upbar" 41.9025
+cap "vdda1" "cp_1/vdd!" 1551.39
+cap "cp_1/vdd!" "cp_1/vdd!" -86.128
+cap "cp_1/upbar" "cp_1/vdd!" 47.412
+cap "cp_1/upbar" "vdda1" 158.709
+cap "cp_1/vdd!" "vdda1" 115.602
+cap "vdda1" "cp_1/vdd!" 907.12
+cap "cp_1/vdd!" "cp_1/vdd!" -53.44
+cap "cp_1/vdd!" "vdda1" 80.16
+merge "cp_1/vdd!" "vdda1" -1712.62 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -340996 -6910 0 0 0 0 0 0
+merge "cp_1/gnd!" "VSUBS" -13727.1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -23935494 -31934 0 0 0 0 0 0
+merge "VSUBS" "vssa1"
+merge "cp_1/down" "io_analog[1]" -8142.87 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -163500 -2410 -16700 -870 -226500 -1840 -12500000 -15000 0 0 0 0 0 0
+merge "cp_1/vbias" "io_analog[3]" -6961.44 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4800 -480 0 0 0 0 -12500000 -15000 0 0 0 0 0 0
+merge "cp_1/upbar" "io_analog[2]" -6940.42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 57280 -460 0 0 0 0 -12500000 -15000 0 0 0 0 0 0
+merge "cp_1/out" "io_analog[0]" -2913.49 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 118080 -860 0 0 -4960000 -6468 0 0 0 0 0 0
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 3de03b4..77624a2 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,7 +1,91 @@
 magic
 tech sky130A
-timestamp 1640904528
+timestamp 1640907300
+<< locali >>
+rect 269115 344405 269450 344440
+rect 269115 344175 269175 344405
+rect 269395 344175 269450 344405
+rect 269115 344115 269450 344175
+rect 269115 343570 269240 344115
+rect 264705 341365 264990 341370
+rect 264705 341335 265860 341365
+rect 264705 341145 264745 341335
+rect 264945 341270 265860 341335
+rect 264945 341145 264990 341270
+rect 265740 341260 265860 341270
+rect 264705 341095 264990 341145
+rect 269115 339855 269225 340085
+rect 269425 339860 269690 339885
+rect 269425 339855 269450 339860
+rect 269115 339745 269450 339855
+rect 269425 339665 269450 339745
+rect 269650 339665 269690 339860
+rect 269425 339640 269690 339665
+<< viali >>
+rect 269175 344175 269395 344405
+rect 264745 341145 264945 341335
+rect 269450 339665 269650 339860
+<< metal1 >>
+rect 269125 344405 269450 344440
+rect 269125 344175 269175 344405
+rect 269395 344175 269450 344405
+rect 269125 344115 269450 344175
+rect 271080 341440 271560 341540
+rect 271080 341425 271175 341440
+rect 264705 341335 264990 341370
+rect 264705 341145 264745 341335
+rect 264945 341145 264990 341335
+rect 270025 341305 271175 341425
+rect 264705 341095 264990 341145
+rect 271080 341215 271175 341305
+rect 271445 341215 271560 341440
+rect 271080 341075 271560 341215
+rect 269425 339860 269690 339885
+rect 269425 339665 269450 339860
+rect 269650 339665 269690 339860
+rect 269425 339640 269690 339665
+<< via1 >>
+rect 269175 344175 269395 344405
+rect 264745 341145 264945 341335
+rect 271175 341215 271445 341440
+rect 269450 339665 269650 339860
 << metal2 >>
+rect 257180 346945 269710 347220
+rect 257180 346685 257385 346945
+rect 257665 346685 269710 346945
+rect 257180 346490 269710 346685
+rect 269015 344405 269695 346490
+rect 269015 344175 269175 344405
+rect 269395 344175 269695 344405
+rect 269015 344065 269695 344175
+rect 258080 341680 265020 341795
+rect 258080 341415 258305 341680
+rect 258580 341415 265020 341680
+rect 258080 341335 265020 341415
+rect 258080 341320 264745 341335
+rect 264675 341145 264745 341320
+rect 264945 341145 265020 341335
+rect 264675 341060 265020 341145
+rect 271015 341440 271885 341650
+rect 271015 341215 271175 341440
+rect 271445 341215 271885 341440
+rect 271015 341055 271885 341215
+rect 271015 340765 290360 341055
+rect 271015 340525 289895 340765
+rect 290110 340525 290360 340765
+rect 271015 340310 290360 340525
+rect 271015 340305 271885 340310
+rect 269245 339860 269915 339925
+rect 269245 339665 269450 339860
+rect 269650 339665 269915 339860
+rect 269245 339230 269915 339665
+rect 269245 336955 269920 339230
+rect 269230 336940 275935 336955
+rect 269230 336600 284995 336940
+rect 269230 336220 284225 336600
+rect 284650 336220 284995 336600
+rect 269230 335980 284995 336220
+rect 272705 335965 284995 335980
 rect 262 -400 318 240
 rect 853 -400 909 240
 rect 1444 -400 1500 240
@@ -496,6 +580,11 @@
 rect 290443 -400 290499 240
 rect 291034 -400 291090 240
 rect 291625 -400 291681 240
+<< via2 >>
+rect 257385 346685 257665 346945
+rect 258305 341415 258580 341680
+rect 289895 340525 290110 340765
+rect 284225 336220 284650 336600
 << metal3 >>
 rect 8097 351150 10597 352400
 rect 34097 351150 36597 352400
@@ -516,12 +605,45 @@
 rect 232697 351150 235197 352400
 rect 255297 351170 257697 352400
 rect 260297 351170 262697 352400
-rect 283297 351150 285797 352400
+rect 206750 348230 208230 351150
+rect 206750 347025 208265 348230
+rect 206785 345760 208265 347025
+rect 233320 347430 234785 351150
+rect 233320 346945 258160 347430
+rect 233320 346685 257385 346945
+rect 257665 346685 258160 346945
+rect 233320 346260 258160 346685
+rect 206710 343355 208265 345760
 rect -400 340121 850 342621
-rect 291150 338992 292400 341492
+rect 206710 342610 208190 343355
+rect 206710 341680 259435 342610
+rect 206710 341415 258305 341680
+rect 258580 341415 259435 341680
+rect 206710 340885 259435 341415
+rect 260738 340179 261891 351170
+rect 283297 351150 285797 352400
+rect 274570 343822 276940 344011
+rect 268871 343815 276940 343822
+rect 268570 343498 276940 343815
+rect 268570 343495 269005 343498
+rect 260728 340169 265658 340179
+rect 260728 339909 265698 340169
+rect 260768 339899 265698 339909
 rect -400 321921 830 324321
-rect 291170 319892 292400 322292
 rect -400 316921 830 319321
+rect -400 279721 830 282121
+rect 274570 277300 276940 343498
+rect 283705 336600 285250 351150
+rect 291150 341079 292400 341492
+rect 289694 340765 292400 341079
+rect 289694 340525 289895 340765
+rect 290110 340525 292400 340765
+rect 289694 340215 292400 340525
+rect 291150 338992 292400 340215
+rect 283705 336220 284225 336600
+rect 284650 336220 285250 336600
+rect 283705 335735 285250 336220
+rect 291170 319892 292400 322292
 rect 291170 314892 292400 317292
 rect 291760 294736 292400 294792
 rect 291760 294145 292400 294201
@@ -529,9 +651,14 @@
 rect 291760 292963 292400 293019
 rect 291760 292372 292400 292428
 rect 291760 291781 292400 291837
-rect -400 279721 830 282121
+rect 279135 277300 289119 277385
+rect 274570 277158 289119 277300
+rect 291170 277158 292400 277681
 rect -400 274721 830 277121
-rect 291170 275281 292400 277681
+rect 274570 275538 292400 277158
+rect 274570 275422 289119 275538
+rect 274570 275337 284554 275422
+rect 291170 275281 292400 275538
 rect 291170 270281 292400 272681
 rect -400 255765 240 255821
 rect -400 255174 240 255230
@@ -700,9 +827,9 @@
 rect -50 0 0 352000
 rect 292000 0 292050 352000
 rect -50 -50 292050 0
-use cp  cp_0
-timestamp 1640602475
-transform 1 0 33315 0 1 341930
+use cp  cp_1
+timestamp 1640906950
+transform 1 0 265700 0 1 341635
 box -245 -1715 4500 2030
 << labels >>
 flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0]
diff --git a/mag/user_analog_project_wrapper.spice b/mag/user_analog_project_wrapper.spice
new file mode 100644
index 0000000..7ee9aeb
--- /dev/null
+++ b/mag/user_analog_project_wrapper.spice
@@ -0,0 +1,814 @@
+* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A
+
+.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i
+X0 cp_0/a_7110_n2840# cp_0/down gnd gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X1 cp_0/a_7110_0# cp_0/upbar vdd vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+X2 cp_0/a_10_n50# cp_0/vbias gnd gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X3 cp_0/a_10_n50# cp_0/a_10_n50# vdd vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+X4 cp_0/a_3060_0# cp_0/a_1710_n2840# cp_0/a_1710_n2840# vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+X5 vdd gnd cp_0/a_3060_0# vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+X6 cp_0/a_3060_n2840# cp_0/a_1710_0# cp_0/a_1710_0# gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X7 cp_0/a_1710_n2840# cp_0/vbias gnd gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X8 gnd cp_0/out cp_0/a_3060_n2840# gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X9 cp_0/a_1710_0# cp_0/a_10_n50# vdd vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+X10 cp_0/out cp_0/a_1710_n2840# cp_0/a_7110_0# vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+X11 gnd vdd cp_0/a_3060_n2840# gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X12 cp_0/out cp_0/a_1710_0# cp_0/a_7110_n2840# gnd sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=9e+06u l=1.8e+06u
+X13 vdd cp_0/out cp_0/a_3060_0# vdd sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.8e+07u l=1.8e+06u
+C0 io_clamp_high[0] io_analog[4] 0.53fF
+C1 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
+C2 cp_0/a_10_n50# cp_0/vbias 0.19fF
+C3 io_clamp_low[2] io_analog[6] 0.53fF
+C4 cp_0/upbar cp_0/down 0.02fF
+C5 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C6 io_clamp_high[1] io_analog[5] 0.53fF
+C7 io_clamp_low[0] io_analog[4] 0.53fF
+C8 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
+C9 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
+C10 io_clamp_low[1] io_clamp_high[1] 0.53fF
+C11 cp_0/out cp_0/a_1710_0# 0.84fF
+C12 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C13 io_clamp_high[2] io_analog[6] 0.53fF
+C14 cp_0/a_1710_0# cp_0/down 0.32fF
+C15 io_clamp_low[1] io_analog[5] 0.53fF
+C16 cp_0/a_1710_n2840# cp_0/out 0.61fF
+C17 io_analog[4] vdd 25.05fF
+C18 io_analog[5] vdd 25.05fF
+C19 io_analog[6] vdd 25.05fF
+C20 io_in_3v3[0] vdd 0.61fF
+C21 io_oeb[26] vdd 0.61fF
+C22 io_in[0] vdd 0.61fF
+C23 io_out[26] vdd 0.61fF
+C24 io_out[0] vdd 0.61fF
+C25 io_in[26] vdd 0.61fF
+C26 io_oeb[0] vdd 0.61fF
+C27 io_in_3v3[26] vdd 0.61fF
+C28 io_in_3v3[1] vdd 0.61fF
+C29 io_oeb[25] vdd 0.61fF
+C30 io_in[1] vdd 0.61fF
+C31 io_out[25] vdd 0.61fF
+C32 io_out[1] vdd 0.61fF
+C33 io_in[25] vdd 0.61fF
+C34 io_oeb[1] vdd 0.61fF
+C35 io_in_3v3[25] vdd 0.61fF
+C36 io_in_3v3[2] vdd 0.61fF
+C37 io_oeb[24] vdd 0.61fF
+C38 io_in[2] vdd 0.61fF
+C39 io_out[24] vdd 0.61fF
+C40 io_out[2] vdd 0.61fF
+C41 io_in[24] vdd 0.61fF
+C42 io_oeb[2] vdd 0.61fF
+C43 io_in_3v3[24] vdd 0.61fF
+C44 io_in_3v3[3] vdd 0.61fF
+C45 gpio_noesd[17] vdd 0.61fF
+C46 io_in[3] vdd 0.61fF
+C47 gpio_analog[17] vdd 0.61fF
+C48 io_out[3] vdd 0.61fF
+C49 io_oeb[3] vdd 0.61fF
+C50 io_in_3v3[4] vdd 0.61fF
+C51 io_in[4] vdd 0.61fF
+C52 io_out[4] vdd 0.61fF
+C53 io_oeb[4] vdd 0.61fF
+C54 io_oeb[23] vdd 0.61fF
+C55 io_out[23] vdd 0.61fF
+C56 io_in[23] vdd 0.61fF
+C57 io_in_3v3[23] vdd 0.61fF
+C58 gpio_noesd[16] vdd 0.61fF
+C59 gpio_analog[16] vdd 0.61fF
+C60 io_in_3v3[5] vdd 0.61fF
+C61 io_in[5] vdd 0.61fF
+C62 io_out[5] vdd 0.61fF
+C63 io_oeb[5] vdd 0.61fF
+C64 io_oeb[22] vdd 0.61fF
+C65 io_out[22] vdd 0.61fF
+C66 io_in[22] vdd 0.61fF
+C67 io_in_3v3[22] vdd 0.61fF
+C68 gpio_noesd[15] vdd 0.61fF
+C69 gpio_analog[15] vdd 0.61fF
+C70 io_in_3v3[6] vdd 0.61fF
+C71 io_in[6] vdd 0.61fF
+C72 io_out[6] vdd 0.61fF
+C73 io_oeb[6] vdd 0.61fF
+C74 io_oeb[21] vdd 0.61fF
+C75 io_out[21] vdd 0.61fF
+C76 io_in[21] vdd 0.61fF
+C77 io_in_3v3[21] vdd 0.61fF
+C78 gpio_noesd[14] vdd 0.61fF
+C79 gpio_analog[14] vdd 0.61fF
+C80 vssa1 vdd 26.08fF
+C81 vssd2 vdd 13.04fF
+C82 vssd1 vdd 13.04fF
+C83 vdda2 vdd 13.04fF
+C84 vdda1 vdd 26.08fF
+C85 io_oeb[20] vdd 0.61fF
+C86 io_out[20] vdd 0.61fF
+C87 io_in[20] vdd 0.61fF
+C88 io_in_3v3[20] vdd 0.61fF
+C89 gpio_noesd[13] vdd 0.61fF
+C90 gpio_analog[13] vdd 0.61fF
+C91 gpio_analog[0] vdd 0.61fF
+C92 gpio_noesd[0] vdd 0.61fF
+C93 io_in_3v3[7] vdd 0.61fF
+C94 io_in[7] vdd 0.61fF
+C95 io_out[7] vdd 0.61fF
+C96 io_oeb[7] vdd 0.61fF
+C97 io_oeb[19] vdd 0.61fF
+C98 io_out[19] vdd 0.61fF
+C99 io_in[19] vdd 0.61fF
+C100 io_in_3v3[19] vdd 0.61fF
+C101 gpio_noesd[12] vdd 0.61fF
+C102 gpio_analog[12] vdd 0.61fF
+C103 gpio_analog[1] vdd 0.61fF
+C104 gpio_noesd[1] vdd 0.61fF
+C105 io_in_3v3[8] vdd 0.61fF
+C106 io_in[8] vdd 0.61fF
+C107 io_out[8] vdd 0.61fF
+C108 io_oeb[8] vdd 0.61fF
+C109 io_oeb[18] vdd 0.61fF
+C110 io_out[18] vdd 0.61fF
+C111 io_in[18] vdd 0.61fF
+C112 io_in_3v3[18] vdd 0.61fF
+C113 gpio_noesd[11] vdd 0.61fF
+C114 gpio_analog[11] vdd 0.61fF
+C115 gpio_analog[2] vdd 0.61fF
+C116 gpio_noesd[2] vdd 0.61fF
+C117 io_in_3v3[9] vdd 0.61fF
+C118 io_in[9] vdd 0.61fF
+C119 io_out[9] vdd 0.61fF
+C120 io_oeb[9] vdd 0.61fF
+C121 io_oeb[17] vdd 0.61fF
+C122 io_out[17] vdd 0.61fF
+C123 io_in[17] vdd 0.61fF
+C124 io_in_3v3[17] vdd 0.61fF
+C125 gpio_noesd[10] vdd 0.61fF
+C126 gpio_analog[10] vdd 0.61fF
+C127 gpio_analog[3] vdd 0.61fF
+C128 gpio_noesd[3] vdd 0.61fF
+C129 io_in_3v3[10] vdd 0.61fF
+C130 io_in[10] vdd 0.61fF
+C131 io_out[10] vdd 0.61fF
+C132 io_oeb[10] vdd 0.61fF
+C133 io_oeb[16] vdd 0.61fF
+C134 io_out[16] vdd 0.61fF
+C135 io_in[16] vdd 0.61fF
+C136 io_in_3v3[16] vdd 0.61fF
+C137 gpio_noesd[9] vdd 0.61fF
+C138 gpio_analog[9] vdd 0.61fF
+C139 gpio_analog[4] vdd 0.61fF
+C140 gpio_noesd[4] vdd 0.61fF
+C141 io_in_3v3[11] vdd 0.61fF
+C142 io_in[11] vdd 0.61fF
+C143 io_out[11] vdd 0.61fF
+C144 io_oeb[11] vdd 0.61fF
+C145 io_oeb[15] vdd 0.61fF
+C146 io_out[15] vdd 0.61fF
+C147 io_in[15] vdd 0.61fF
+C148 io_in_3v3[15] vdd 0.61fF
+C149 gpio_noesd[8] vdd 0.61fF
+C150 gpio_analog[8] vdd 0.61fF
+C151 gpio_analog[5] vdd 0.61fF
+C152 gpio_noesd[5] vdd 0.61fF
+C153 io_in_3v3[12] vdd 0.61fF
+C154 io_in[12] vdd 0.61fF
+C155 io_out[12] vdd 0.61fF
+C156 io_oeb[12] vdd 0.61fF
+C157 io_oeb[14] vdd 0.61fF
+C158 io_out[14] vdd 0.61fF
+C159 io_in[14] vdd 0.61fF
+C160 io_in_3v3[14] vdd 0.61fF
+C161 gpio_noesd[7] vdd 0.61fF
+C162 gpio_analog[7] vdd 0.61fF
+C163 vssa2 vdd 13.04fF
+C164 gpio_analog[6] vdd 0.61fF
+C165 gpio_noesd[6] vdd 0.61fF
+C166 io_in_3v3[13] vdd 0.61fF
+C167 io_in[13] vdd 0.61fF
+C168 io_out[13] vdd 0.61fF
+C169 io_oeb[13] vdd 0.61fF
+C170 vccd1 vdd 13.04fF
+C171 vccd2 vdd 13.04fF
+C172 io_analog[0] vdd 6.83fF
+C173 io_analog[10] vdd 6.83fF
+C174 io_analog[1] vdd 6.83fF
+C175 io_analog[2] vdd 6.83fF
+C176 io_analog[3] vdd 6.83fF
+C177 io_clamp_high[0] vdd 3.58fF
+C178 io_clamp_low[0] vdd 3.58fF
+C179 io_clamp_high[1] vdd 3.58fF
+C180 io_clamp_low[1] vdd 3.58fF
+C181 io_clamp_high[2] vdd 3.58fF
+C182 io_clamp_low[2] vdd 3.58fF
+C183 io_analog[7] vdd 6.83fF
+C184 io_analog[8] vdd 6.83fF
+C185 io_analog[9] vdd 6.83fF
+C186 user_irq[2] vdd 0.63fF
+C187 user_irq[1] vdd 0.63fF
+C188 user_irq[0] vdd 0.63fF
+C189 user_clock2 vdd 0.63fF
+C190 la_oenb[127] vdd 0.63fF
+C191 la_data_out[127] vdd 0.63fF
+C192 la_data_in[127] vdd 0.63fF
+C193 la_oenb[126] vdd 0.63fF
+C194 la_data_out[126] vdd 0.63fF
+C195 la_data_in[126] vdd 0.63fF
+C196 la_oenb[125] vdd 0.63fF
+C197 la_data_out[125] vdd 0.63fF
+C198 la_data_in[125] vdd 0.63fF
+C199 la_oenb[124] vdd 0.63fF
+C200 la_data_out[124] vdd 0.63fF
+C201 la_data_in[124] vdd 0.63fF
+C202 la_oenb[123] vdd 0.63fF
+C203 la_data_out[123] vdd 0.63fF
+C204 la_data_in[123] vdd 0.63fF
+C205 la_oenb[122] vdd 0.63fF
+C206 la_data_out[122] vdd 0.63fF
+C207 la_data_in[122] vdd 0.63fF
+C208 la_oenb[121] vdd 0.63fF
+C209 la_data_out[121] vdd 0.63fF
+C210 la_data_in[121] vdd 0.63fF
+C211 la_oenb[120] vdd 0.63fF
+C212 la_data_out[120] vdd 0.63fF
+C213 la_data_in[120] vdd 0.63fF
+C214 la_oenb[119] vdd 0.63fF
+C215 la_data_out[119] vdd 0.63fF
+C216 la_data_in[119] vdd 0.63fF
+C217 la_oenb[118] vdd 0.63fF
+C218 la_data_out[118] vdd 0.63fF
+C219 la_data_in[118] vdd 0.63fF
+C220 la_oenb[117] vdd 0.63fF
+C221 la_data_out[117] vdd 0.63fF
+C222 la_data_in[117] vdd 0.63fF
+C223 la_oenb[116] vdd 0.63fF
+C224 la_data_out[116] vdd 0.63fF
+C225 la_data_in[116] vdd 0.63fF
+C226 la_oenb[115] vdd 0.63fF
+C227 la_data_out[115] vdd 0.63fF
+C228 la_data_in[115] vdd 0.63fF
+C229 la_oenb[114] vdd 0.63fF
+C230 la_data_out[114] vdd 0.63fF
+C231 la_data_in[114] vdd 0.63fF
+C232 la_oenb[113] vdd 0.63fF
+C233 la_data_out[113] vdd 0.63fF
+C234 la_data_in[113] vdd 0.63fF
+C235 la_oenb[112] vdd 0.63fF
+C236 la_data_out[112] vdd 0.63fF
+C237 la_data_in[112] vdd 0.63fF
+C238 la_oenb[111] vdd 0.63fF
+C239 la_data_out[111] vdd 0.63fF
+C240 la_data_in[111] vdd 0.63fF
+C241 la_oenb[110] vdd 0.63fF
+C242 la_data_out[110] vdd 0.63fF
+C243 la_data_in[110] vdd 0.63fF
+C244 la_oenb[109] vdd 0.63fF
+C245 la_data_out[109] vdd 0.63fF
+C246 la_data_in[109] vdd 0.63fF
+C247 la_oenb[108] vdd 0.63fF
+C248 la_data_out[108] vdd 0.63fF
+C249 la_data_in[108] vdd 0.63fF
+C250 la_oenb[107] vdd 0.63fF
+C251 la_data_out[107] vdd 0.63fF
+C252 la_data_in[107] vdd 0.63fF
+C253 la_oenb[106] vdd 0.63fF
+C254 la_data_out[106] vdd 0.63fF
+C255 la_data_in[106] vdd 0.63fF
+C256 la_oenb[105] vdd 0.63fF
+C257 la_data_out[105] vdd 0.63fF
+C258 la_data_in[105] vdd 0.63fF
+C259 la_oenb[104] vdd 0.63fF
+C260 la_data_out[104] vdd 0.63fF
+C261 la_data_in[104] vdd 0.63fF
+C262 la_oenb[103] vdd 0.63fF
+C263 la_data_out[103] vdd 0.63fF
+C264 la_data_in[103] vdd 0.63fF
+C265 la_oenb[102] vdd 0.63fF
+C266 la_data_out[102] vdd 0.63fF
+C267 la_data_in[102] vdd 0.63fF
+C268 la_oenb[101] vdd 0.63fF
+C269 la_data_out[101] vdd 0.63fF
+C270 la_data_in[101] vdd 0.63fF
+C271 la_oenb[100] vdd 0.63fF
+C272 la_data_out[100] vdd 0.63fF
+C273 la_data_in[100] vdd 0.63fF
+C274 la_oenb[99] vdd 0.63fF
+C275 la_data_out[99] vdd 0.63fF
+C276 la_data_in[99] vdd 0.63fF
+C277 la_oenb[98] vdd 0.63fF
+C278 la_data_out[98] vdd 0.63fF
+C279 la_data_in[98] vdd 0.63fF
+C280 la_oenb[97] vdd 0.63fF
+C281 la_data_out[97] vdd 0.63fF
+C282 la_data_in[97] vdd 0.63fF
+C283 la_oenb[96] vdd 0.63fF
+C284 la_data_out[96] vdd 0.63fF
+C285 la_data_in[96] vdd 0.63fF
+C286 la_oenb[95] vdd 0.63fF
+C287 la_data_out[95] vdd 0.63fF
+C288 la_data_in[95] vdd 0.63fF
+C289 la_oenb[94] vdd 0.63fF
+C290 la_data_out[94] vdd 0.63fF
+C291 la_data_in[94] vdd 0.63fF
+C292 la_oenb[93] vdd 0.63fF
+C293 la_data_out[93] vdd 0.63fF
+C294 la_data_in[93] vdd 0.63fF
+C295 la_oenb[92] vdd 0.63fF
+C296 la_data_out[92] vdd 0.63fF
+C297 la_data_in[92] vdd 0.63fF
+C298 la_oenb[91] vdd 0.63fF
+C299 la_data_out[91] vdd 0.63fF
+C300 la_data_in[91] vdd 0.63fF
+C301 la_oenb[90] vdd 0.63fF
+C302 la_data_out[90] vdd 0.63fF
+C303 la_data_in[90] vdd 0.63fF
+C304 la_oenb[89] vdd 0.63fF
+C305 la_data_out[89] vdd 0.63fF
+C306 la_data_in[89] vdd 0.63fF
+C307 la_oenb[88] vdd 0.63fF
+C308 la_data_out[88] vdd 0.63fF
+C309 la_data_in[88] vdd 0.63fF
+C310 la_oenb[87] vdd 0.63fF
+C311 la_data_out[87] vdd 0.63fF
+C312 la_data_in[87] vdd 0.63fF
+C313 la_oenb[86] vdd 0.63fF
+C314 la_data_out[86] vdd 0.63fF
+C315 la_data_in[86] vdd 0.63fF
+C316 la_oenb[85] vdd 0.63fF
+C317 la_data_out[85] vdd 0.63fF
+C318 la_data_in[85] vdd 0.63fF
+C319 la_oenb[84] vdd 0.63fF
+C320 la_data_out[84] vdd 0.63fF
+C321 la_data_in[84] vdd 0.63fF
+C322 la_oenb[83] vdd 0.63fF
+C323 la_data_out[83] vdd 0.63fF
+C324 la_data_in[83] vdd 0.63fF
+C325 la_oenb[82] vdd 0.63fF
+C326 la_data_out[82] vdd 0.63fF
+C327 la_data_in[82] vdd 0.63fF
+C328 la_oenb[81] vdd 0.63fF
+C329 la_data_out[81] vdd 0.63fF
+C330 la_data_in[81] vdd 0.63fF
+C331 la_oenb[80] vdd 0.63fF
+C332 la_data_out[80] vdd 0.63fF
+C333 la_data_in[80] vdd 0.63fF
+C334 la_oenb[79] vdd 0.63fF
+C335 la_data_out[79] vdd 0.63fF
+C336 la_data_in[79] vdd 0.63fF
+C337 la_oenb[78] vdd 0.63fF
+C338 la_data_out[78] vdd 0.63fF
+C339 la_data_in[78] vdd 0.63fF
+C340 la_oenb[77] vdd 0.63fF
+C341 la_data_out[77] vdd 0.63fF
+C342 la_data_in[77] vdd 0.63fF
+C343 la_oenb[76] vdd 0.63fF
+C344 la_data_out[76] vdd 0.63fF
+C345 la_data_in[76] vdd 0.63fF
+C346 la_oenb[75] vdd 0.63fF
+C347 la_data_out[75] vdd 0.63fF
+C348 la_data_in[75] vdd 0.63fF
+C349 la_oenb[74] vdd 0.63fF
+C350 la_data_out[74] vdd 0.63fF
+C351 la_data_in[74] vdd 0.63fF
+C352 la_oenb[73] vdd 0.63fF
+C353 la_data_out[73] vdd 0.63fF
+C354 la_data_in[73] vdd 0.63fF
+C355 la_oenb[72] vdd 0.63fF
+C356 la_data_out[72] vdd 0.63fF
+C357 la_data_in[72] vdd 0.63fF
+C358 la_oenb[71] vdd 0.63fF
+C359 la_data_out[71] vdd 0.63fF
+C360 la_data_in[71] vdd 0.63fF
+C361 la_oenb[70] vdd 0.63fF
+C362 la_data_out[70] vdd 0.63fF
+C363 la_data_in[70] vdd 0.63fF
+C364 la_oenb[69] vdd 0.63fF
+C365 la_data_out[69] vdd 0.63fF
+C366 la_data_in[69] vdd 0.63fF
+C367 la_oenb[68] vdd 0.63fF
+C368 la_data_out[68] vdd 0.63fF
+C369 la_data_in[68] vdd 0.63fF
+C370 la_oenb[67] vdd 0.63fF
+C371 la_data_out[67] vdd 0.63fF
+C372 la_data_in[67] vdd 0.63fF
+C373 la_oenb[66] vdd 0.63fF
+C374 la_data_out[66] vdd 0.63fF
+C375 la_data_in[66] vdd 0.63fF
+C376 la_oenb[65] vdd 0.63fF
+C377 la_data_out[65] vdd 0.63fF
+C378 la_data_in[65] vdd 0.63fF
+C379 la_oenb[64] vdd 0.63fF
+C380 la_data_out[64] vdd 0.63fF
+C381 la_data_in[64] vdd 0.63fF
+C382 la_oenb[63] vdd 0.63fF
+C383 la_data_out[63] vdd 0.63fF
+C384 la_data_in[63] vdd 0.63fF
+C385 la_oenb[62] vdd 0.63fF
+C386 la_data_out[62] vdd 0.63fF
+C387 la_data_in[62] vdd 0.63fF
+C388 la_oenb[61] vdd 0.63fF
+C389 la_data_out[61] vdd 0.63fF
+C390 la_data_in[61] vdd 0.63fF
+C391 la_oenb[60] vdd 0.63fF
+C392 la_data_out[60] vdd 0.63fF
+C393 la_data_in[60] vdd 0.63fF
+C394 la_oenb[59] vdd 0.63fF
+C395 la_data_out[59] vdd 0.63fF
+C396 la_data_in[59] vdd 0.63fF
+C397 la_oenb[58] vdd 0.63fF
+C398 la_data_out[58] vdd 0.63fF
+C399 la_data_in[58] vdd 0.63fF
+C400 la_oenb[57] vdd 0.63fF
+C401 la_data_out[57] vdd 0.63fF
+C402 la_data_in[57] vdd 0.63fF
+C403 la_oenb[56] vdd 0.63fF
+C404 la_data_out[56] vdd 0.63fF
+C405 la_data_in[56] vdd 0.63fF
+C406 la_oenb[55] vdd 0.63fF
+C407 la_data_out[55] vdd 0.63fF
+C408 la_data_in[55] vdd 0.63fF
+C409 la_oenb[54] vdd 0.63fF
+C410 la_data_out[54] vdd 0.63fF
+C411 la_data_in[54] vdd 0.63fF
+C412 la_oenb[53] vdd 0.63fF
+C413 la_data_out[53] vdd 0.63fF
+C414 la_data_in[53] vdd 0.63fF
+C415 la_oenb[52] vdd 0.63fF
+C416 la_data_out[52] vdd 0.63fF
+C417 la_data_in[52] vdd 0.63fF
+C418 la_oenb[51] vdd 0.63fF
+C419 la_data_out[51] vdd 0.63fF
+C420 la_data_in[51] vdd 0.63fF
+C421 la_oenb[50] vdd 0.63fF
+C422 la_data_out[50] vdd 0.63fF
+C423 la_data_in[50] vdd 0.63fF
+C424 la_oenb[49] vdd 0.63fF
+C425 la_data_out[49] vdd 0.63fF
+C426 la_data_in[49] vdd 0.63fF
+C427 la_oenb[48] vdd 0.63fF
+C428 la_data_out[48] vdd 0.63fF
+C429 la_data_in[48] vdd 0.63fF
+C430 la_oenb[47] vdd 0.63fF
+C431 la_data_out[47] vdd 0.63fF
+C432 la_data_in[47] vdd 0.63fF
+C433 la_oenb[46] vdd 0.63fF
+C434 la_data_out[46] vdd 0.63fF
+C435 la_data_in[46] vdd 0.63fF
+C436 la_oenb[45] vdd 0.63fF
+C437 la_data_out[45] vdd 0.63fF
+C438 la_data_in[45] vdd 0.63fF
+C439 la_oenb[44] vdd 0.63fF
+C440 la_data_out[44] vdd 0.63fF
+C441 la_data_in[44] vdd 0.63fF
+C442 la_oenb[43] vdd 0.63fF
+C443 la_data_out[43] vdd 0.63fF
+C444 la_data_in[43] vdd 0.63fF
+C445 la_oenb[42] vdd 0.63fF
+C446 la_data_out[42] vdd 0.63fF
+C447 la_data_in[42] vdd 0.63fF
+C448 la_oenb[41] vdd 0.63fF
+C449 la_data_out[41] vdd 0.63fF
+C450 la_data_in[41] vdd 0.63fF
+C451 la_oenb[40] vdd 0.63fF
+C452 la_data_out[40] vdd 0.63fF
+C453 la_data_in[40] vdd 0.63fF
+C454 la_oenb[39] vdd 0.63fF
+C455 la_data_out[39] vdd 0.63fF
+C456 la_data_in[39] vdd 0.63fF
+C457 la_oenb[38] vdd 0.63fF
+C458 la_data_out[38] vdd 0.63fF
+C459 la_data_in[38] vdd 0.63fF
+C460 la_oenb[37] vdd 0.63fF
+C461 la_data_out[37] vdd 0.63fF
+C462 la_data_in[37] vdd 0.63fF
+C463 la_oenb[36] vdd 0.63fF
+C464 la_data_out[36] vdd 0.63fF
+C465 la_data_in[36] vdd 0.63fF
+C466 la_oenb[35] vdd 0.63fF
+C467 la_data_out[35] vdd 0.63fF
+C468 la_data_in[35] vdd 0.63fF
+C469 la_oenb[34] vdd 0.63fF
+C470 la_data_out[34] vdd 0.63fF
+C471 la_data_in[34] vdd 0.63fF
+C472 la_oenb[33] vdd 0.63fF
+C473 la_data_out[33] vdd 0.63fF
+C474 la_data_in[33] vdd 0.63fF
+C475 la_oenb[32] vdd 0.63fF
+C476 la_data_out[32] vdd 0.63fF
+C477 la_data_in[32] vdd 0.63fF
+C478 la_oenb[31] vdd 0.63fF
+C479 la_data_out[31] vdd 0.63fF
+C480 la_data_in[31] vdd 0.63fF
+C481 la_oenb[30] vdd 0.63fF
+C482 la_data_out[30] vdd 0.63fF
+C483 la_data_in[30] vdd 0.63fF
+C484 la_oenb[29] vdd 0.63fF
+C485 la_data_out[29] vdd 0.63fF
+C486 la_data_in[29] vdd 0.63fF
+C487 la_oenb[28] vdd 0.63fF
+C488 la_data_out[28] vdd 0.63fF
+C489 la_data_in[28] vdd 0.63fF
+C490 la_oenb[27] vdd 0.63fF
+C491 la_data_out[27] vdd 0.63fF
+C492 la_data_in[27] vdd 0.63fF
+C493 la_oenb[26] vdd 0.63fF
+C494 la_data_out[26] vdd 0.63fF
+C495 la_data_in[26] vdd 0.63fF
+C496 la_oenb[25] vdd 0.63fF
+C497 la_data_out[25] vdd 0.63fF
+C498 la_data_in[25] vdd 0.63fF
+C499 la_oenb[24] vdd 0.63fF
+C500 la_data_out[24] vdd 0.63fF
+C501 la_data_in[24] vdd 0.63fF
+C502 la_oenb[23] vdd 0.63fF
+C503 la_data_out[23] vdd 0.63fF
+C504 la_data_in[23] vdd 0.63fF
+C505 la_oenb[22] vdd 0.63fF
+C506 la_data_out[22] vdd 0.63fF
+C507 la_data_in[22] vdd 0.63fF
+C508 la_oenb[21] vdd 0.63fF
+C509 la_data_out[21] vdd 0.63fF
+C510 la_data_in[21] vdd 0.63fF
+C511 la_oenb[20] vdd 0.63fF
+C512 la_data_out[20] vdd 0.63fF
+C513 la_data_in[20] vdd 0.63fF
+C514 la_oenb[19] vdd 0.63fF
+C515 la_data_out[19] vdd 0.63fF
+C516 la_data_in[19] vdd 0.63fF
+C517 la_oenb[18] vdd 0.63fF
+C518 la_data_out[18] vdd 0.63fF
+C519 la_data_in[18] vdd 0.63fF
+C520 la_oenb[17] vdd 0.63fF
+C521 la_data_out[17] vdd 0.63fF
+C522 la_data_in[17] vdd 0.63fF
+C523 la_oenb[16] vdd 0.63fF
+C524 la_data_out[16] vdd 0.63fF
+C525 la_data_in[16] vdd 0.63fF
+C526 la_oenb[15] vdd 0.63fF
+C527 la_data_out[15] vdd 0.63fF
+C528 la_data_in[15] vdd 0.63fF
+C529 la_oenb[14] vdd 0.63fF
+C530 la_data_out[14] vdd 0.63fF
+C531 la_data_in[14] vdd 0.63fF
+C532 la_oenb[13] vdd 0.63fF
+C533 la_data_out[13] vdd 0.63fF
+C534 la_data_in[13] vdd 0.63fF
+C535 la_oenb[12] vdd 0.63fF
+C536 la_data_out[12] vdd 0.63fF
+C537 la_data_in[12] vdd 0.63fF
+C538 la_oenb[11] vdd 0.63fF
+C539 la_data_out[11] vdd 0.63fF
+C540 la_data_in[11] vdd 0.63fF
+C541 la_oenb[10] vdd 0.63fF
+C542 la_data_out[10] vdd 0.63fF
+C543 la_data_in[10] vdd 0.63fF
+C544 la_oenb[9] vdd 0.63fF
+C545 la_data_out[9] vdd 0.63fF
+C546 la_data_in[9] vdd 0.63fF
+C547 la_oenb[8] vdd 0.63fF
+C548 la_data_out[8] vdd 0.63fF
+C549 la_data_in[8] vdd 0.63fF
+C550 la_oenb[7] vdd 0.63fF
+C551 la_data_out[7] vdd 0.63fF
+C552 la_data_in[7] vdd 0.63fF
+C553 la_oenb[6] vdd 0.63fF
+C554 la_data_out[6] vdd 0.63fF
+C555 la_data_in[6] vdd 0.63fF
+C556 la_oenb[5] vdd 0.63fF
+C557 la_data_out[5] vdd 0.63fF
+C558 la_data_in[5] vdd 0.63fF
+C559 la_oenb[4] vdd 0.63fF
+C560 la_data_out[4] vdd 0.63fF
+C561 la_data_in[4] vdd 0.63fF
+C562 la_oenb[3] vdd 0.63fF
+C563 la_data_out[3] vdd 0.63fF
+C564 la_data_in[3] vdd 0.63fF
+C565 la_oenb[2] vdd 0.63fF
+C566 la_data_out[2] vdd 0.63fF
+C567 la_data_in[2] vdd 0.63fF
+C568 la_oenb[1] vdd 0.63fF
+C569 la_data_out[1] vdd 0.63fF
+C570 la_data_in[1] vdd 0.63fF
+C571 la_oenb[0] vdd 0.63fF
+C572 la_data_out[0] vdd 0.63fF
+C573 la_data_in[0] vdd 0.63fF
+C574 wbs_dat_o[31] vdd 0.63fF
+C575 wbs_dat_i[31] vdd 0.63fF
+C576 wbs_adr_i[31] vdd 0.63fF
+C577 wbs_dat_o[30] vdd 0.63fF
+C578 wbs_dat_i[30] vdd 0.63fF
+C579 wbs_adr_i[30] vdd 0.63fF
+C580 wbs_dat_o[29] vdd 0.63fF
+C581 wbs_dat_i[29] vdd 0.63fF
+C582 wbs_adr_i[29] vdd 0.63fF
+C583 wbs_dat_o[28] vdd 0.63fF
+C584 wbs_dat_i[28] vdd 0.63fF
+C585 wbs_adr_i[28] vdd 0.63fF
+C586 wbs_dat_o[27] vdd 0.63fF
+C587 wbs_dat_i[27] vdd 0.63fF
+C588 wbs_adr_i[27] vdd 0.63fF
+C589 wbs_dat_o[26] vdd 0.63fF
+C590 wbs_dat_i[26] vdd 0.63fF
+C591 wbs_adr_i[26] vdd 0.63fF
+C592 wbs_dat_o[25] vdd 0.63fF
+C593 wbs_dat_i[25] vdd 0.63fF
+C594 wbs_adr_i[25] vdd 0.63fF
+C595 wbs_dat_o[24] vdd 0.63fF
+C596 wbs_dat_i[24] vdd 0.63fF
+C597 wbs_adr_i[24] vdd 0.63fF
+C598 wbs_dat_o[23] vdd 0.63fF
+C599 wbs_dat_i[23] vdd 0.63fF
+C600 wbs_adr_i[23] vdd 0.63fF
+C601 wbs_dat_o[22] vdd 0.63fF
+C602 wbs_dat_i[22] vdd 0.63fF
+C603 wbs_adr_i[22] vdd 0.63fF
+C604 wbs_dat_o[21] vdd 0.63fF
+C605 wbs_dat_i[21] vdd 0.63fF
+C606 wbs_adr_i[21] vdd 0.63fF
+C607 wbs_dat_o[20] vdd 0.63fF
+C608 wbs_dat_i[20] vdd 0.63fF
+C609 wbs_adr_i[20] vdd 0.63fF
+C610 wbs_dat_o[19] vdd 0.63fF
+C611 wbs_dat_i[19] vdd 0.63fF
+C612 wbs_adr_i[19] vdd 0.63fF
+C613 wbs_dat_o[18] vdd 0.63fF
+C614 wbs_dat_i[18] vdd 0.63fF
+C615 wbs_adr_i[18] vdd 0.63fF
+C616 wbs_dat_o[17] vdd 0.63fF
+C617 wbs_dat_i[17] vdd 0.63fF
+C618 wbs_adr_i[17] vdd 0.63fF
+C619 wbs_dat_o[16] vdd 0.63fF
+C620 wbs_dat_i[16] vdd 0.63fF
+C621 wbs_adr_i[16] vdd 0.63fF
+C622 wbs_dat_o[15] vdd 0.63fF
+C623 wbs_dat_i[15] vdd 0.63fF
+C624 wbs_adr_i[15] vdd 0.63fF
+C625 wbs_dat_o[14] vdd 0.63fF
+C626 wbs_dat_i[14] vdd 0.63fF
+C627 wbs_adr_i[14] vdd 0.63fF
+C628 wbs_dat_o[13] vdd 0.63fF
+C629 wbs_dat_i[13] vdd 0.63fF
+C630 wbs_adr_i[13] vdd 0.63fF
+C631 wbs_dat_o[12] vdd 0.63fF
+C632 wbs_dat_i[12] vdd 0.63fF
+C633 wbs_adr_i[12] vdd 0.63fF
+C634 wbs_dat_o[11] vdd 0.63fF
+C635 wbs_dat_i[11] vdd 0.63fF
+C636 wbs_adr_i[11] vdd 0.63fF
+C637 wbs_dat_o[10] vdd 0.63fF
+C638 wbs_dat_i[10] vdd 0.63fF
+C639 wbs_adr_i[10] vdd 0.63fF
+C640 wbs_dat_o[9] vdd 0.63fF
+C641 wbs_dat_i[9] vdd 0.63fF
+C642 wbs_adr_i[9] vdd 0.63fF
+C643 wbs_dat_o[8] vdd 0.63fF
+C644 wbs_dat_i[8] vdd 0.63fF
+C645 wbs_adr_i[8] vdd 0.63fF
+C646 wbs_dat_o[7] vdd 0.63fF
+C647 wbs_dat_i[7] vdd 0.63fF
+C648 wbs_adr_i[7] vdd 0.63fF
+C649 wbs_dat_o[6] vdd 0.63fF
+C650 wbs_dat_i[6] vdd 0.63fF
+C651 wbs_adr_i[6] vdd 0.63fF
+C652 wbs_dat_o[5] vdd 0.63fF
+C653 wbs_dat_i[5] vdd 0.63fF
+C654 wbs_adr_i[5] vdd 0.63fF
+C655 wbs_dat_o[4] vdd 0.63fF
+C656 wbs_dat_i[4] vdd 0.63fF
+C657 wbs_adr_i[4] vdd 0.63fF
+C658 wbs_sel_i[3] vdd 0.63fF
+C659 wbs_dat_o[3] vdd 0.63fF
+C660 wbs_dat_i[3] vdd 0.63fF
+C661 wbs_adr_i[3] vdd 0.63fF
+C662 wbs_sel_i[2] vdd 0.63fF
+C663 wbs_dat_o[2] vdd 0.63fF
+C664 wbs_dat_i[2] vdd 0.63fF
+C665 wbs_adr_i[2] vdd 0.63fF
+C666 wbs_sel_i[1] vdd 0.63fF
+C667 wbs_dat_o[1] vdd 0.63fF
+C668 wbs_dat_i[1] vdd 0.63fF
+C669 wbs_adr_i[1] vdd 0.63fF
+C670 wbs_sel_i[0] vdd 0.63fF
+C671 wbs_dat_o[0] vdd 0.63fF
+C672 wbs_dat_i[0] vdd 0.63fF
+C673 wbs_adr_i[0] vdd 0.63fF
+C674 wbs_we_i vdd 0.63fF
+C675 wbs_stb_i vdd 0.63fF
+C676 wbs_cyc_i vdd 0.63fF
+C677 wbs_ack_o vdd 0.63fF
+C678 wb_rst_i vdd 0.63fF
+C679 wb_clk_i vdd 0.63fF
+C680 cp_0/a_7110_n2840# vdd 0.17fF
+C681 cp_0/a_3060_n2840# vdd 1.71fF
+C682 cp_0/down vdd 0.90fF
+C683 cp_0/vbias vdd 2.41fF
+C684 cp_0/a_7110_0# vdd 0.17fF
+C685 cp_0/a_3060_0# vdd 1.65fF
+C686 cp_0/a_1710_0# vdd 5.76fF
+C687 cp_0/upbar vdd 0.88fF
+C688 cp_0/out vdd 5.14fF
+C689 cp_0/a_1710_n2840# vdd 4.85fF
+C690 cp_0/a_10_n50# vdd 2.96fF
+.ends
diff --git a/verilog/rtl/user_analog_proj_example.v b/verilog/rtl/user_analog_proj_example.v
index 164b802..b0858d1 100644
--- a/verilog/rtl/user_analog_proj_example.v
+++ b/verilog/rtl/user_analog_proj_example.v
@@ -134,7 +134,7 @@
     wire [`MPRJ_IO_PADS-`ANALOG_PADS-1:0] io_oeb;
     wire [`ANALOG_PADS-1:0] io_analog;
 
-    wire analog0, analog2, analog3, analog4;
+    wire analog0, analog1, analog2, analog3;
 
     assign io_analog[0] = analog0;
     assign io_analog[1] = analog1;
@@ -147,8 +147,8 @@
             .gnd(vssa1),
         `endif
         .out(analog0),
-        .upbar(analog1),
-        .down(analog2),
+        .down(analog1),
+        .upar(analog2),
         .vbias(analog3)
     );