blob: f1c64937ff2232e3dc7d138500ab6f67590a9f64 [file] [log] [blame]
* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A
.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+ wbs_stb_i wbs_we_i
C0 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
C1 gnd divider_0/and_0/B 0.45fF
C2 divider_0/nor_1/Z1 gnd 0.01fF
C3 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
C4 divider_0/nor_1/B divider_0/nor_0/B 0.47fF
C5 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
C6 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
C7 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
C8 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF
C9 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
C10 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
C11 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
C12 divider_0/prescaler_0/tspc_0/a_740_n680# gnd 0.22fF
C13 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
C14 gnd divider_0/tspc_2/Z4 0.44fF
C15 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF
C16 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
C17 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
C18 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C19 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
C20 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF
C21 io_clamp_high[1] io_analog[5] 0.53fF
C22 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
C23 cp_1/a_10_n50# cp_1/a_1710_0# 0.04fF
C24 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
C25 divider_0/tspc_0/a_630_n680# gnd 0.62fF
C26 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
C27 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
C28 ro_complete_0/a0 ro_complete_0/cbank_0/switch_4/vin 0.13fF
C29 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
C30 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF
C31 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF
C32 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
C33 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
C34 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C35 divider_0/tspc_0/Z4 gnd 0.44fF
C36 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z1 1.07fF
C37 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
C38 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF
C39 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
C40 divider_0/prescaler_0/tspc_1/Z2 gnd 0.17fF
C41 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
C42 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
C43 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
C44 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C45 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
C46 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
C47 divider_0/and_0/OUT gnd 0.28fF
C48 divider_0/prescaler_0/tspc_0/a_630_n680# gnd 0.61fF
C49 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
C50 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF
C51 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
C52 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
C53 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
C54 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF
C55 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
C56 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
C57 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
C58 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
C59 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
C60 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
C61 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
C62 io_clamp_low[0] io_analog[4] 0.53fF
C63 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
C64 pd_0/DOWN pd_0/R 0.36fF
C65 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
C66 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF
C67 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF
C68 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
C69 divider_0/nor_1/B divider_0/and_0/A 0.26fF
C70 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF
C71 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
C72 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
C73 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
C74 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_0/vin 1.30fF
C75 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
C76 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
C77 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF
C78 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF
C79 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
C80 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
C81 cp_1/a_1710_0# cp_1/out 0.84fF
C82 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
C83 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF
C84 divider_0/prescaler_0/tspc_0/D gnd 0.05fF
C85 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
C86 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
C87 gnd divider_0/and_0/out1 0.23fF
C88 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
C89 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
C90 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF
C91 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C92 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
C93 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
C94 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
C95 io_clamp_low[2] io_clamp_high[2] 0.53fF
C96 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF
C97 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF
C98 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF
C99 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
C100 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF
C101 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
C102 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
C103 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
C104 gnd divider_0/tspc_2/a_630_n680# 0.61fF
C105 divider_0/nor_1/A divider_0/and_0/A 0.01fF
C106 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
C107 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
C108 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
C109 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
C110 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF
C111 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
C112 divider_0/nor_0/B divider_0/and_0/B 0.29fF
C113 divider_0/prescaler_0/tspc_1/Z3 gnd 0.27fF
C114 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C115 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
C116 cp_1/a_1710_0# cp_1/down 0.32fF
C117 divider_0/mc2 divider_0/nor_1/B 0.06fF
C118 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
C119 divider_0/prescaler_0/nand_0/z1 gnd 0.16fF
C120 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF
C121 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
C122 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
C123 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
C124 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
C125 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF
C126 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
C127 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF
C128 gnd divider_0/clk 0.07fF
C129 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
C130 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
C131 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
C132 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF
C133 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
C134 divider_0/prescaler_0/tspc_2/Z3 gnd 0.27fF
C135 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
C136 pd_0/R pd_0/UP 0.45fF
C137 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF
C138 divider_0/and_0/OUT divider_0/clk 0.04fF
C139 gnd divider_0/nor_0/B 1.08fF
C140 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
C141 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
C142 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF
C143 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
C144 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF
C145 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
C146 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
C147 divider_0/prescaler_0/tspc_1/Z4 gnd 0.44fF
C148 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
C149 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF
C150 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
C151 divider_0/prescaler_0/tspc_1/Q gnd 0.83fF
C152 divider_0/mc2 divider_0/nor_1/A 0.04fF
C153 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
C154 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
C155 divider_0/tspc_2/Z3 divider_0/Out 0.05fF
C156 gnd divider_0/tspc_0/Z3 0.27fF
C157 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF
C158 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C159 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
C160 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF
C161 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
C162 divider_0/and_0/A divider_0/and_0/B 0.18fF
C163 io_clamp_low[1] io_clamp_high[1] 0.53fF
C164 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF
C165 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF
C166 divider_0/prescaler_0/tspc_2/Z4 gnd 0.44fF
C167 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF
C168 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
C169 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF
C170 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF
C171 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF
C172 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
C173 gnd divider_0/tspc_2/Z2 0.16fF
C174 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF
C175 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
C176 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
C177 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
C178 io_clamp_high[2] io_analog[6] 0.53fF
C179 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
C180 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
C181 divider_0/tspc_1/Z3 gnd 0.27fF
C182 divider_0/prescaler_0/tspc_0/Q gnd 0.35fF
C183 divider_0/prescaler_0/tspc_0/Z3 gnd 0.27fF
C184 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
C185 gnd divider_0/and_0/A 0.53fF
C186 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
C187 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF
C188 cp_1/a_10_n50# cp_1/vbias 0.19fF
C189 cp_1/a_1710_n2840# cp_1/out 0.61fF
C190 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
C191 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF
C192 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
C193 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
C194 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_5/vin 1.30fF
C195 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
C196 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
C197 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF
C198 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
C199 gnd divider_0/Out 0.29fF
C200 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF
C201 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
C202 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
C203 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
C204 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
C205 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF
C206 ro_complete_0/a4 ro_complete_0/cbank_0/switch_0/vin 0.12fF
C207 io_clamp_low[1] io_analog[5] 0.53fF
C208 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
C209 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
C210 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF
C211 divider_0/prescaler_0/tspc_2/a_740_n680# gnd 0.22fF
C212 divider_0/mc2 divider_0/and_0/B 0.20fF
C213 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF
C214 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF
C215 divider_0/prescaler_0/tspc_2/D gnd 0.05fF
C216 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF
C217 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
C218 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
C219 pd_0/R pd_0/and_pd_0/Z1 0.02fF
C220 divider_0/tspc_0/Q gnd 0.33fF
C221 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C222 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
C223 divider_0/nor_1/B divider_0/nor_1/A 1.21fF
C224 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
C225 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
C226 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
C227 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
C228 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
C229 io_clamp_low[0] io_clamp_high[0] 0.53fF
C230 ro_complete_0/a0 ro_complete_0/cbank_0/switch_5/vin 0.09fF
C231 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
C232 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
C233 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
C234 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF
C235 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
C236 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_0/vin 0.19fF
C237 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
C238 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
C239 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
C240 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF
C241 io_analog[2] io_analog[1] 0.02fF
C242 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
C243 divider_0/mc2 gnd 1.36fF
C244 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
C245 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
C246 cp_1/a_1710_n2840# cp_1/a_1710_0# 0.83fF
C247 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
C248 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
C249 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF
C250 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
C251 divider_0/prescaler_0/tspc_2/a_630_n680# gnd 0.63fF
C252 pd_0/DOWN pd_0/UP 0.46fF
C253 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
C254 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
C255 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
C256 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
C257 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
C258 cp_1/upbar cp_1/down 0.02fF
C259 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF
C260 gnd divider_0/prescaler_0/nand_1/z1 0.16fF
C261 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
C262 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF
C263 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
C264 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
C265 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF
C266 divider_0/mc2 divider_0/and_0/OUT 0.05fF
C267 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF
C268 gnd divider_0/and_0/Z1 0.41fF
C269 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z1 0.06fF
C270 io_analog[0] io_analog[1] 12.30fF
C271 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
C272 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/mc2 0.33fF
C273 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
C274 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
C275 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF
C276 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
C277 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
C278 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
C279 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
C280 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
C281 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF
C282 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
C283 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF
C284 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF
C285 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF
C286 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF
C287 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF
C288 divider_0/prescaler_0/tspc_0/Z4 gnd 0.44fF
C289 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a2 0.14fF
C290 io_clamp_high[0] io_analog[4] 0.53fF
C291 divider_0/nor_1/B divider_0/and_0/B 0.31fF
C292 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
C293 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF
C294 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
C295 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
C296 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
C297 pd_0/R pd_0/REF 0.61fF
C298 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C299 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF
C300 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
C301 divider_0/tspc_1/a_630_n680# gnd 0.62fF
C302 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
C303 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
C304 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF
C305 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF
C306 divider_0/mc2 divider_0/and_0/out1 0.06fF
C307 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
C308 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF
C309 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF
C310 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF
C311 cp_0/a_1710_0# io_analog[0] 0.84fF
C312 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF
C313 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
C314 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
C315 divider_0/nor_0/B divider_0/Out 0.22fF
C316 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF
C317 gnd divider_0/prescaler_0/Out 0.46fF
C318 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
C319 cp_0/a_10_n50# io_analog[3] 0.22fF
C320 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
C321 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF
C322 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
C323 divider_0/nor_1/B gnd 1.10fF
C324 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
C325 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
C326 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF
C327 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF
C328 divider_0/prescaler_0/tspc_2/Z2 gnd 0.16fF
C329 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
C330 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF
C331 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF
C332 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
C333 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
C334 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
C335 divider_0/nor_1/A divider_0/and_0/B 0.08fF
C336 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
C337 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
C338 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C339 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
C340 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
C341 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
C342 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF
C343 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_2/vin 1.30fF
C344 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF
C345 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
C346 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF
C347 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF
C348 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
C349 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF
C350 cp_0/a_1710_0# io_analog[1] 0.32fF
C351 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
C352 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
C353 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
C354 gnd divider_0/tspc_0/Z2 0.16fF
C355 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF
C356 divider_0/tspc_0/Q divider_0/tspc_0/Z3 0.05fF
C357 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF
C358 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF
C359 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
C360 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
C361 divider_0/prescaler_0/m1_2700_2190# gnd 0.22fF
C362 divider_0/mc2 divider_0/nor_0/B 0.15fF
C363 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF
C364 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF
C365 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
C366 divider_0/nor_1/A gnd 1.02fF
C367 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
C368 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
C369 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
C370 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF
C371 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
C372 io_clamp_low[2] io_analog[6] 0.53fF
C373 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
C374 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
C375 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
C376 divider_0/tspc_1/Z2 gnd 0.16fF
C377 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
C378 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
C379 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
C380 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF
C381 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
C382 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF
C383 divider_0/prescaler_0/tspc_0/Z2 gnd 0.16fF
C384 pd_0/R pd_0/and_pd_0/Out1 0.33fF
C385 divider_0/nor_0/Z1 gnd 0.01fF
C386 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
C387 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
C388 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
C389 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
C390 divider_0/prescaler_0/tspc_1/a_630_n680# gnd 0.61fF
C391 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF
C392 cp_1/a_1710_n2840# cp_1/upbar 0.29fF
C393 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF
C394 divider_0/tspc_1/Z4 gnd 0.44fF
C395 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF
C396 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF
C397 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
C398 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
C399 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
C400 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
C401 gnd divider_0/tspc_2/Z3 0.27fF
C402 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
C403 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
C404 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF
C405 divider_0/prescaler_0/Out divider_0/clk 0.51fF
C406 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF
C407 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C408 pd_0/DIV pd_0/R 0.51fF
C409 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/a5 0.09fF
C410 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_4/vin 1.30fF
C411 divider_0/mc2 divider_0/and_0/A 0.16fF
C412 divider_0/tspc_1/Q gnd 0.33fF
C413 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF
C414 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF
C415 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF
C416 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
Xpd_0 VDD vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
Xcp_0 io_analog[3] vdda1 vssa1 io_analog[0] io_analog[1] io_analog[2] cp
Xcp_1 cp_1/vbias vdd vssa1 cp_1/out cp_1/down cp_1/upbar cp
Xfilter_0 vssa1 filter
Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4
+ ro_complete_0/a3 ro_complete_0/a2 ro_complete
Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider
C417 io_analog[4] vdda1 25.05fF
C418 io_analog[5] vdda1 25.05fF
C419 io_analog[6] vdda1 25.05fF
C420 io_in_3v3[0] vdda1 0.61fF
C421 io_oeb[26] vdda1 0.61fF
C422 io_in[0] vdda1 0.61fF
C423 io_out[26] vdda1 0.61fF
C424 io_out[0] vdda1 0.61fF
C425 io_in[26] vdda1 0.61fF
C426 io_oeb[0] vdda1 0.61fF
C427 io_in_3v3[26] vdda1 0.61fF
C428 io_in_3v3[1] vdda1 0.61fF
C429 io_oeb[25] vdda1 0.61fF
C430 io_in[1] vdda1 0.61fF
C431 io_out[25] vdda1 0.61fF
C432 io_out[1] vdda1 0.61fF
C433 io_in[25] vdda1 0.61fF
C434 io_oeb[1] vdda1 0.61fF
C435 io_in_3v3[25] vdda1 0.61fF
C436 io_in_3v3[2] vdda1 0.61fF
C437 io_oeb[24] vdda1 0.61fF
C438 io_in[2] vdda1 0.61fF
C439 io_out[24] vdda1 0.61fF
C440 io_out[2] vdda1 0.61fF
C441 io_in[24] vdda1 0.61fF
C442 io_oeb[2] vdda1 0.61fF
C443 io_in_3v3[24] vdda1 0.61fF
C444 io_in_3v3[3] vdda1 0.61fF
C445 gpio_noesd[17] vdda1 0.61fF
C446 io_in[3] vdda1 0.61fF
C447 gpio_analog[17] vdda1 0.61fF
C448 io_out[3] vdda1 0.61fF
C449 io_oeb[3] vdda1 0.61fF
C450 io_in_3v3[4] vdda1 0.61fF
C451 io_in[4] vdda1 0.61fF
C452 io_out[4] vdda1 0.61fF
C453 io_oeb[4] vdda1 0.61fF
C454 io_oeb[23] vdda1 0.61fF
C455 io_out[23] vdda1 0.61fF
C456 io_in[23] vdda1 0.61fF
C457 io_in_3v3[23] vdda1 0.61fF
C458 gpio_noesd[16] vdda1 0.61fF
C459 gpio_analog[16] vdda1 0.61fF
C460 io_in_3v3[5] vdda1 0.61fF
C461 io_in[5] vdda1 0.61fF
C462 io_out[5] vdda1 0.61fF
C463 io_oeb[5] vdda1 0.61fF
C464 io_oeb[22] vdda1 0.61fF
C465 io_out[22] vdda1 0.61fF
C466 io_in[22] vdda1 0.61fF
C467 io_in_3v3[22] vdda1 0.61fF
C468 gpio_noesd[15] vdda1 0.61fF
C469 gpio_analog[15] vdda1 0.61fF
C470 io_in_3v3[6] vdda1 0.61fF
C471 io_in[6] vdda1 0.61fF
C472 io_out[6] vdda1 0.61fF
C473 io_oeb[6] vdda1 0.61fF
C474 io_oeb[21] vdda1 0.61fF
C475 io_out[21] vdda1 0.61fF
C476 io_in[21] vdda1 0.61fF
C477 io_in_3v3[21] vdda1 0.61fF
C478 gpio_noesd[14] vdda1 0.61fF
C479 gpio_analog[14] vdda1 0.61fF
C480 vssd2 vdda1 13.04fF
C481 vssd1 vdda1 13.04fF
C482 vdda2 vdda1 13.04fF
C483 io_oeb[20] vdda1 0.61fF
C484 io_out[20] vdda1 0.61fF
C485 io_in[20] vdda1 0.61fF
C486 io_in_3v3[20] vdda1 0.61fF
C487 gpio_noesd[13] vdda1 0.61fF
C488 gpio_analog[13] vdda1 0.61fF
C489 gpio_analog[0] vdda1 0.61fF
C490 gpio_noesd[0] vdda1 0.61fF
C491 io_in_3v3[7] vdda1 0.61fF
C492 io_in[7] vdda1 0.61fF
C493 io_out[7] vdda1 0.61fF
C494 io_oeb[7] vdda1 0.61fF
C495 io_oeb[19] vdda1 0.61fF
C496 io_out[19] vdda1 0.61fF
C497 io_in[19] vdda1 0.61fF
C498 io_in_3v3[19] vdda1 0.61fF
C499 gpio_noesd[12] vdda1 0.61fF
C500 gpio_analog[12] vdda1 0.61fF
C501 gpio_analog[1] vdda1 0.61fF
C502 gpio_noesd[1] vdda1 0.61fF
C503 io_in_3v3[8] vdda1 0.61fF
C504 io_in[8] vdda1 0.61fF
C505 io_out[8] vdda1 0.61fF
C506 io_oeb[8] vdda1 0.61fF
C507 io_oeb[18] vdda1 0.61fF
C508 io_out[18] vdda1 0.61fF
C509 io_in[18] vdda1 0.61fF
C510 io_in_3v3[18] vdda1 0.61fF
C511 gpio_noesd[11] vdda1 0.61fF
C512 gpio_analog[11] vdda1 0.61fF
C513 gpio_analog[2] vdda1 0.61fF
C514 gpio_noesd[2] vdda1 0.61fF
C515 io_in_3v3[9] vdda1 0.61fF
C516 io_in[9] vdda1 0.61fF
C517 io_out[9] vdda1 0.61fF
C518 io_oeb[9] vdda1 0.61fF
C519 io_oeb[17] vdda1 0.61fF
C520 io_out[17] vdda1 0.61fF
C521 io_in[17] vdda1 0.61fF
C522 io_in_3v3[17] vdda1 0.61fF
C523 gpio_noesd[10] vdda1 0.61fF
C524 gpio_analog[10] vdda1 0.61fF
C525 gpio_analog[3] vdda1 0.61fF
C526 gpio_noesd[3] vdda1 0.61fF
C527 io_in_3v3[10] vdda1 0.61fF
C528 io_in[10] vdda1 0.61fF
C529 io_out[10] vdda1 0.61fF
C530 io_oeb[10] vdda1 0.61fF
C531 io_oeb[16] vdda1 0.61fF
C532 io_out[16] vdda1 0.61fF
C533 io_in[16] vdda1 0.61fF
C534 io_in_3v3[16] vdda1 0.61fF
C535 gpio_noesd[9] vdda1 0.61fF
C536 gpio_analog[9] vdda1 0.61fF
C537 gpio_analog[4] vdda1 0.61fF
C538 gpio_noesd[4] vdda1 0.61fF
C539 io_in_3v3[11] vdda1 0.61fF
C540 io_in[11] vdda1 0.61fF
C541 io_out[11] vdda1 0.61fF
C542 io_oeb[11] vdda1 0.61fF
C543 io_oeb[15] vdda1 0.61fF
C544 io_out[15] vdda1 0.61fF
C545 io_in[15] vdda1 0.61fF
C546 io_in_3v3[15] vdda1 0.61fF
C547 gpio_noesd[8] vdda1 0.61fF
C548 gpio_analog[8] vdda1 0.61fF
C549 gpio_analog[5] vdda1 0.61fF
C550 gpio_noesd[5] vdda1 0.61fF
C551 io_in_3v3[12] vdda1 0.61fF
C552 io_in[12] vdda1 0.61fF
C553 io_out[12] vdda1 0.61fF
C554 io_oeb[12] vdda1 0.61fF
C555 io_oeb[14] vdda1 0.61fF
C556 io_out[14] vdda1 0.61fF
C557 io_in[14] vdda1 0.61fF
C558 io_in_3v3[14] vdda1 0.61fF
C559 gpio_noesd[7] vdda1 0.61fF
C560 gpio_analog[7] vdda1 0.61fF
C561 vssa2 vdda1 13.04fF
C562 gpio_analog[6] vdda1 0.61fF
C563 gpio_noesd[6] vdda1 0.61fF
C564 io_in_3v3[13] vdda1 0.61fF
C565 io_in[13] vdda1 0.61fF
C566 io_out[13] vdda1 0.61fF
C567 io_oeb[13] vdda1 0.61fF
C568 vccd1 vdda1 13.04fF
C569 vccd2 vdda1 13.04fF
C570 io_analog[10] vdda1 6.83fF
C571 io_clamp_high[0] vdda1 3.58fF
C572 io_clamp_low[0] vdda1 3.58fF
C573 io_clamp_high[1] vdda1 3.58fF
C574 io_clamp_low[1] vdda1 3.58fF
C575 io_clamp_high[2] vdda1 3.58fF
C576 io_clamp_low[2] vdda1 3.58fF
C577 io_analog[7] vdda1 6.83fF
C578 io_analog[8] vdda1 6.83fF
C579 io_analog[9] vdda1 6.83fF
C580 user_irq[2] vdda1 0.63fF
C581 user_irq[1] vdda1 0.63fF
C582 user_irq[0] vdda1 0.63fF
C583 user_clock2 vdda1 0.63fF
C584 la_oenb[127] vdda1 0.63fF
C585 la_data_out[127] vdda1 0.63fF
C586 la_data_in[127] vdda1 0.63fF
C587 la_oenb[126] vdda1 0.63fF
C588 la_data_out[126] vdda1 0.63fF
C589 la_data_in[126] vdda1 0.63fF
C590 la_oenb[125] vdda1 0.63fF
C591 la_data_out[125] vdda1 0.63fF
C592 la_data_in[125] vdda1 0.63fF
C593 la_oenb[124] vdda1 0.63fF
C594 la_data_out[124] vdda1 0.63fF
C595 la_data_in[124] vdda1 0.63fF
C596 la_oenb[123] vdda1 0.63fF
C597 la_data_out[123] vdda1 0.63fF
C598 la_data_in[123] vdda1 0.63fF
C599 la_oenb[122] vdda1 0.63fF
C600 la_data_out[122] vdda1 0.63fF
C601 la_data_in[122] vdda1 0.63fF
C602 la_oenb[121] vdda1 0.63fF
C603 la_data_out[121] vdda1 0.63fF
C604 la_data_in[121] vdda1 0.63fF
C605 la_oenb[120] vdda1 0.63fF
C606 la_data_out[120] vdda1 0.63fF
C607 la_data_in[120] vdda1 0.63fF
C608 la_oenb[119] vdda1 0.63fF
C609 la_data_out[119] vdda1 0.63fF
C610 la_data_in[119] vdda1 0.63fF
C611 la_oenb[118] vdda1 0.63fF
C612 la_data_out[118] vdda1 0.63fF
C613 la_data_in[118] vdda1 0.63fF
C614 la_oenb[117] vdda1 0.63fF
C615 la_data_out[117] vdda1 0.63fF
C616 la_data_in[117] vdda1 0.63fF
C617 la_oenb[116] vdda1 0.63fF
C618 la_data_out[116] vdda1 0.63fF
C619 la_data_in[116] vdda1 0.63fF
C620 la_oenb[115] vdda1 0.63fF
C621 la_data_out[115] vdda1 0.63fF
C622 la_data_in[115] vdda1 0.63fF
C623 la_oenb[114] vdda1 0.63fF
C624 la_data_out[114] vdda1 0.63fF
C625 la_data_in[114] vdda1 0.63fF
C626 la_oenb[113] vdda1 0.63fF
C627 la_data_out[113] vdda1 0.63fF
C628 la_data_in[113] vdda1 0.63fF
C629 la_oenb[112] vdda1 0.63fF
C630 la_data_out[112] vdda1 0.63fF
C631 la_data_in[112] vdda1 0.63fF
C632 la_oenb[111] vdda1 0.63fF
C633 la_data_out[111] vdda1 0.63fF
C634 la_data_in[111] vdda1 0.63fF
C635 la_oenb[110] vdda1 0.63fF
C636 la_data_out[110] vdda1 0.63fF
C637 la_data_in[110] vdda1 0.63fF
C638 la_oenb[109] vdda1 0.63fF
C639 la_data_out[109] vdda1 0.63fF
C640 la_data_in[109] vdda1 0.63fF
C641 la_oenb[108] vdda1 0.63fF
C642 la_data_out[108] vdda1 0.63fF
C643 la_data_in[108] vdda1 0.63fF
C644 la_oenb[107] vdda1 0.63fF
C645 la_data_out[107] vdda1 0.63fF
C646 la_data_in[107] vdda1 0.63fF
C647 la_oenb[106] vdda1 0.63fF
C648 la_data_out[106] vdda1 0.63fF
C649 la_data_in[106] vdda1 0.63fF
C650 la_oenb[105] vdda1 0.63fF
C651 la_data_out[105] vdda1 0.63fF
C652 la_data_in[105] vdda1 0.63fF
C653 la_oenb[104] vdda1 0.63fF
C654 la_data_out[104] vdda1 0.63fF
C655 la_data_in[104] vdda1 0.63fF
C656 la_oenb[103] vdda1 0.63fF
C657 la_data_out[103] vdda1 0.63fF
C658 la_data_in[103] vdda1 0.63fF
C659 la_oenb[102] vdda1 0.63fF
C660 la_data_out[102] vdda1 0.63fF
C661 la_data_in[102] vdda1 0.63fF
C662 la_oenb[101] vdda1 0.63fF
C663 la_data_out[101] vdda1 0.63fF
C664 la_data_in[101] vdda1 0.63fF
C665 la_oenb[100] vdda1 0.63fF
C666 la_data_out[100] vdda1 0.63fF
C667 la_data_in[100] vdda1 0.63fF
C668 la_oenb[99] vdda1 0.63fF
C669 la_data_out[99] vdda1 0.63fF
C670 la_data_in[99] vdda1 0.63fF
C671 la_oenb[98] vdda1 0.63fF
C672 la_data_out[98] vdda1 0.63fF
C673 la_data_in[98] vdda1 0.63fF
C674 la_oenb[97] vdda1 0.63fF
C675 la_data_out[97] vdda1 0.63fF
C676 la_data_in[97] vdda1 0.63fF
C677 la_oenb[96] vdda1 0.63fF
C678 la_data_out[96] vdda1 0.63fF
C679 la_data_in[96] vdda1 0.63fF
C680 la_oenb[95] vdda1 0.63fF
C681 la_data_out[95] vdda1 0.63fF
C682 la_data_in[95] vdda1 0.63fF
C683 la_oenb[94] vdda1 0.63fF
C684 la_data_out[94] vdda1 0.63fF
C685 la_data_in[94] vdda1 0.63fF
C686 la_oenb[93] vdda1 0.63fF
C687 la_data_out[93] vdda1 0.63fF
C688 la_data_in[93] vdda1 0.63fF
C689 la_oenb[92] vdda1 0.63fF
C690 la_data_out[92] vdda1 0.63fF
C691 la_data_in[92] vdda1 0.63fF
C692 la_oenb[91] vdda1 0.63fF
C693 la_data_out[91] vdda1 0.63fF
C694 la_data_in[91] vdda1 0.63fF
C695 la_oenb[90] vdda1 0.63fF
C696 la_data_out[90] vdda1 0.63fF
C697 la_data_in[90] vdda1 0.63fF
C698 la_oenb[89] vdda1 0.63fF
C699 la_data_out[89] vdda1 0.63fF
C700 la_data_in[89] vdda1 0.63fF
C701 la_oenb[88] vdda1 0.63fF
C702 la_data_out[88] vdda1 0.63fF
C703 la_data_in[88] vdda1 0.63fF
C704 la_oenb[87] vdda1 0.63fF
C705 la_data_out[87] vdda1 0.63fF
C706 la_data_in[87] vdda1 0.63fF
C707 la_oenb[86] vdda1 0.63fF
C708 la_data_out[86] vdda1 0.63fF
C709 la_data_in[86] vdda1 0.63fF
C710 la_oenb[85] vdda1 0.63fF
C711 la_data_out[85] vdda1 0.63fF
C712 la_data_in[85] vdda1 0.63fF
C713 la_oenb[84] vdda1 0.63fF
C714 la_data_out[84] vdda1 0.63fF
C715 la_data_in[84] vdda1 0.63fF
C716 la_oenb[83] vdda1 0.63fF
C717 la_data_out[83] vdda1 0.63fF
C718 la_data_in[83] vdda1 0.63fF
C719 la_oenb[82] vdda1 0.63fF
C720 la_data_out[82] vdda1 0.63fF
C721 la_data_in[82] vdda1 0.63fF
C722 la_oenb[81] vdda1 0.63fF
C723 la_data_out[81] vdda1 0.63fF
C724 la_data_in[81] vdda1 0.63fF
C725 la_oenb[80] vdda1 0.63fF
C726 la_data_out[80] vdda1 0.63fF
C727 la_data_in[80] vdda1 0.63fF
C728 la_oenb[79] vdda1 0.63fF
C729 la_data_out[79] vdda1 0.63fF
C730 la_data_in[79] vdda1 0.63fF
C731 la_oenb[78] vdda1 0.63fF
C732 la_data_out[78] vdda1 0.63fF
C733 la_data_in[78] vdda1 0.63fF
C734 la_oenb[77] vdda1 0.63fF
C735 la_data_out[77] vdda1 0.63fF
C736 la_data_in[77] vdda1 0.63fF
C737 la_oenb[76] vdda1 0.63fF
C738 la_data_out[76] vdda1 0.63fF
C739 la_data_in[76] vdda1 0.63fF
C740 la_oenb[75] vdda1 0.63fF
C741 la_data_out[75] vdda1 0.63fF
C742 la_data_in[75] vdda1 0.63fF
C743 la_oenb[74] vdda1 0.63fF
C744 la_data_out[74] vdda1 0.63fF
C745 la_data_in[74] vdda1 0.63fF
C746 la_oenb[73] vdda1 0.63fF
C747 la_data_out[73] vdda1 0.63fF
C748 la_data_in[73] vdda1 0.63fF
C749 la_oenb[72] vdda1 0.63fF
C750 la_data_out[72] vdda1 0.63fF
C751 la_data_in[72] vdda1 0.63fF
C752 la_oenb[71] vdda1 0.63fF
C753 la_data_out[71] vdda1 0.63fF
C754 la_data_in[71] vdda1 0.63fF
C755 la_oenb[70] vdda1 0.63fF
C756 la_data_out[70] vdda1 0.63fF
C757 la_data_in[70] vdda1 0.63fF
C758 la_oenb[69] vdda1 0.63fF
C759 la_data_out[69] vdda1 0.63fF
C760 la_data_in[69] vdda1 0.63fF
C761 la_oenb[68] vdda1 0.63fF
C762 la_data_out[68] vdda1 0.63fF
C763 la_data_in[68] vdda1 0.63fF
C764 la_oenb[67] vdda1 0.63fF
C765 la_data_out[67] vdda1 0.63fF
C766 la_data_in[67] vdda1 0.63fF
C767 la_oenb[66] vdda1 0.63fF
C768 la_data_out[66] vdda1 0.63fF
C769 la_data_in[66] vdda1 0.63fF
C770 la_oenb[65] vdda1 0.63fF
C771 la_data_out[65] vdda1 0.63fF
C772 la_data_in[65] vdda1 0.63fF
C773 la_oenb[64] vdda1 0.63fF
C774 la_data_out[64] vdda1 0.63fF
C775 la_data_in[64] vdda1 0.63fF
C776 la_oenb[63] vdda1 0.63fF
C777 la_data_out[63] vdda1 0.63fF
C778 la_data_in[63] vdda1 0.63fF
C779 la_oenb[62] vdda1 0.63fF
C780 la_data_out[62] vdda1 0.63fF
C781 la_data_in[62] vdda1 0.63fF
C782 la_oenb[61] vdda1 0.63fF
C783 la_data_out[61] vdda1 0.63fF
C784 la_data_in[61] vdda1 0.63fF
C785 la_oenb[60] vdda1 0.63fF
C786 la_data_out[60] vdda1 0.63fF
C787 la_data_in[60] vdda1 0.63fF
C788 la_oenb[59] vdda1 0.63fF
C789 la_data_out[59] vdda1 0.63fF
C790 la_data_in[59] vdda1 0.63fF
C791 la_oenb[58] vdda1 0.63fF
C792 la_data_out[58] vdda1 0.63fF
C793 la_data_in[58] vdda1 0.63fF
C794 la_oenb[57] vdda1 0.63fF
C795 la_data_out[57] vdda1 0.63fF
C796 la_data_in[57] vdda1 0.63fF
C797 la_oenb[56] vdda1 0.63fF
C798 la_data_out[56] vdda1 0.63fF
C799 la_data_in[56] vdda1 0.63fF
C800 la_oenb[55] vdda1 0.63fF
C801 la_data_out[55] vdda1 0.63fF
C802 la_data_in[55] vdda1 0.63fF
C803 la_oenb[54] vdda1 0.63fF
C804 la_data_out[54] vdda1 0.63fF
C805 la_data_in[54] vdda1 0.63fF
C806 la_oenb[53] vdda1 0.63fF
C807 la_data_out[53] vdda1 0.63fF
C808 la_data_in[53] vdda1 0.63fF
C809 la_oenb[52] vdda1 0.63fF
C810 la_data_out[52] vdda1 0.63fF
C811 la_data_in[52] vdda1 0.63fF
C812 la_oenb[51] vdda1 0.63fF
C813 la_data_out[51] vdda1 0.63fF
C814 la_data_in[51] vdda1 0.63fF
C815 la_oenb[50] vdda1 0.63fF
C816 la_data_out[50] vdda1 0.63fF
C817 la_data_in[50] vdda1 0.63fF
C818 la_oenb[49] vdda1 0.63fF
C819 la_data_out[49] vdda1 0.63fF
C820 la_data_in[49] vdda1 0.63fF
C821 la_oenb[48] vdda1 0.63fF
C822 la_data_out[48] vdda1 0.63fF
C823 la_data_in[48] vdda1 0.63fF
C824 la_oenb[47] vdda1 0.63fF
C825 la_data_out[47] vdda1 0.63fF
C826 la_data_in[47] vdda1 0.63fF
C827 la_oenb[46] vdda1 0.63fF
C828 la_data_out[46] vdda1 0.63fF
C829 la_data_in[46] vdda1 0.63fF
C830 la_oenb[45] vdda1 0.63fF
C831 la_data_out[45] vdda1 0.63fF
C832 la_data_in[45] vdda1 0.63fF
C833 la_oenb[44] vdda1 0.63fF
C834 la_data_out[44] vdda1 0.63fF
C835 la_data_in[44] vdda1 0.63fF
C836 la_oenb[43] vdda1 0.63fF
C837 la_data_out[43] vdda1 0.63fF
C838 la_data_in[43] vdda1 0.63fF
C839 la_oenb[42] vdda1 0.63fF
C840 la_data_out[42] vdda1 0.63fF
C841 la_data_in[42] vdda1 0.63fF
C842 la_oenb[41] vdda1 0.63fF
C843 la_data_out[41] vdda1 0.63fF
C844 la_data_in[41] vdda1 0.63fF
C845 la_oenb[40] vdda1 0.63fF
C846 la_data_out[40] vdda1 0.63fF
C847 la_data_in[40] vdda1 0.63fF
C848 la_oenb[39] vdda1 0.63fF
C849 la_data_out[39] vdda1 0.63fF
C850 la_data_in[39] vdda1 0.63fF
C851 la_oenb[38] vdda1 0.63fF
C852 la_data_out[38] vdda1 0.63fF
C853 la_data_in[38] vdda1 0.63fF
C854 la_oenb[37] vdda1 0.63fF
C855 la_data_out[37] vdda1 0.63fF
C856 la_data_in[37] vdda1 0.63fF
C857 la_oenb[36] vdda1 0.63fF
C858 la_data_out[36] vdda1 0.63fF
C859 la_data_in[36] vdda1 0.63fF
C860 la_oenb[35] vdda1 0.63fF
C861 la_data_out[35] vdda1 0.63fF
C862 la_data_in[35] vdda1 0.63fF
C863 la_oenb[34] vdda1 0.63fF
C864 la_data_out[34] vdda1 0.63fF
C865 la_data_in[34] vdda1 0.63fF
C866 la_oenb[33] vdda1 0.63fF
C867 la_data_out[33] vdda1 0.63fF
C868 la_data_in[33] vdda1 0.63fF
C869 la_oenb[32] vdda1 0.63fF
C870 la_data_out[32] vdda1 0.63fF
C871 la_data_in[32] vdda1 0.63fF
C872 la_oenb[31] vdda1 0.63fF
C873 la_data_out[31] vdda1 0.63fF
C874 la_data_in[31] vdda1 0.63fF
C875 la_oenb[30] vdda1 0.63fF
C876 la_data_out[30] vdda1 0.63fF
C877 la_data_in[30] vdda1 0.63fF
C878 la_oenb[29] vdda1 0.63fF
C879 la_data_out[29] vdda1 0.63fF
C880 la_data_in[29] vdda1 0.63fF
C881 la_oenb[28] vdda1 0.63fF
C882 la_data_out[28] vdda1 0.63fF
C883 la_data_in[28] vdda1 0.63fF
C884 la_oenb[27] vdda1 0.63fF
C885 la_data_out[27] vdda1 0.63fF
C886 la_data_in[27] vdda1 0.63fF
C887 la_oenb[26] vdda1 0.63fF
C888 la_data_out[26] vdda1 0.63fF
C889 la_data_in[26] vdda1 0.63fF
C890 la_oenb[25] vdda1 0.63fF
C891 la_data_out[25] vdda1 0.63fF
C892 la_data_in[25] vdda1 0.63fF
C893 la_oenb[24] vdda1 0.63fF
C894 la_data_out[24] vdda1 0.63fF
C895 la_data_in[24] vdda1 0.63fF
C896 la_oenb[23] vdda1 0.63fF
C897 la_data_out[23] vdda1 0.63fF
C898 la_data_in[23] vdda1 0.63fF
C899 la_oenb[22] vdda1 0.63fF
C900 la_data_out[22] vdda1 0.63fF
C901 la_data_in[22] vdda1 0.63fF
C902 la_oenb[21] vdda1 0.63fF
C903 la_data_out[21] vdda1 0.63fF
C904 la_data_in[21] vdda1 0.63fF
C905 la_oenb[20] vdda1 0.63fF
C906 la_data_out[20] vdda1 0.63fF
C907 la_data_in[20] vdda1 0.63fF
C908 la_oenb[19] vdda1 0.63fF
C909 la_data_out[19] vdda1 0.63fF
C910 la_data_in[19] vdda1 0.63fF
C911 la_oenb[18] vdda1 0.63fF
C912 la_data_out[18] vdda1 0.63fF
C913 la_data_in[18] vdda1 0.63fF
C914 la_oenb[17] vdda1 0.63fF
C915 la_data_out[17] vdda1 0.63fF
C916 la_data_in[17] vdda1 0.63fF
C917 la_oenb[16] vdda1 0.63fF
C918 la_data_out[16] vdda1 0.63fF
C919 la_data_in[16] vdda1 0.63fF
C920 la_oenb[15] vdda1 0.63fF
C921 la_data_out[15] vdda1 0.63fF
C922 la_data_in[15] vdda1 0.63fF
C923 la_oenb[14] vdda1 0.63fF
C924 la_data_out[14] vdda1 0.63fF
C925 la_data_in[14] vdda1 0.63fF
C926 la_oenb[13] vdda1 0.63fF
C927 la_data_out[13] vdda1 0.63fF
C928 la_data_in[13] vdda1 0.63fF
C929 la_oenb[12] vdda1 0.63fF
C930 la_data_out[12] vdda1 0.63fF
C931 la_data_in[12] vdda1 0.63fF
C932 la_oenb[11] vdda1 0.63fF
C933 la_data_out[11] vdda1 0.63fF
C934 la_data_in[11] vdda1 0.63fF
C935 la_oenb[10] vdda1 0.63fF
C936 la_data_out[10] vdda1 0.63fF
C937 la_data_in[10] vdda1 0.63fF
C938 la_oenb[9] vdda1 0.63fF
C939 la_data_out[9] vdda1 0.63fF
C940 la_data_in[9] vdda1 0.63fF
C941 la_oenb[8] vdda1 0.63fF
C942 la_data_out[8] vdda1 0.63fF
C943 la_data_in[8] vdda1 0.63fF
C944 la_oenb[7] vdda1 0.63fF
C945 la_data_out[7] vdda1 0.63fF
C946 la_data_in[7] vdda1 0.63fF
C947 la_oenb[6] vdda1 0.63fF
C948 la_data_out[6] vdda1 0.63fF
C949 la_data_in[6] vdda1 0.63fF
C950 la_oenb[5] vdda1 0.63fF
C951 la_data_out[5] vdda1 0.63fF
C952 la_data_in[5] vdda1 0.63fF
C953 la_oenb[4] vdda1 0.63fF
C954 la_data_out[4] vdda1 0.63fF
C955 la_data_in[4] vdda1 0.63fF
C956 la_oenb[3] vdda1 0.63fF
C957 la_data_out[3] vdda1 0.63fF
C958 la_data_in[3] vdda1 0.63fF
C959 la_oenb[2] vdda1 0.63fF
C960 la_data_out[2] vdda1 0.63fF
C961 la_data_in[2] vdda1 0.63fF
C962 la_oenb[1] vdda1 0.63fF
C963 la_data_out[1] vdda1 0.63fF
C964 la_data_in[1] vdda1 0.63fF
C965 la_oenb[0] vdda1 0.63fF
C966 la_data_out[0] vdda1 0.63fF
C967 la_data_in[0] vdda1 0.63fF
C968 wbs_dat_o[31] vdda1 0.63fF
C969 wbs_dat_i[31] vdda1 0.63fF
C970 wbs_adr_i[31] vdda1 0.63fF
C971 wbs_dat_o[30] vdda1 0.63fF
C972 wbs_dat_i[30] vdda1 0.63fF
C973 wbs_adr_i[30] vdda1 0.63fF
C974 wbs_dat_o[29] vdda1 0.63fF
C975 wbs_dat_i[29] vdda1 0.63fF
C976 wbs_adr_i[29] vdda1 0.63fF
C977 wbs_dat_o[28] vdda1 0.63fF
C978 wbs_dat_i[28] vdda1 0.63fF
C979 wbs_adr_i[28] vdda1 0.63fF
C980 wbs_dat_o[27] vdda1 0.63fF
C981 wbs_dat_i[27] vdda1 0.63fF
C982 wbs_adr_i[27] vdda1 0.63fF
C983 wbs_dat_o[26] vdda1 0.63fF
C984 wbs_dat_i[26] vdda1 0.63fF
C985 wbs_adr_i[26] vdda1 0.63fF
C986 wbs_dat_o[25] vdda1 0.63fF
C987 wbs_dat_i[25] vdda1 0.63fF
C988 wbs_adr_i[25] vdda1 0.63fF
C989 wbs_dat_o[24] vdda1 0.63fF
C990 wbs_dat_i[24] vdda1 0.63fF
C991 wbs_adr_i[24] vdda1 0.63fF
C992 wbs_dat_o[23] vdda1 0.63fF
C993 wbs_dat_i[23] vdda1 0.63fF
C994 wbs_adr_i[23] vdda1 0.63fF
C995 wbs_dat_o[22] vdda1 0.63fF
C996 wbs_dat_i[22] vdda1 0.63fF
C997 wbs_adr_i[22] vdda1 0.63fF
C998 wbs_dat_o[21] vdda1 0.63fF
C999 wbs_dat_i[21] vdda1 0.63fF
C1000 wbs_adr_i[21] vdda1 0.63fF
C1001 wbs_dat_o[20] vdda1 0.63fF
C1002 wbs_dat_i[20] vdda1 0.63fF
C1003 wbs_adr_i[20] vdda1 0.63fF
C1004 wbs_dat_o[19] vdda1 0.63fF
C1005 wbs_dat_i[19] vdda1 0.63fF
C1006 wbs_adr_i[19] vdda1 0.63fF
C1007 wbs_dat_o[18] vdda1 0.63fF
C1008 wbs_dat_i[18] vdda1 0.63fF
C1009 wbs_adr_i[18] vdda1 0.63fF
C1010 wbs_dat_o[17] vdda1 0.63fF
C1011 wbs_dat_i[17] vdda1 0.63fF
C1012 wbs_adr_i[17] vdda1 0.63fF
C1013 wbs_dat_o[16] vdda1 0.63fF
C1014 wbs_dat_i[16] vdda1 0.63fF
C1015 wbs_adr_i[16] vdda1 0.63fF
C1016 wbs_dat_o[15] vdda1 0.63fF
C1017 wbs_dat_i[15] vdda1 0.63fF
C1018 wbs_adr_i[15] vdda1 0.63fF
C1019 wbs_dat_o[14] vdda1 0.63fF
C1020 wbs_dat_i[14] vdda1 0.63fF
C1021 wbs_adr_i[14] vdda1 0.63fF
C1022 wbs_dat_o[13] vdda1 0.63fF
C1023 wbs_dat_i[13] vdda1 0.63fF
C1024 wbs_adr_i[13] vdda1 0.63fF
C1025 wbs_dat_o[12] vdda1 0.63fF
C1026 wbs_dat_i[12] vdda1 0.63fF
C1027 wbs_adr_i[12] vdda1 0.63fF
C1028 wbs_dat_o[11] vdda1 0.63fF
C1029 wbs_dat_i[11] vdda1 0.63fF
C1030 wbs_adr_i[11] vdda1 0.63fF
C1031 wbs_dat_o[10] vdda1 0.63fF
C1032 wbs_dat_i[10] vdda1 0.63fF
C1033 wbs_adr_i[10] vdda1 0.63fF
C1034 wbs_dat_o[9] vdda1 0.63fF
C1035 wbs_dat_i[9] vdda1 0.63fF
C1036 wbs_adr_i[9] vdda1 0.63fF
C1037 wbs_dat_o[8] vdda1 0.63fF
C1038 wbs_dat_i[8] vdda1 0.63fF
C1039 wbs_adr_i[8] vdda1 0.63fF
C1040 wbs_dat_o[7] vdda1 0.63fF
C1041 wbs_dat_i[7] vdda1 0.63fF
C1042 wbs_adr_i[7] vdda1 0.63fF
C1043 wbs_dat_o[6] vdda1 0.63fF
C1044 wbs_dat_i[6] vdda1 0.63fF
C1045 wbs_adr_i[6] vdda1 0.63fF
C1046 wbs_dat_o[5] vdda1 0.63fF
C1047 wbs_dat_i[5] vdda1 0.63fF
C1048 wbs_adr_i[5] vdda1 0.63fF
C1049 wbs_dat_o[4] vdda1 0.63fF
C1050 wbs_dat_i[4] vdda1 0.63fF
C1051 wbs_adr_i[4] vdda1 0.63fF
C1052 wbs_sel_i[3] vdda1 0.63fF
C1053 wbs_dat_o[3] vdda1 0.63fF
C1054 wbs_dat_i[3] vdda1 0.63fF
C1055 wbs_adr_i[3] vdda1 0.63fF
C1056 wbs_sel_i[2] vdda1 0.63fF
C1057 wbs_dat_o[2] vdda1 0.63fF
C1058 wbs_dat_i[2] vdda1 0.63fF
C1059 wbs_adr_i[2] vdda1 0.63fF
C1060 wbs_sel_i[1] vdda1 0.63fF
C1061 wbs_dat_o[1] vdda1 0.63fF
C1062 wbs_dat_i[1] vdda1 0.63fF
C1063 wbs_adr_i[1] vdda1 0.63fF
C1064 wbs_sel_i[0] vdda1 0.63fF
C1065 wbs_dat_o[0] vdda1 0.63fF
C1066 wbs_dat_i[0] vdda1 0.63fF
C1067 wbs_adr_i[0] vdda1 0.63fF
C1068 wbs_we_i vdda1 0.63fF
C1069 wbs_stb_i vdda1 0.63fF
C1070 wbs_cyc_i vdda1 0.63fF
C1071 wbs_ack_o vdda1 0.63fF
C1072 wb_rst_i vdda1 0.63fF
C1073 wb_clk_i vdda1 0.63fF
C1074 divider_0/and_0/Z1 vdda1 0.33fF
C1075 divider_0/and_0/B vdda1 1.79fF
C1076 divider_0/and_0/A vdda1 1.66fF
C1077 divider_0/and_0/out1 vdda1 2.71fF
C1078 divider_0/tspc_2/Z4 vdda1 0.42fF
C1079 divider_0/Out vdda1 1.31fF
C1080 divider_0/tspc_2/Z3 vdda1 2.00fF
C1081 divider_0/tspc_2/Z2 vdda1 1.29fF
C1082 divider_0/tspc_2/Z1 vdda1 0.99fF
C1083 divider_0/nor_0/B vdda1 5.25fF
C1084 divider_0/tspc_2/a_630_n680# vdda1 0.53fF **FLOATING
C1085 divider_0/tspc_1/Z4 vdda1 0.42fF
C1086 divider_0/tspc_1/Q vdda1 2.79fF
C1087 divider_0/tspc_1/Z3 vdda1 2.00fF
C1088 divider_0/tspc_1/Z2 vdda1 1.29fF
C1089 divider_0/tspc_1/Z1 vdda1 0.99fF
C1090 divider_0/nor_1/B vdda1 5.95fF
C1091 divider_0/tspc_1/a_630_n680# vdda1 0.53fF **FLOATING
C1092 divider_0/tspc_0/Z4 vdda1 0.42fF
C1093 divider_0/tspc_0/Q vdda1 2.81fF
C1094 divider_0/tspc_0/Z3 vdda1 2.00fF
C1095 divider_0/tspc_0/Z2 vdda1 1.30fF
C1096 divider_0/tspc_0/Z1 vdda1 0.99fF
C1097 divider_0/nor_1/A vdda1 6.02fF
C1098 divider_0/tspc_0/a_630_n680# vdda1 0.53fF **FLOATING
C1099 divider_0/clk vdda1 5.56fF
C1100 divider_0/prescaler_0/Out vdda1 4.13fF
C1101 divider_0/prescaler_0/nand_1/z1 vdda1 0.20fF
C1102 gnd vdda1 21.94fF
C1103 divider_0/prescaler_0/tspc_2/D vdda1 2.59fF
C1104 divider_0/prescaler_0/tspc_0/Q vdda1 3.30fF
C1105 divider_0/prescaler_0/tspc_1/Q vdda1 2.78fF
C1106 divider_0/prescaler_0/nand_0/z1 vdda1 0.20fF
C1107 divider_0/prescaler_0/tspc_0/D vdda1 3.07fF
C1108 divider_0/and_0/OUT vdda1 5.35fF
C1109 divider_0/prescaler_0/tspc_2/Z4 vdda1 0.42fF
C1110 divider_0/prescaler_0/tspc_2/Z3 vdda1 2.00fF
C1111 divider_0/prescaler_0/tspc_2/Z2 vdda1 1.30fF
C1112 divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF
C1113 divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 0.53fF **FLOATING
C1114 divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 1.89fF **FLOATING
C1115 divider_0/prescaler_0/tspc_1/Z4 vdda1 0.42fF
C1116 divider_0/prescaler_0/tspc_1/Z3 vdda1 2.00fF
C1117 divider_0/prescaler_0/tspc_1/Z2 vdda1 1.31fF
C1118 divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF
C1119 divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 0.53fF **FLOATING
C1120 divider_0/prescaler_0/m1_2700_2190# vdda1 3.99fF **FLOATING
C1121 divider_0/prescaler_0/tspc_0/Z4 vdda1 0.42fF
C1122 divider_0/prescaler_0/tspc_0/Z3 vdda1 2.00fF
C1123 divider_0/prescaler_0/tspc_0/Z2 vdda1 1.30fF
C1124 divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF
C1125 divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 0.53fF **FLOATING
C1126 divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 1.89fF **FLOATING
C1127 divider_0/nor_1/Z1 vdda1 1.33fF
C1128 divider_0/nor_0/Z1 vdda1 1.33fF
C1129 divider_0/mc2 vdda1 3.93fF
C1130 ro_complete_0/cbank_2/v vdda1 17.84fF
C1131 ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF
C1132 ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF
C1133 ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF
C1134 ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF
C1135 ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF
C1136 ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF
C1137 ro_complete_0/cbank_1/v vdda1 16.11fF
C1138 ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF
C1139 ro_complete_0/a0 vdda1 7.88fF
C1140 ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF
C1141 ro_complete_0/a1 vdda1 5.39fF
C1142 ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF
C1143 ro_complete_0/a3 vdda1 6.85fF
C1144 ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF
C1145 ro_complete_0/a2 vdda1 5.48fF
C1146 ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF
C1147 ro_complete_0/a4 vdda1 5.36fF
C1148 ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF
C1149 ro_complete_0/a5 vdda1 5.19fF
C1150 ro_complete_0/cbank_0/v vdda1 14.98fF
C1151 ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF
C1152 ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF
C1153 ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF
C1154 ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF
C1155 ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF
C1156 ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF
C1157 ro_complete_0/ro_var_extend_0/vcont vdda1 0.57fF
C1158 filter_0/a_3976_n5230# vdda1 415.26fF **FLOATING
C1159 filter_0/a_3976_n2998# vdda1 1.34fF **FLOATING
C1160 cp_1/down vdda1 1.54fF
C1161 cp_1/vbias vdda1 2.41fF
C1162 cp_1/out vdda1 5.26fF
C1163 cp_1/upbar vdda1 1.50fF
C1164 cp_1/a_7110_n2840# vdda1 0.17fF **FLOATING
C1165 cp_1/a_3060_n2840# vdda1 1.71fF **FLOATING
C1166 cp_1/a_7110_0# vdda1 0.17fF **FLOATING
C1167 cp_1/a_6370_0# vdda1 0.40fF **FLOATING
C1168 cp_1/a_3060_0# vdda1 1.65fF **FLOATING
C1169 cp_1/a_1710_0# vdda1 5.76fF **FLOATING
C1170 cp_1/a_1710_n2840# vdda1 4.89fF **FLOATING
C1171 cp_1/a_10_n50# vdda1 2.96fF **FLOATING
C1172 io_analog[1] vdda1 108.63fF
C1173 io_analog[3] vdda1 197.37fF
C1174 io_analog[0] vdda1 74.25fF
C1175 io_analog[2] vdda1 108.15fF
C1176 cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING
C1177 cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING
C1178 cp_0/a_7110_0# vdda1 0.17fF **FLOATING
C1179 cp_0/a_6370_0# vdda1 0.40fF **FLOATING
C1180 cp_0/a_3060_0# vdda1 4.15fF **FLOATING
C1181 cp_0/a_1710_0# vdda1 6.63fF **FLOATING
C1182 cp_0/a_10_n50# vdda1 2.96fF **FLOATING
C1183 pd_0/and_pd_0/Z1 vdda1 0.39fF
C1184 pd_0/and_pd_0/Out1 vdda1 2.22fF
C1185 pd_0/tspc_r_1/z5 vdda1 1.10fF
C1186 pd_0/tspc_r_1/Z4 vdda1 1.07fF
C1187 pd_0/tspc_r_1/Qbar vdda1 0.88fF
C1188 pd_0/tspc_r_1/Z2 vdda1 1.22fF
C1189 pd_0/tspc_r_1/Z1 vdda1 0.67fF
C1190 pd_0/UP vdda1 2.21fF
C1191 pd_0/tspc_r_1/Qbar1 vdda1 1.34fF
C1192 pd_0/tspc_r_1/Z3 vdda1 2.12fF
C1193 pd_0/REF vdda1 1.80fF
C1194 pd_0/tspc_r_0/z5 vdda1 1.10fF
C1195 pd_0/tspc_r_0/Z4 vdda1 1.07fF
C1196 pd_0/R vdda1 3.05fF
C1197 pd_0/tspc_r_0/Qbar vdda1 0.79fF
C1198 pd_0/tspc_r_0/Z2 vdda1 1.22fF
C1199 pd_0/tspc_r_0/Z1 vdda1 0.67fF
C1200 pd_0/DOWN vdda1 3.08fF
C1201 pd_0/tspc_r_0/Qbar1 vdda1 1.34fF
C1202 pd_0/tspc_r_0/Z3 vdda1 2.12fF
C1203 pd_0/DIV vdda1 1.82fF
.ends