timestamp 1640902018
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
use prescaler prescaler_0 1 0 50 0 1 400
use tspc tspc_2 1 0 7280 0 1 990
use tspc tspc_1 1 0 5700 0 1 990
use tspc tspc_0 1 0 4120 0 1 990
use nor nor_1 -1 0 6630 0 -1 3210
use nor nor_0 -1 0 5660 0 -1 3210
use and and_0 -1 0 4660 0 -1 2930
node "m4_7020_30#" 0 79.26 7020 30 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10800 480 0 0 0 0
node "gnd" 0 83.08 5430 30 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11400 500 0 0 0 0
node "gnd" 0 79.08 3830 30 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10800 480 0 0 0 0
node "m4_7030_1860#" 0 89.6 7030 1860 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10800 480 0 0 0 0
node "vdd" 0 78.66 5450 1860 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10800 480 0 0 0 0
node "vdd" 1 312.48 3990 1920 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 58800 1820 0 0 0 0
node "vdd" 0 148 5770 2160 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 22200 860 0 0 0 0
node "vdd" 1 345.66 4700 2160 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 52200 1860 0 0 0 0
node "m4_5770_3730#" 0 163.54 5770 3730 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 22200 860 0 0 0 0
node "m4_4690_3730#" 0 209.38 4690 3730 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 29400 1100 0 0 0 0
node "gnd" 1 377.96 3770 3060 m4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60100 2040 0 0 0 0
node "m2_3910_680#" 1 122.385 3910 680 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8200 580 0 0 0 0 0 0 0 0
node "clk" 0 42.02 -370 860 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2400 200 0 0 0 0 0 0 0 0
node "m1_5770_3360#" 16 1813.54 5770 3360 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 105800 6840 38300 1960 0 0 0 0 0 0 0 0
node "li_7140_680#" 43 3235 7140 680 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 226300 14980 0 0 0 0 0 0 0 0 0 0
node "li_5560_680#" 24 1325.71 5560 680 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 91500 5960 0 0 0 0 0 0 0 0 0 0
node "li_3980_680#" 25 1368.34 3980 680 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 94000 6160 0 0 0 0 0 0 0 0 0 0
node "Out" 32 105.012 8660 820 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6500 360 0 0 0 0 0 0 0 0 0 0 0 0
node "li_7040_820#" 13 214.937 7040 820 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 6400 320 11900 480 0 0 0 0 0 0 0 0
node "li_5460_820#" 13 214.895 5460 820 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 6400 320 11800 480 0 0 0 0 0 0 0 0
node "li_3310_1810#" 314 639.68 3310 1810 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 45100 2240 0 0 0 0 0 0 0 0 0 0 0 0
node "li_5740_3250#" 25 1510.52 5740 3250 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 29300 1740 91000 5420 0 0 0 0 0 0 0 0
node "li_6130_3350#" 19 802.775 6130 3350 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1600 160 55000 3560 0 0 0 0 0 0 0 0 0 0
node "li_4830_3100#" 180 368.33 4830 3100 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23600 1260 0 0 0 0 0 0 0 0 0 0 0 0
node "li_2870_2670#" 482 898.77 2870 2670 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 63200 3240 0 0 0 0 0 0 0 0 0 0 0 0
node "mc2" 155 3420.79 6740 3250 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16400 900 6400 320 225200 14700 0 0 0 0 0 0 0 0
node "w_n140_1520#" 3306 3024 -140 1520 nw 0 0 0 0 1008000 4240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "w_2780_1920#" 30753 19421.4 2780 1920 nw 0 0 0 0 6473800 22840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
cap "vdd" "vdd" 33.5
cap "vdd" "vdd" 51.2353
cap "vdd" "vdd" 20.1
cap "m4_7020_30#" "li_5560_680#" 24.425
cap "li_7140_680#" "m1_5770_3360#" 19.2857
cap "li_5560_680#" "m1_5770_3360#" 16.875
cap "gnd" "li_3980_680#" 24.425
cap "li_5560_680#" "li_7140_680#" 437.5
cap "gnd" "li_3980_680#" 27.1625
cap "li_7040_820#" "m1_5770_3360#" 90
cap "li_3980_680#" "li_5560_680#" 782.5
cap "Out" "li_7140_680#" 23.5
cap "li_7040_820#" "li_5560_680#" 15
cap "w_2780_1920#" "vdd" 8.88
cap "li_5740_3250#" "m1_5770_3360#" 286.375
cap "mc2" "gnd" 27.9
cap "li_5460_820#" "li_3980_680#" 20
cap "li_6130_3350#" "m1_5770_3360#" 136.842
cap "li_5740_3250#" "li_5560_680#" 21.9534
cap "vdd" "li_5740_3250#" 27.9
cap "vdd" "li_3310_1810#" 35.39
cap "li_5740_3250#" "li_3980_680#" 22.5
cap "mc2" "m1_5770_3360#" 35.7143
cap "vdd" "li_5740_3250#" 27.9
cap "mc2" "li_7140_680#" 61.52
cap "li_5740_3250#" "li_5460_820#" 128.305
cap "w_2780_1920#" "m1_5770_3360#" 53.84
cap "m4_7030_1860#" "w_2780_1920#" 1.36
cap "vdd" "w_2780_1920#" 0.84
cap "li_6130_3350#" "li_5740_3250#" 68.1032
cap "vdd" "w_2780_1920#" 9.82
cap "vdd" "w_2780_1920#" 4.08
cap "mc2" "li_5740_3250#" 22.679
cap "w_2780_1920#" "li_3310_1810#" 18.0375
cap "w_2780_1920#" "li_5740_3250#" 72.945
cap "w_2780_1920#" "li_6130_3350#" 7.215
cap "w_2780_1920#" "li_2870_2670#" 50.69
cap "tspc_0/w_n140_n70#" "prescaler_0/GND" 4.08
cap "tspc_0/w_n140_n70#" "prescaler_0/tspc_1/a_740_n680#" 6.63
cap "prescaler_0/tspc_1/a_740_n680#" "tspc_0/D" 4.21875
cap "prescaler_0/tspc_1/Q" "tspc_0/D" 12.6992
cap "prescaler_0/GND" "tspc_0/a_630_n680#" 3.80769
cap "tspc_0/D" "tspc_0/a_630_n680#" 152.917
cap "tspc_0/D" "tspc_0/Z4" 35.0633
cap "tspc_0/D" "prescaler_0/m1_2700_2190#" 4.21875
cap "tspc_0/D" "li_5560_680#" 2.25
cap "tspc_0/D" "prescaler_0/GND" 513.859
cap "tspc_0/D" "tspc_1/a_300_n150#" 7.39286
cap "tspc_0/D" "tspc_0/Z3" 1.36364
cap "tspc_0/D" "tspc_0/Z2" 141.466
cap "tspc_0/a_630_n680#" "li_5560_680#" 2.72727
cap "prescaler_0/tspc_1/Q" "tspc_0/D" 12.6992
cap "tspc_1/D" "tspc_1/a_630_n680#" 95.25
cap "tspc_1/a_300_n150#" "tspc_1/a_n60_n20#" 36.9286
cap "tspc_1/a_300_n150#" "tspc_1/D" 70.641
cap "tspc_1/D" "tspc_0/a_630_n680#" 2.72727
cap "tspc_1/D" "tspc_1/Z4" 33.0938
cap "tspc_0/a_740_n680#" "tspc_1/D" -7.31795
cap "tspc_1/Z2" "tspc_1/GND" 7.81579
cap "tspc_0/a_740_n680#" "tspc_1/Z4" 20.5714
cap "tspc_1/D" "tspc_1/GND" 555.809
cap "tspc_1/a_300_n150#" "tspc_1/Z4" 30.4615
cap "tspc_0/a_740_n680#" "tspc_1/a_300_n150#" 215.64
cap "tspc_0/a_740_n680#" "tspc_0/a_630_n680#" 6.66667
cap "tspc_1/w_n140_n70#" "tspc_1/a_300_n150#" -3.33067e-16
cap "tspc_1/w_n140_n70#" "tspc_0/a_740_n680#" 4.695
cap "tspc_1/D" "tspc_1/Z3" 1.36364
cap "tspc_1/D" "tspc_1/Z2" 213.298
cap "tspc_0/a_740_n680#" "tspc_1/GND" 65.2632
cap "tspc_1/a_300_n150#" "tspc_1/GND" 21.2143
cap "tspc_1/GND" "tspc_0/a_630_n680#" 3.80769
cap "tspc_1/a_300_n150#" "tspc_1/Z2" 25.8231
cap "tspc_0/a_740_n680#" "tspc_1/Z2" 154.016
cap "tspc_1/a_300_n150#" "tspc_1/Z1" 7
cap "tspc_1/a_740_n680#" "tspc_2/a_300_n150#" 230.89
cap "tspc_2/w_n140_n70#" "tspc_1/a_740_n680#" 4.615
cap "tspc_2/Z2" "tspc_2/GND" 7.81579
cap "tspc_2/w_n140_n70#" "tspc_2/a_300_n150#" -3.33067e-16
cap "tspc_2/D" "tspc_1/a_630_n680#" 1.21622
cap "tspc_2/D" "tspc_2/GND" 508.356
cap "tspc_1/a_740_n680#" "tspc_1/a_630_n680#" 63.8571
cap "tspc_1/a_740_n680#" "tspc_2/GND" 118.593
cap "tspc_2/a_300_n150#" "tspc_2/GND" 21.2143
cap "tspc_2/GND" "tspc_1/a_630_n680#" 7.61538
cap "tspc_2/D" "tspc_2/a_630_n680#" 41.25
cap "tspc_2/D" "tspc_2/Z3" 1.36364
cap "tspc_2/D" "tspc_2/Z4" 35.8248
cap "tspc_2/D" "tspc_2/Z2" 309.898
cap "tspc_1/a_740_n680#" "tspc_2/Z4" 21.1765
cap "tspc_1/a_740_n680#" "tspc_2/Z2" 156.315
cap "tspc_2/a_300_n150#" "tspc_2/Z4" 30.4615
cap "tspc_2/a_300_n150#" "tspc_2/Z1" 7
cap "tspc_2/a_300_n150#" "tspc_2/Z2" 25.8231
cap "tspc_2/a_300_n150#" "tspc_2/a_n60_n20#" 36.9286
cap "tspc_1/a_740_n680#" "tspc_2/D" -6.57619
cap "tspc_2/a_300_n150#" "tspc_2/D" 70.641
cap "tspc_2/a_740_n680#" "tspc_2/a_630_n680#" 118.333
cap "tspc_2/a_740_n680#" "tspc_2/GND" 155.113
cap "tspc_2/a_740_n680#" "tspc_2/Q" 20.775
cap "prescaler_0/nand_0/VDD" "prescaler_0/nand_0/a_n20_20#" 9.24
cap "prescaler_0/nand_0/VDD" "prescaler_0/mc1" 23.03
cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/tspc_1/Q" 19.25
cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/GND" 92.731
cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/nand_1/a_280_n230#" 37.52
cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/nand_1/VDD" 16.2475
cap "prescaler_0/nand_1/VDD" "prescaler_0/GND" 16.32
cap "prescaler_0/nand_1/VDD" "prescaler_0/mc1" 21.365
cap "prescaler_0/nand_1/VDD" "prescaler_0/nand_1/a_280_n230#" 40.95
cap "tspc_1/a_n60_n20#" "prescaler_0/m4_2730_1520#" 10.4433
cap "tspc_1/a_n60_n20#" "tspc_1/a_n60_n20#" 0.881579
cap "tspc_1/a_n60_n20#" "prescaler_0/GND" 49.961
cap "tspc_1/a_n60_n20#" "li_5740_3250#" 0.961538
cap "tspc_1/a_n60_n20#" "tspc_1/w_n140_n70#" 9.035
cap "and_0/vdd!" "tspc_0/vdd!" 11
cap "tspc_1/a_n60_n20#" "tspc_0/vdd!" 11.2857
cap "and_0/OUT" "tspc_1/a_n60_n20#" 7.5
cap "tspc_1/a_n60_n20#" "tspc_0/Z2" 10
cap "tspc_1/a_n60_n20#" "li_5740_3250#" 83.7778
cap "nor_1/a_n40_20#" "tspc_1/a_n60_n20#" 432.374
cap "m1_5770_3360#" "tspc_1/w_n140_n70#" -4.42
cap "nor_1/a_n40_20#" "tspc_1/w_n140_n70#" -4.08
cap "tspc_1/a_n60_n20#" "tspc_1/a_300_n150#" 56.8559
cap "tspc_1/a_n60_n20#" "tspc_1/w_n140_n70#" -1.79856e-14
cap "nor_1/A" "m1_5770_3360#" 14.775
cap "nor_1/Z1" "m1_5770_3360#" 170.44
cap "nor_1/B" "m1_5770_3360#" 14.775
cap "nor_1/a_n40_20#" "li_5740_3250#" 93.75
cap "nor_1/a_n40_20#" "m1_5770_3360#" 26.8462
cap "nor_1/Out" "m1_5770_3360#" 85.22
cap "tspc_1/a_740_n680#" "m1_5770_3360#" 2.10938
cap "tspc_2/w_n140_n70#" "m1_5770_3360#" 12.155
cap "tspc_2/a_n60_n20#" "tspc_2/a_300_n150#" 56.8559
cap "nor_1/a_n40_20#" "tspc_2/a_n60_n20#" 31.4366
cap "tspc_2/w_n140_n70#" "tspc_2/a_n60_n20#" -0.52
cap "tspc_2/Z2" "m1_5770_3360#" 45
cap "tspc_1/a_740_n680#" "m1_5770_3360#" 31.3043
cap "tspc_2/a_n60_n20#" "m1_5770_3360#" 59.3707
cap "nor_1/a_n40_20#" "m1_5770_3360#" -166.637
cap "li_7140_680#" "tspc_2/a_740_n680#" 21.8182
cap "li_7140_680#" "tspc_2/a_n60_n20#" 13.125
cap "prescaler_0/tspc_2/a_630_n680#" "mc2" 142.175
cap "prescaler_0/tspc_2/GND" "mc2" 211.575
cap "prescaler_0/GND" "mc2" 143.403
cap "prescaler_0/tspc_2/a_630_n680#" "mc2" 52.165
cap "prescaler_0/tspc_2/Z2" "mc2" 236.68
cap "prescaler_0/nand_1/A" "and_0/a_n100_20#" 1.83333
cap "prescaler_0/nand_1/A" "prescaler_0/GND" 22.72
cap "w_2780_1920#" "prescaler_0/GND" 3.12
cap "w_2780_1920#" "prescaler_0/nand_1/A" 3.33
cap "and_0/Z1" "mc2" 92.03
cap "and_0/OUT" "mc2" 46.015
cap "prescaler_0/GND" "nor_0/gnd!" 12.25
cap "prescaler_0/GND" "mc2" 234.38
cap "nor_0/Out" "nor_0/gnd!" 14.496
cap "nor_0/Out" "mc2" 13.94
cap "and_0/B" "mc2" 13.94
cap "and_0/out1" "mc2" 59.955
cap "nor_0/Out" "nor_0/Z1" 11.4391
cap "and_0/a_120_n970#" "mc2" 49.2
cap "and_0/OUT" "and_0/a_n100_20#" 39.6
cap "nor_0/Out" "nor_0/B" 6.6
cap "nor_0/Out" "prescaler_0/GND" 16.9459
cap "and_0/OUT" "prescaler_0/GND" -20.05
cap "and_0/out1" "and_0/OUT" 48.6223
cap "w_2780_1920#" "and_0/OUT" -1.77636e-15
cap "w_2780_1920#" "and_0/B" 1.17
cap "nor_0/gnd!" "mc2" 65.22
cap "nor_0/B" "nor_1/B" 12.6816
cap "nor_1/A" "nor_1/Out" 163.742
cap "nor_0/a_460_n430#" "nor_1/A" 49.2
cap "nor_1/B" "nor_1/Out" 41.7957
cap "nor_1/B" "nor_1/A" 13.7084
cap "nor_1/a_n40_20#" "nor_0/B" 12.72
cap "nor_1/GND" "nor_1/gnd!" 11.2881
cap "nor_1/A" "nor_1/gnd!" 65.22
cap "nor_1/Out" "nor_1/gnd!" 2.53846
cap "nor_0/A" "nor_1/GND" 1.28205
cap "nor_0/B" "nor_1/Z1" 85.22
cap "nor_0/Out" "nor_1/Out" 90.78
cap "nor_0/Out" "nor_0/Z1" 11.4391
cap "nor_1/GND" "nor_1/A" 440.796
cap "nor_0/B" "nor_0/Out" 6.6
cap "nor_0/B" "nor_0/A" 58.3333
cap "nor_0/A" "nor_1/Out" 15.1125
cap "w_2780_1920#" "nor_0/A" 0.99
cap "nor_1/Out" "nor_0/a_n40_20#" 90.78
cap "nor_0/Out" "nor_1/A" 147.445
cap "nor_0/A" "nor_1/A" 12.84
cap "nor_0/B" "nor_1/A" 20.2275
cap "w_2780_1920#" "nor_0/B" -2.21
cap "nor_0/B" "nor_1/Out" 127.077
cap "nor_1/Out" "nor_0/Z1" 181.56
cap "w_2780_1920#" "nor_1/Out" 7.41
cap "nor_1/A" "nor_1/Out" 16.2969
cap "nor_1/A" "nor_1/GND" -54.6596
cap "nor_1/B" "nor_1/A" 0.868421
cap "m1_5770_3360#" "w_2780_1920#" -0.26
cap "nor_1/a_n40_20#" "m1_5770_3360#" -162.86
merge "and_0/GND" "nor_1/GND" -278.645 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 92500 -2320 0 0 0 0
merge "nor_1/GND" "m4_5770_3730#"
merge "m4_5770_3730#" "nor_0/GND"
merge "nor_0/GND" "m4_4690_3730#"
merge "m4_4690_3730#" "tspc_2/GND"
merge "tspc_2/GND" "tspc_1/GND"
merge "tspc_1/GND" "m4_7020_30#"
merge "m4_7020_30#" "tspc_0/GND"
merge "tspc_0/GND" "prescaler_0/GND"
merge "prescaler_0/GND" "gnd"
merge "nor_1/a_460_n430#" "nor_0/a_460_n430#" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "nor_0/a_460_n430#" "and_0/a_120_n970#"
merge "and_0/a_120_n970#" "tspc_2/a_540_n1120#"
merge "tspc_2/a_540_n1120#" "tspc_1/a_540_n1120#"
merge "tspc_1/a_540_n1120#" "tspc_0/a_540_n1120#"
merge "tspc_0/a_540_n1120#" "prescaler_0/VSUBS"
merge "prescaler_0/VSUBS" "VSUBS"
merge "prescaler_0/clk" "clk" -32.84 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19200 -200 0 0 0 0 0 0 0 0
merge "and_0/OUT" "prescaler_0/nand_1/A" -86.575 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10400 -260 0 0 0 0 0 0 0 0 0 0 0 0
merge "prescaler_0/nand_1/A" "prescaler_0/mc1"
merge "prescaler_0/mc1" "li_2870_2670#"
merge "tspc_2/a_n60_n20#" "nor_1/a_n40_20#" -1206.52 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -2100 -320 0 0 0 0 0 0 22700 -5600 0 0 0 0
merge "nor_1/a_n40_20#" "nor_0/a_n40_20#"
merge "nor_0/a_n40_20#" "m4_7030_1860#"
merge "m4_7030_1860#" "tspc_1/a_n60_n20#"
merge "tspc_1/a_n60_n20#" "and_0/a_n100_20#"
merge "and_0/a_n100_20#" "tspc_0/a_n60_n20#"
merge "tspc_0/a_n60_n20#" "vdd"
merge "vdd" "prescaler_0/tspc_1/a_n60_n20#"
merge "prescaler_0/tspc_1/a_n60_n20#" "li_3310_1810#"
merge "nor_1/B" "tspc_2/a_740_n680#" -643.044 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1600 -160 -19260 -2332 0 0 0 0 0 0 0 0 0 0
merge "tspc_2/a_740_n680#" "tspc_2/D"
merge "tspc_2/D" "li_7140_680#"
merge "nor_0/B" "tspc_1/a_740_n680#" -954.857 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -3200 -160 379400 -4460 4100 -160 0 0 0 0 0 0 0 0
merge "tspc_1/a_740_n680#" "m1_5770_3360#"
merge "m1_5770_3360#" "tspc_1/D"
merge "tspc_1/D" "li_5560_680#"
merge "nor_1/Out" "and_0/B" -205.455 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -1200 -140 218100 -60 0 0 0 0 0 0 0 0 0 0
merge "and_0/B" "li_6130_3350#"
merge "tspc_1/Q" "tspc_2/a_300_n150#" -754.337 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -33600 -160 -456300 0 -786800 -80 0 0 0 0 0 0 0 0
merge "tspc_2/a_300_n150#" "li_7040_820#"
merge "nor_0/A" "tspc_0/a_740_n680#" -974.675 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4400 -300 -111000 -260 70700 -3420 0 0 0 0 0 0 0 0
merge "tspc_0/a_740_n680#" "li_5740_3250#"
merge "li_5740_3250#" "tspc_0/D"
merge "tspc_0/D" "li_3980_680#"
merge "tspc_0/a_300_n150#" "prescaler_0/Out" -48.08 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -45600 -140 0 0 0 0 0 0 0 0
merge "prescaler_0/Out" "m2_3910_680#"
merge "prescaler_0/tspc_2/w_n140_n70#" "prescaler_0/nand_0/VDD" -46.02 0 0 0 0 -15340 -5670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "prescaler_0/nand_0/VDD" "w_n140_1520#"
merge "nor_1/A" "mc2" -504.34 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4400 -80 0 0 0 0 0 0 0 0 0 0 0 0
merge "nor_1/VDD" "nor_0/VDD" -5830.44 0 0 0 0 -1943480 -46041 0 0 -57800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
merge "nor_0/VDD" "and_0/VDD"
merge "and_0/VDD" "prescaler_0/nand_1/VDD"
merge "prescaler_0/nand_1/VDD" "tspc_2/w_n140_n70#"
merge "tspc_2/w_n140_n70#" "tspc_1/w_n140_n70#"
merge "tspc_1/w_n140_n70#" "tspc_0/w_n140_n70#"
merge "tspc_0/w_n140_n70#" "prescaler_0/tspc_1/w_n140_n70#"
merge "prescaler_0/tspc_1/w_n140_n70#" "w_2780_1920#"
merge "tspc_0/Q" "tspc_1/a_300_n150#" -258.082 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 26400 -160 0 0 -447600 -80 0 0 0 0 0 0 0 0
merge "tspc_1/a_300_n150#" "li_5460_820#"
merge "and_0/A" "nor_0/Out" -26.98 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 18400 -160 0 0 0 0 0 0 0 0 0 0 0 0
merge "nor_0/Out" "li_4830_3100#"
merge "tspc_2/Q" "Out" -27.5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -100 0 0 0 0 0 0 0 0 0 0 0 0