/root/subservient-mpw4/Makefile
/root/subservient-mpw4/docs/environment.yml
/root/subservient-mpw4/docs/Makefile
/root/subservient-mpw4/docs/source/index.rst
/root/subservient-mpw4/docs/source/conf.py
/root/subservient-mpw4/verilog/dv/Makefile
/root/subservient-mpw4/verilog/dv/subservient_blinky/subservient_blinky_tb.v
/root/subservient-mpw4/verilog/dv/subservient_blinky/Makefile
/root/subservient-mpw4/verilog/dv/subservient_blinky/subservient_blinky.c
/root/subservient-mpw4/verilog/rtl/serv_mem_if.v
/root/subservient-mpw4/verilog/rtl/serv_alu.v
/root/subservient-mpw4/verilog/rtl/subservient_wrapped.v
/root/subservient-mpw4/verilog/rtl/serving.v
/root/subservient-mpw4/verilog/rtl/ff_ram.v
/root/subservient-mpw4/verilog/rtl/subservient.v
/root/subservient-mpw4/verilog/rtl/serv_rf_top.v
/root/subservient-mpw4/verilog/rtl/serv_rf_ram.v
/root/subservient-mpw4/verilog/rtl/serv_ctrl.v
/root/subservient-mpw4/verilog/rtl/serv_top.v
/root/subservient-mpw4/verilog/rtl/serving_mux.v
/root/subservient-mpw4/verilog/rtl/uprj_netlists.v
/root/subservient-mpw4/verilog/rtl/serv_state.v
/root/subservient-mpw4/verilog/rtl/subservient_gpio.v
/root/subservient-mpw4/verilog/rtl/subservient_core.v
/root/subservient-mpw4/verilog/rtl/subservient_rf_ram_if.v
/root/subservient-mpw4/verilog/rtl/user_proj_example.v
/root/subservient-mpw4/verilog/rtl/user_project_wrapper.v
/root/subservient-mpw4/verilog/rtl/serving_ram.v
/root/subservient-mpw4/verilog/rtl/serving_arbiter.v
/root/subservient-mpw4/verilog/rtl/serv_rf_ram_if.v
/root/subservient-mpw4/verilog/rtl/subservient_ram.v
/root/subservient-mpw4/verilog/rtl/serv_csr.v
/root/subservient-mpw4/verilog/rtl/serv_decode.v
/root/subservient-mpw4/verilog/rtl/serv_immdec.v
/root/subservient-mpw4/verilog/rtl/subservient_debug_switch.v
/root/subservient-mpw4/verilog/rtl/serv_bufreg.v
/root/subservient-mpw4/verilog/rtl/serv_rf_if.v
/root/subservient-mpw4/openlane/Makefile
/root/subservient-mpw4/openlane/user_proj_example/config.tcl
/root/subservient-mpw4/openlane/user_project_wrapper/config.tcl