Space Controller
Authors
- Ivan Rodriguez-Ferrandez (UPC¹-BSC²)
- Alvaro Jover-Alvarez (UPC¹-BSC²)
- Leonidas Kosmidis (BSC²-UPC¹)
- David Steenari (ESA³)
¹ Universitat Politècnica de Catalunya (UPC)
² Barcelona Supercomputing Center (BSC)
³ European Space Agency (ESA)
Main Version of the chip: 2.0V EXTENDED
Change Log
- Version 1.0V:
- TODO
Chip Layout
Description
How To Use The Chip
Triple Redundancy Implementation
Block Description
Module Ports:
- Input Ports
- Output Ports
Caravel Connections
GPIO Connections
Logic Analyzer Probes
Input probes:
Output probes: