)]}'
{
  "commit": "04b67c7cb22a9baecc50f31c77186862cfac2876",
  "tree": "1af41c48aad031daa9c49752cc5c7625f3a5cc79",
  "parents": [
    "00662c7af404e01adedcec81100546ba5e3fdf73"
  ],
  "author": {
    "name": "jaquerinte",
    "email": "ivanrodriguezferrandez@gmail.com",
    "time": "Fri Dec 17 15:34:11 2021 +0100"
  },
  "committer": {
    "name": "jaquerinte",
    "email": "ivanrodriguezferrandez@gmail.com",
    "time": "Fri Dec 17 15:34:11 2021 +0100"
  },
  "message": "last changes to adding the PMU\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c3de8af8255e388393b19c8d1d461e5d8b2d8b91",
      "old_mode": 33188,
      "old_path": "openlane/user_proj_example/config.json",
      "new_id": "c0ac816327e7ecfac77d9b1b4f904aff4570ed37",
      "new_mode": 33188,
      "new_path": "openlane/user_proj_example/config.json"
    },
    {
      "type": "modify",
      "old_id": "94af8ba66068eb49758ac1c16b0672e35feb1fcd",
      "old_mode": 33261,
      "old_path": "openlane/user_proj_example/config.tcl",
      "new_id": "b835ad694c3db821c1949e971996c8be1f3d1509",
      "new_mode": 33261,
      "new_path": "openlane/user_proj_example/config.tcl"
    },
    {
      "type": "rename",
      "old_id": "64acced47af861e47cd023ad4609ccd9f6520542",
      "old_mode": 33188,
      "old_path": "verilog/rtl/UART_SERVER/COPYING",
      "new_id": "64acced47af861e47cd023ad4609ccd9f6520542",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/UART_SERVER/COPYING",
      "score": 100
    },
    {
      "type": "rename",
      "old_id": "93ddedbb2ab33ccf232ecf8741ce87f86a2bdd9b",
      "old_mode": 33188,
      "old_path": "verilog/rtl/UART_SERVER/uart.v",
      "new_id": "93ddedbb2ab33ccf232ecf8741ce87f86a2bdd9b",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/UART_SERVER/uart.v",
      "score": 100
    },
    {
      "type": "rename",
      "old_id": "76a3a3ebf8708c3801ca59ffa4f6af8a6d2588f9",
      "old_mode": 33188,
      "old_path": "verilog/rtl/UART_SERVER/uart_rx.v",
      "new_id": "76a3a3ebf8708c3801ca59ffa4f6af8a6d2588f9",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/UART_SERVER/uart_rx.v",
      "score": 100
    },
    {
      "type": "rename",
      "old_id": "be8d85b3be7ed1e5064cc3dd15b70cf7bd193d79",
      "old_mode": 33188,
      "old_path": "verilog/rtl/UART_SERVER/uart_tx.v",
      "new_id": "be8d85b3be7ed1e5064cc3dd15b70cf7bd193d79",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/UART_SERVER/uart_tx.v",
      "score": 100
    },
    {
      "type": "rename",
      "old_id": "ed8723a9949e81fee613728850c98225e8dfe274",
      "old_mode": 33188,
      "old_path": "verilog/rtl/control_module.v",
      "new_id": "67ded59bda173dcea134c7b6ddee7bebd7d8a717",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/control_module.v",
      "score": 81
    },
    {
      "type": "rename",
      "old_id": "c6d9875118fd1bb7ab183333a4b2cb0eaf6ea74a",
      "old_mode": 33188,
      "old_path": "verilog/rtl/io_module.v",
      "new_id": "95654d6e849252f5716843909dfc61f6f1d8f515",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/io_module.v",
      "score": 94
    },
    {
      "type": "rename",
      "old_id": "ea820a02d740f305234311846303bc7caef643b2",
      "old_mode": 33188,
      "old_path": "verilog/rtl/logic_control.v",
      "new_id": "fe6a5a9888798e5d2aea57f3b9e87f24bdbcf0a1",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/logic_control.v",
      "score": 96
    },
    {
      "type": "rename",
      "old_id": "0b3dbacfc44af4b90a3f2e0ac85a0c71c5e996e7",
      "old_mode": 33188,
      "old_path": "verilog/rtl/top_module.v",
      "new_id": "9f186480f29559b5f1acfc372b0cec35a3ef17f2",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/main_module.v",
      "score": 71
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "47060b1fef2b9397168bb9eec38c54ae0388a1db",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/pmu.v"
    },
    {
      "type": "rename",
      "old_id": "adaed8a611deab48d70a5185ebc8da48e5429630",
      "old_mode": 33188,
      "old_path": "verilog/rtl/status_sender_data.v",
      "new_id": "b71b62f24c7c88d8b34e2e65b3fd28724aa75c5a",
      "new_mode": 33188,
      "new_path": "verilog/rtl/controller/status_sender_data.v",
      "score": 91
    },
    {
      "type": "modify",
      "old_id": "3537de803dd1d472e447f0791344cbf5c9391455",
      "old_mode": 33188,
      "old_path": "verilog/rtl/uprj_netlists.v",
      "new_id": "1065d7880835a26f9b1623f044c8e03200972881",
      "new_mode": 33188,
      "new_path": "verilog/rtl/uprj_netlists.v"
    },
    {
      "type": "modify",
      "old_id": "26081e98ecdd98ac1a677c29dfbd5fb0dbc4ee53",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_proj_example.v",
      "new_id": "671ff2b2f51699daca210c0a6fb0fe095d834ac1",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_proj_example.v"
    }
  ]
}
