| commit | 71c0e0ae2a1a9048580d887157127a1ea70d9edf | [log] [tgz] |
|---|---|---|
| author | manarabdelaty <manarabdelatty@aucegypt.edu> | Thu Apr 08 17:03:47 2021 +0200 |
| committer | manarabdelaty <manarabdelatty@aucegypt.edu> | Thu Apr 08 17:03:47 2021 +0200 |
| tree | fe12cca54f35b116cd64a22f7bcc921724f1c429 | |
| parent | fa36b9915887d554e3472d38f1e66c2a41976201 [diff] |
[CI] Added job for running dv and splitted precheck to two jobs - precheck xor and drc checks are seperated because xor check runs for a very long amount of time on large designs - the dv checks run the rtl simulation for now
