)]}'
{
  "commit": "a230ba8c76e627a46891c6eebd8a6f3ccbf560bf",
  "tree": "86bd4a16d5e6b135d307c02834cb47bdebfef9f4",
  "parents": [
    "d6865841f6a1177c2fcbd5dfd33216d8f779e9e7"
  ],
  "author": {
    "name": "theatomb",
    "email": "23560806+theatomb@users.noreply.github.com",
    "time": "Sat Nov 06 13:57:10 2021 +0100"
  },
  "committer": {
    "name": "theatomb",
    "email": "23560806+theatomb@users.noreply.github.com",
    "time": "Sat Nov 06 13:57:10 2021 +0100"
  },
  "message": "solved bug in chip controller - now printing test is passing!\n",
  "tree_diff": [
    {
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      "new_mode": 33188,
      "new_path": "verilog/dv/testPrint/preview.gtkw"
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}