)]}'
{
  "commit": "1e702d98f09ee4386ec38ae8ec45d3a99032f8cf",
  "tree": "f04b28e0674aff39a5cf53d023b57675fb22549a",
  "parents": [
    "a230ba8c76e627a46891c6eebd8a6f3ccbf560bf"
  ],
  "author": {
    "name": "theatomb",
    "email": "23560806+theatomb@users.noreply.github.com",
    "time": "Sat Nov 06 14:19:31 2021 +0100"
  },
  "committer": {
    "name": "theatomb",
    "email": "23560806+theatomb@users.noreply.github.com",
    "time": "Sat Nov 06 14:19:31 2021 +0100"
  },
  "message": "deadcode removal\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6181ae68f50f100e9b6abe1f4b1f1d0e8fcc1f98",
      "old_mode": 33261,
      "old_path": "verilog/dv/testBasicOps/testBasicOps.elf",
      "new_id": "bd8b09bf8f0a2469f4ef61eb8cc1c45eeb806088",
      "new_mode": 33261,
      "new_path": "verilog/dv/testBasicOps/testBasicOps.elf"
    },
    {
      "type": "modify",
      "old_id": "bb1de4b8228ff69d350ea8680051a9e37a4e3ce7",
      "old_mode": 33188,
      "old_path": "verilog/rtl/elpis/chip_controller.v",
      "new_id": "29fc86c132d7739f08effaffac96ce5641c29c85",
      "new_mode": 33188,
      "new_path": "verilog/rtl/elpis/chip_controller.v"
    },
    {
      "type": "modify",
      "old_id": "82c6265b8e36d6868cae3486c9babd83a0f95527",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_project_wrapper.v",
      "new_id": "30198a791f7f1f674cd22685eb23067501a98eec",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_project_wrapper.v"
    }
  ]
}