)]}'
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        "time": "Fri Oct 15 12:03:14 2021 +0100"
      },
      "message": "analogue switch schematic\n"
    },
    {
      "commit": "df4e1230f86a798cd4d8fec0110d3a6949ed207a",
      "tree": "3ac373d9c0f65483bda387b07228917e2e22305e",
      "parents": [
        "2a7c7e2fa884679ba7b789c8b812661fd8dfab88"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 15 10:46:08 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 15 10:46:08 2021 +0100"
      },
      "message": "move second vout output to io_out[25]\n"
    },
    {
      "commit": "2a7c7e2fa884679ba7b789c8b812661fd8dfab88",
      "tree": "5cc8fe747e93a25688d6bf972248558d560bb03e",
      "parents": [
        "7540c4290687ce412eff2b80971348d5e2880797"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Oct 14 16:52:22 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Oct 14 16:52:22 2021 +0100"
      },
      "message": "tb to work for comparator\n"
    },
    {
      "commit": "7540c4290687ce412eff2b80971348d5e2880797",
      "tree": "8b99d34add1ac8db34acd12bca1e38cba685e422",
      "parents": [
        "2deb270d8679ced60b431fc654baf9a1eecb1b64"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "52609833+H-S-S-11@users.noreply.github.com",
        "time": "Thu Oct 14 16:07:07 2021 +0100"
      },
      "committer": {
        "name": "GitHub",
        "email": "noreply@github.com",
        "time": "Thu Oct 14 16:07:07 2021 +0100"
      },
      "message": "Update README.md"
    },
    {
      "commit": "2deb270d8679ced60b431fc654baf9a1eecb1b64",
      "tree": "37f03f6424cb23b0c4721e12ce5ee5252e5517a9",
      "parents": [
        "fc7d031c8a9161af7e412ea91177a5e9e4228d0e"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Wed Oct 13 13:12:22 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Wed Oct 13 13:12:22 2021 +0100"
      },
      "message": "add guard ring to flash array\n"
    },
    {
      "commit": "f4d92bf2d5dbda8fe5d04d051879691524dcebd0",
      "tree": "68f876891a7484bdfc6d109398c74461ed6d0bfa",
      "parents": [
        "00336fefcbe85ba1859b311b66fa1b68f7d2bf46"
      ],
      "author": {
        "name": "Tim Edwards",
        "email": "tim@opencircuitdesign.com",
        "time": "Tue Oct 12 15:49:11 2021 -0400"
      },
      "committer": {
        "name": "Tim Edwards",
        "email": "tim@opencircuitdesign.com",
        "time": "Tue Oct 12 15:49:11 2021 -0400"
      },
      "message": "Additional corrections to the analog wrapper testbench schematic to\nproperly quote net names with brackets, and to name a net that is\nreferenced in the plot command but hadn\u0027t been named in the\nschematic.\n"
    },
    {
      "commit": "00336fefcbe85ba1859b311b66fa1b68f7d2bf46",
      "tree": "46197294e2a37b6789841ba058e6b437825d56a8",
      "parents": [
        "ab6ba9c30b06bc7e68d9478afca6f676c7e4c1ff"
      ],
      "author": {
        "name": "Tim Edwards",
        "email": "tim@opencircuitdesign.com",
        "time": "Mon Oct 11 21:43:55 2021 -0400"
      },
      "committer": {
        "name": "Tim Edwards",
        "email": "tim@opencircuitdesign.com",
        "time": "Mon Oct 11 21:43:55 2021 -0400"
      },
      "message": "Modified the xschem files to reflect the handling of Tcl variables\nthat was implemented since this repository was first created.  This\nmakes use of xschemrc to define PDKPATH and to allow it to be\noverridden from the local OS environment.\n"
    },
    {
      "commit": "fc7d031c8a9161af7e412ea91177a5e9e4228d0e",
      "tree": "0469cb4b58f44237f9cf8bc853f0ab1bffbbc80a",
      "parents": [
        "a7664e879dcd422b42b989388cba795c12cf93aa"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Mon Oct 11 21:18:33 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Mon Oct 11 21:18:33 2021 +0100"
      },
      "message": "connections for flash test area\n"
    },
    {
      "commit": "a7664e879dcd422b42b989388cba795c12cf93aa",
      "tree": "c6e1e7985141227cf41681e450d5761253fe4b83",
      "parents": [
        "7de4246beff37824761725ad59ac809c280c8e22"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Mon Oct 11 20:27:18 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Mon Oct 11 20:27:18 2021 +0100"
      },
      "message": "add resistor jumper to seperate ports\n"
    },
    {
      "commit": "7de4246beff37824761725ad59ac809c280c8e22",
      "tree": "f1e14d68b2264aecf524d548989619f46ea4fa5a",
      "parents": [
        "3ce8a7043f8b85323257fd35f5585c1eb41af1ac"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 23:02:37 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 23:02:37 2021 +0100"
      },
      "message": "remove test flash cells\n"
    },
    {
      "commit": "3ce8a7043f8b85323257fd35f5585c1eb41af1ac",
      "tree": "85e7a33ebcd448b888a3e5db1cd7caa31e9ffce2",
      "parents": [
        "75e41493a5d12e3dad7c81fa0fe7576e63a49a97"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 23:00:22 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 23:00:22 2021 +0100"
      },
      "message": "add flash array layout\n"
    },
    {
      "commit": "75e41493a5d12e3dad7c81fa0fe7576e63a49a97",
      "tree": "766225551ce5e6894a994807e36e7380326a21b8",
      "parents": [
        "688d93dc93e950863282dc299804cbb94178fb26"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 22:57:11 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 22:57:11 2021 +0100"
      },
      "message": "get verilog tb to run\n"
    },
    {
      "commit": "688d93dc93e950863282dc299804cbb94178fb26",
      "tree": "3e88e61ae1ff41be17dea39eb96d99c843ec6869",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 22:36:13 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 22:36:13 2021 +0100"
      },
      "message": "fix up full chip sim\n"
    },
    {
      "commit": "9179c0daecacf381ec24a277caf77ab50f88ae24",
      "tree": "ae28a176871ef3085322ff04479be2f3603d9ffe",
      "parents": [
        "984718db4d117ff4638eb4ca1730b003042e013c"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 22:24:34 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 22:24:34 2021 +0100"
      },
      "message": "point spice include at library\n"
    },
    {
      "commit": "984718db4d117ff4638eb4ca1730b003042e013c",
      "tree": "d3ba9cedca997d34d7f2a02c54c990cbefb12015",
      "parents": [
        "617df52767df4ee38b24c7122100444bb6506b10"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 12:14:45 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sun Oct 10 12:14:45 2021 +0100"
      },
      "message": "clean up and set up verilog simulation\n"
    },
    {
      "commit": "617df52767df4ee38b24c7122100444bb6506b10",
      "tree": "f69c1f277451956f158f4f5c21b128e6d8ed584d",
      "parents": [
        "d60d38d5880691736463a3ed66b77ebc9ad291f7"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 09 17:14:30 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 09 17:14:30 2021 +0100"
      },
      "message": "rename testbench\n"
    },
    {
      "commit": "d60d38d5880691736463a3ed66b77ebc9ad291f7",
      "tree": "ef46ae5a8521c2f539c9f99b149bd0d5702912de",
      "parents": [
        "38ab6891c7a56cb0c0b9870bdae56caa40f4dddc"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 09 10:31:08 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 09 10:31:08 2021 +0100"
      },
      "message": "instantiate comparator behavioural model\n"
    },
    {
      "commit": "38ab6891c7a56cb0c0b9870bdae56caa40f4dddc",
      "tree": "7b44546bb071573ad6e2a311dd919f5af257f002",
      "parents": [
        "10b25e4997c89c98f9cb62fd69ffca7b5a92eaf5"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 08 16:04:57 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 08 16:04:57 2021 +0100"
      },
      "message": "make comparator verilog model\n"
    },
    {
      "commit": "10b25e4997c89c98f9cb62fd69ffca7b5a92eaf5",
      "tree": "45818237e450b1a836c8568f60454495096ac978",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 08 15:54:44 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 08 15:54:44 2021 +0100"
      },
      "message": "wire VOUT to a GPIO\n"
    },
    {
      "commit": "6a8b7744fd6eaed521f018b65781f243ab45be86",
      "tree": "36dda30faef784b1590ada0c67c674d5bfec88e5",
      "parents": [
        "c908a680c4d1daac18edd5ba134ca3e07a10bd87"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Wed Oct 06 17:42:47 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Wed Oct 06 17:42:47 2021 +0100"
      },
      "message": "finer sweep\n"
    },
    {
      "commit": "c908a680c4d1daac18edd5ba134ca3e07a10bd87",
      "tree": "0f09b4bad771040f2d76915ebf4bf16aa7688fd8",
      "parents": [
        "452875e7f831a090bfda00243a8b072a21fd3c20"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Mon Oct 04 00:50:51 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Mon Oct 04 00:50:51 2021 +0100"
      },
      "message": "use my own up to date wrapper\n"
    },
    {
      "commit": "452875e7f831a090bfda00243a8b072a21fd3c20",
      "tree": "482c7b97e464c3dead6c2af07bc70e02a9de3b00",
      "parents": [
        "7548a58ebb63763fc8de0b5ab5b844d2a1fb1915"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 13:27:57 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 13:27:57 2021 +0100"
      },
      "message": "remove old wrapper\n"
    },
    {
      "commit": "7548a58ebb63763fc8de0b5ab5b844d2a1fb1915",
      "tree": "b910e1310b3a4f0474122685c25b3f50ea4009c8",
      "parents": [
        "affa4dc2760fcdf467db307daa0f0ea5c3022658"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 13:21:31 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 13:21:31 2021 +0100"
      },
      "message": "Merge remote-tracking branch \u0027upstream/main\u0027\n"
    },
    {
      "commit": "affa4dc2760fcdf467db307daa0f0ea5c3022658",
      "tree": "482c7b97e464c3dead6c2af07bc70e02a9de3b00",
      "parents": [
        "2b1fa859a155a893547b3b0655fa5f2514ae2f45",
        "ab6ba9c30b06bc7e68d9478afca6f676c7e4c1ff"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 13:19:26 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 13:19:26 2021 +0100"
      },
      "message": "use upstream wrapper\n"
    },
    {
      "commit": "2b1fa859a155a893547b3b0655fa5f2514ae2f45",
      "tree": "ef62ef24340eea06a9bea1787f1b305658d629cc",
      "parents": [
        "98624d7b33daf7f3e5c1d751de6c89cf6d5d6ed9"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 12:49:14 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 12:49:14 2021 +0100"
      },
      "message": "simulate with 3v3 nfets\n"
    },
    {
      "commit": "98624d7b33daf7f3e5c1d751de6c89cf6d5d6ed9",
      "tree": "bb78cac418d026eaa242c831585cb393becead70",
      "parents": [
        "3dd93d3c5e4ad48bc4dcfe3398e5e05d54be0fbb"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 12:24:50 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 12:24:50 2021 +0100"
      },
      "message": "use nntransistor layer to make 3v3 nfets\n"
    },
    {
      "commit": "3dd93d3c5e4ad48bc4dcfe3398e5e05d54be0fbb",
      "tree": "8e881b2a1ca5233f6bbd426c470e09a15a3d2aca",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 12:04:51 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Sat Oct 02 12:04:51 2021 +0100"
      },
      "message": "verify that 3v3 nfets are required\n"
    },
    {
      "commit": "828ebf1d4aa4de1aedf1e4c52dee7b148a1e33e9",
      "tree": "eb136a41cc4c4cc5d60ef6578e124a9b78fdb181",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 01 20:28:23 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 01 20:28:23 2021 +0100"
      },
      "message": "add proper path to xschemrc\n"
    },
    {
      "commit": "00214483ac91958327580f5ed09d53fdbe3a04cf",
      "tree": "4512f93c6211d18e6bbc0c152123a4daf4ac4084",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 01 13:39:44 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 01 13:39:44 2021 +0100"
      },
      "message": "add caravel\n"
    },
    {
      "commit": "475bcc87618922edee7eccd533c763a8cb98ba36",
      "tree": "cc14a296796670d759e1c6a917db644c8ef097be",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 01 13:32:18 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Fri Oct 01 13:32:18 2021 +0100"
      },
      "message": "remove caravel\n"
    },
    {
      "commit": "2b624ff549418f98596bd29cfdbe8cb50a5eab5b",
      "tree": "82beda527d56fb82e44e5d20e9c7606032071aac",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Sep 30 13:37:20 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Sep 30 13:37:20 2021 +0100"
      },
      "message": "all checks passed\n"
    },
    {
      "commit": "818ef9c5f764043baa11f20682e411a39c3adcb1",
      "tree": "8a068813b97fb5adb1e15b31e4cff61e155da53c",
      "parents": [
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      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Sep 30 13:07:54 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Sep 30 13:07:54 2021 +0100"
      },
      "message": "update info yaml to point at caravan.spice\n"
    },
    {
      "commit": "3ec76875439d5033e51f3d38eced6277e35a6b85",
      "tree": "ab62502561bd5601c2a943019e5b052c23bb00e4",
      "parents": [
        "0338a9185a473013d5206f4c99efabed1d72cb04"
      ],
      "author": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Wed Sep 29 16:26:59 2021 +0100"
      },
      "committer": {
        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Wed Sep 29 16:26:59 2021 +0100"
      },
      "message": "fix HV nwell spacing violations\n"
    },
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        "time": "Wed Sep 29 16:04:57 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Wed Sep 29 16:04:57 2021 +0100"
      },
      "message": "passed xor\n"
    },
    {
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        "time": "Wed Sep 29 14:01:32 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Wed Sep 29 14:01:32 2021 +0100"
      },
      "message": "new comparator layout\n"
    },
    {
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        "time": "Wed Sep 29 02:55:48 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Wed Sep 29 02:55:48 2021 +0100"
      },
      "message": "new layout working in extracted sim\n"
    },
    {
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        "time": "Wed Sep 29 01:58:01 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Wed Sep 29 01:58:01 2021 +0100"
      },
      "message": "convert p to medium voltage\n"
    },
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        "time": "Wed Sep 29 01:54:47 2021 +0100"
      },
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        "time": "Wed Sep 29 01:54:47 2021 +0100"
      },
      "message": "finish comparator, need to convert to 1v8\n"
    },
    {
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        "time": "Tue Sep 28 23:05:13 2021 +0100"
      },
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        "time": "Tue Sep 28 23:05:13 2021 +0100"
      },
      "message": "file moving\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Tue Sep 28 22:42:02 2021 +0100"
      },
      "message": "clean up port wiring for comparator\n"
    },
    {
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        "name": "Tim Edwards",
        "email": "tim@opencircuitdesign.com",
        "time": "Tue Sep 28 10:50:49 2021 -0400"
      },
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        "email": "tim@opencircuitdesign.com",
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      },
      "message": "Modified the user_analog_project_wrapper layouts (empty and example)\nto add the metal4 and metal5 layers on io_analog[6:4] that are part\nof the top level layout.  This will show users where the layers are\nso that they do not route close enough to create DRC violations where\nthey cannot see them.\n"
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        "email": "harry@snell.org.uk",
        "time": "Tue Sep 28 12:39:24 2021 +0100"
      },
      "message": "comparing various comparator topologies\n"
    },
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        "time": "Tue Sep 28 12:02:46 2021 +0100"
      },
      "message": "dc perf of diffamp vs full comparator\n"
    },
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      },
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        "time": "Mon Sep 27 13:20:32 2021 +0100"
      },
      "message": "Merge branch \u0027main\u0027 of https://github.com/H-S-S-11/caravel_user_project_analog\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Mon Sep 27 13:20:29 2021 +0100"
      },
      "message": "add path to caravel\n"
    },
    {
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      },
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        "email": "noreply@github.com",
        "time": "Mon Sep 27 13:18:32 2021 +0100"
      },
      "message": "Update info.yaml"
    },
    {
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      },
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        "time": "Sun Sep 26 12:03:46 2021 +0100"
      },
      "message": "readme\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Sun Sep 26 12:02:29 2021 +0100"
      },
      "message": "Describe project in readme\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Sun Sep 26 11:35:41 2021 +0100"
      },
      "message": "change to use ports\n"
    },
    {
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        "time": "Fri Sep 24 14:43:43 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Fri Sep 24 14:43:43 2021 +0100"
      },
      "message": "compare diff amp on it\u0027s own with full comparator\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Fri Sep 24 14:40:51 2021 +0100"
      },
      "message": "full comparator sim\n"
    },
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        "time": "Fri Sep 24 13:15:17 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Fri Sep 24 13:15:17 2021 +0100"
      },
      "message": "change scaling in ext2spice\n"
    },
    {
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        "time": "Thu Sep 23 15:38:24 2021 +0100"
      },
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        "email": "harry@snell.org.uk",
        "time": "Thu Sep 23 15:38:24 2021 +0100"
      },
      "message": "caravel lite submodule\n"
    },
    {
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        "time": "Thu Sep 23 15:26:53 2021 +0100"
      },
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        "name": "H-S-S-11",
        "email": "harry@snell.org.uk",
        "time": "Thu Sep 23 15:26:53 2021 +0100"
      },
      "message": "Differential amplifier layout and sim\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Wed Sep 22 20:15:05 2021 +0100"
      },
      "message": "decision feedback circuit\n"
    },
    {
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      },
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        "email": "harry@snell.org.uk",
        "time": "Tue Sep 21 19:00:34 2021 +0100"
      },
      "message": "add comparator\n"
    },
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      },
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        "email": "noreply@github.com",
        "time": "Tue Sep 21 07:45:19 2021 -0700"
      },
      "message": "Merge pull request #7 from Manarabdelaty/update_spice\n\nUpdate spice netlist to pass the precheck, documentation updates, and minor CI update"
    },
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        "time": "Tue Sep 21 01:42:33 2021 +0200"
      },
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        "email": "manarabdelatty@aucegypt.edu",
        "time": "Tue Sep 21 01:42:33 2021 +0200"
      },
      "message": "Merge branch \u0027update_spice\u0027 of https://github.com/Manarabdelaty/caravel_user_project_analog into update_spice\n"
    },
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        "time": "Tue Sep 21 01:41:51 2021 +0200"
      },
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        "email": "manarabdelatty@aucegypt.edu",
        "time": "Tue Sep 21 01:41:51 2021 +0200"
      },
      "message": "[CI] Run jobs on workflow dispatch\n"
    },
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      },
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        "time": "Tue Sep 21 01:41:29 2021 +0200"
      },
      "message": "EFIC-170 Update documentation to include a note about spice extraction"
    },
    {
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      },
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        "email": "manarabdelatty@aucegypt.edu",
        "time": "Tue Sep 21 01:10:16 2021 +0200"
      },
      "message": "Update spice netlist and caravel submodule\n"
    },
    {
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        "time": "Mon Sep 20 11:30:52 2021 -0700"
      },
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        "time": "Mon Sep 20 11:30:52 2021 -0700"
      },
      "message": "Merge pull request #6 from Manarabdelaty/update_info_yaml\n\nUpdate info.yaml to specify spice netlists"
    },
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      },
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        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 19:52:25 2021 +0200"
      },
      "message": "Update submodule reference\n"
    },
    {
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        "time": "Mon Sep 20 10:23:14 2021 -0700"
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        "name": "GitHub",
        "email": "noreply@github.com",
        "time": "Mon Sep 20 10:23:14 2021 -0700"
      },
      "message": "Merge pull request #5 from Manarabdelaty/fix_ci\n\nFix CI"
    },
    {
      "commit": "03260a6f0d95ecd73c881024d21f3578e294178f",
      "tree": "222779831586690d9e957125222e8a2513eecfd6",
      "parents": [
        "2ad0e6445d171da1d0a5ed9fc7d871819419a580"
      ],
      "author": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 19:11:17 2021 +0200"
      },
      "committer": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 19:11:17 2021 +0200"
      },
      "message": "Update info.yaml to specify spice netlists\n"
    },
    {
      "commit": "314d25a052da5711f67a0477b002379005fafb4d",
      "tree": "4aca788d95bb39bb3b6e31c806dfcf818bfa1b02",
      "parents": [
        "f3f6611e5a99bfed34af2347a6fbda7cc4096495"
      ],
      "author": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 13:16:48 2021 +0200"
      },
      "committer": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 13:16:48 2021 +0200"
      },
      "message": "Fix pdk-nonnative target\n"
    },
    {
      "commit": "f3f6611e5a99bfed34af2347a6fbda7cc4096495",
      "tree": "df5a3f9c843860c576ebb41c30c73a12c24105ed",
      "parents": [
        "521f2c34e04749c24fe2ecda25744ce640378828"
      ],
      "author": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 12:33:45 2021 +0200"
      },
      "committer": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 12:33:45 2021 +0200"
      },
      "message": "[CI] Fix GL job\n"
    },
    {
      "commit": "521f2c34e04749c24fe2ecda25744ce640378828",
      "tree": "19817244374c41b126be49f48e7121763ce33bf1",
      "parents": [
        "d1fd7e8104d429b9765b7546aaa24f9d5cf1801d"
      ],
      "author": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 12:18:14 2021 +0200"
      },
      "committer": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 12:18:14 2021 +0200"
      },
      "message": "Update include netlists\n"
    },
    {
      "commit": "d1fd7e8104d429b9765b7546aaa24f9d5cf1801d",
      "tree": "b1d82e126189123f4868b30931afcbddcd398c74",
      "parents": [
        "7f6c9a734b70c3ceae4d6c2b1e6a10cdbb5b84f4"
      ],
      "author": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 11:30:12 2021 +0200"
      },
      "committer": {
        "name": "manarabdelaty",
        "email": "manarabdelatty@aucegypt.edu",
        "time": "Mon Sep 20 11:30:12 2021 +0200"
      },
      "message": "Update README\n"
    }
  ],
  "next": "7f6c9a734b70c3ceae4d6c2b1e6a10cdbb5b84f4"
}