timestamp 1628437795
version 8.3
tech sky130A
style ngspice()
scale 1000 1 500000
resistclasses 2200000 3050000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5
use sky130_fd_pr__nfet_01v8_UPT43B sky130_fd_pr__nfet_01v8_UPT43B_0 1 0 -383 0 1 2063
use sky130_fd_pr__pfet_01v8_L4T9AL sky130_fd_pr__pfet_01v8_L4T9AL_0 1 0 -383 0 1 2552
port "B" 2 -296 2230 -296 2230 m1
port "A" 1 -472 2252 -472 2252 m1
port "vdd" 0 -328 2880 -328 2880 m4
port "vss" 3 -330 1812 -330 1812 m4
node "B" 1 163.345 -296 2230 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10128 732 0 0 0 0 0 0 0 0 0 0
node "A" 62 202.723 -472 2252 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5848 412 12972 644 0 0 0 0 0 0 0 0 0 0
node "a_n416_2220#" 56 91.3924 -416 2220 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5016 284 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "vdd" 8740 623.655 -328 2880 m4 0 0 0 0 65668 1368 0 0 4640 312 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12168 468 27160 1100 8528 372 9792 396 17000 540 0 0 0 0
substrate "vss" 0 0 -330 1812 m4 0 0 79120 1148 0 0 0 0 0 0 9088 412 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17052 544 28020 1076 7296 344 10728 416 17000 540 0 0 0 0
cap "A" "B" 171
cap "A" "a_n416_2220#" 95.3784
cap "sky130_fd_pr__nfet_01v8_UPT43B_0/a_15_n131#" "sky130_fd_pr__pfet_01v8_L4T9AL_0/w_n109_n264#" 101.713
cap "sky130_fd_pr__nfet_01v8_UPT43B_0/a_15_n131#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n33_91#" 17.1152
cap "sky130_fd_pr__pfet_01v8_L4T9AL_0/w_n109_n264#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n73_n131#" 12.6101
cap "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n33_91#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n73_n131#" 11.1987
cap "sky130_fd_pr__nfet_01v8_UPT43B_0/a_15_n131#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n73_n131#" 94.1122
cap "sky130_fd_pr__pfet_01v8_L4T9AL_0/w_n109_n264#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n33_91#" 17.0974
merge "sky130_fd_pr__pfet_01v8_L4T9AL_0/a_n73_n164#" "sky130_fd_pr__pfet_01v8_L4T9AL_0/w_n109_n264#" -36.113 0 0 0 0 -7220 -1160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -92 0 0 0 0 0 0 0 0 0 0
merge "sky130_fd_pr__pfet_01v8_L4T9AL_0/w_n109_n264#" "vdd"
merge "sky130_fd_pr__pfet_01v8_L4T9AL_0/VSUBS" "sky130_fd_pr__nfet_01v8_UPT43B_0/VSUBS" -11.9784 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -92 0 0 0 0 0 0 0 0 0 0
merge "sky130_fd_pr__nfet_01v8_UPT43B_0/VSUBS" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n73_n131#"
merge "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n73_n131#" "vss"
merge "sky130_fd_pr__pfet_01v8_L4T9AL_0/a_15_n164#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_15_n131#" -19.1612 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -136 0 0 0 0 0 0 0 0 0 0
merge "sky130_fd_pr__nfet_01v8_UPT43B_0/a_15_n131#" "B"
merge "sky130_fd_pr__pfet_01v8_L4T9AL_0/a_n33_n261#" "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n33_91#" -220.153 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -330 -274 0 0 -2312 -272 -4238 -392 0 0 0 0 0 0 0 0 0 0
merge "sky130_fd_pr__nfet_01v8_UPT43B_0/a_n33_91#" "A"
merge "A" "a_n416_2220#"