diff --git a/README.md b/README.md
index 3706438..23c66cb 100644
--- a/README.md
+++ b/README.md
@@ -7,5 +7,6 @@
 
 ## Please fill in your project documentation in this README.md file 
 
+Used RTL files from the repository: https://github.com/alexforencich/verilog-ethernet
 
 Refer to [README](docs/source/index.rst) for this sample project documentation.