)]}'
{
  "commit": "8dbabc1fc25ac5c30a0cdd49f5169a95a514ad8b",
  "tree": "d82b539cf66a2c994b6117bc98657f933b290928",
  "parents": [
    "8e8bf63313e07718a16c91cd5cbcf9c47103ded7"
  ],
  "author": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Fri Apr 16 21:53:57 2021 +0200"
  },
  "committer": {
    "name": "manarabdelaty",
    "email": "manarabdelatty@aucegypt.edu",
    "time": "Fri Apr 16 21:53:57 2021 +0200"
  },
  "message": "Update DV Makefiles\n\n- CARAVEL_PATH is now determined from CARAVEL_MASTER variable\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7e37e0268e65ce376163bb81f2a3d84f21198c3b",
      "old_mode": 33188,
      "old_path": "verilog/dv/Makefile",
      "new_id": "7895a6e6e2809d7573e3e86a649953b72816c6dc",
      "new_mode": 33188,
      "new_path": "verilog/dv/Makefile"
    },
    {
      "type": "modify",
      "old_id": "b60690557db433831af90565f26768f75e358433",
      "old_mode": 33188,
      "old_path": "verilog/dv/io_ports/Makefile",
      "new_id": "136dbdb7779e5f2e179d8a3fbb3437b9e1280887",
      "new_mode": 33188,
      "new_path": "verilog/dv/io_ports/Makefile"
    },
    {
      "type": "modify",
      "old_id": "39f3dcea285e930e84a54bdc70c6aed50915115d",
      "old_mode": 33188,
      "old_path": "verilog/dv/la_test1/Makefile",
      "new_id": "51722f5ce281ca60ab568893544ce2a7e041607c",
      "new_mode": 33188,
      "new_path": "verilog/dv/la_test1/Makefile"
    },
    {
      "type": "modify",
      "old_id": "a101e059f6c13617cd9764f38a5abcc80fc0daf6",
      "old_mode": 33188,
      "old_path": "verilog/dv/la_test2/Makefile",
      "new_id": "b5feea78f1cd73dc135fabbbff4f3f0d4bd93491",
      "new_mode": 33188,
      "new_path": "verilog/dv/la_test2/Makefile"
    },
    {
      "type": "modify",
      "old_id": "d94ea2225ff5264f843b40154173560b07470631",
      "old_mode": 33188,
      "old_path": "verilog/dv/mprj_stimulus/Makefile",
      "new_id": "d159e15ce41cc5c653749d1f3d918ccb51327544",
      "new_mode": 33188,
      "new_path": "verilog/dv/mprj_stimulus/Makefile"
    },
    {
      "type": "modify",
      "old_id": "d7f6e7b1637d396532115259553c4a2c7ad5f788",
      "old_mode": 33188,
      "old_path": "verilog/dv/wb_port/Makefile",
      "new_id": "d6cb12d558bedf4e277afc4635c331e4137bf8cd",
      "new_mode": 33188,
      "new_path": "verilog/dv/wb_port/Makefile"
    }
  ]
}