)]}'
{
  "commit": "e2522f16cca851a79b93b9d3a00acdece38524e5",
  "tree": "712b1743d8b258f2561e875b59a2adaf507e104f",
  "parents": [
    "a86a7ca8db12c46871a16160872dec216419896a"
  ],
  "author": {
    "name": "Harrison Pham",
    "email": "harrison@harrisonpham.com",
    "time": "Sun Oct 17 16:42:42 2021 -0700"
  },
  "committer": {
    "name": "Harrison Pham",
    "email": "harrison@harrisonpham.com",
    "time": "Sun Oct 17 16:42:42 2021 -0700"
  },
  "message": "Fix schematic clkmux bus for verilog netlist\n",
  "tree_diff": [
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}