v {xschem version=2.9.9 file_version=1.2 }
G {}
K {type=subcircuit
format="@name @pinlist @symname"
verilog_primitive=true
template="name=x1"
}
V {}
S {}
E {}
L 4 -130 -50 130 -50 {}
L 4 -130 50 130 50 {}
L 4 -130 -50 -130 50 {}
L 4 130 -50 130 50 {}
L 4 -150 -40 -130 -40 {}
L 4 -150 -20 -130 -20 {}
L 4 -150 0 -130 0 {}
L 4 -150 20 -130 20 {}
L 4 -150 40 -130 40 {}
L 7 130 -40 150 -40 {}
L 7 130 -20 150 -20 {}
B 5 -152.5 -42.5 -147.5 -37.5 {name=A4 dir=in }
B 5 -152.5 -22.5 -147.5 -17.5 {name=A0 dir=in }
B 5 -152.5 -2.5 -147.5 2.5 {name=A3 dir=in }
B 5 -152.5 17.5 -147.5 22.5 {name=A2 dir=in }
B 5 -152.5 37.5 -147.5 42.5 {name=A1 dir=in }
B 5 147.5 -42.5 152.5 -37.5 {name=VPWR dir=inout }
B 5 147.5 -22.5 152.5 -17.5 {name=OUT dir=inout }
T {DAC5bit01} -38.5 -6 0 0 0.3 0.3 {}
T {@name} 135 -62 0 0 0.2 0.2 {}
T {A4} -125 -44 0 0 0.2 0.2 {}
T {A0} -125 -24 0 0 0.2 0.2 {}
T {A3} -125 -4 0 0 0.2 0.2 {}
T {A2} -125 16 0 0 0.2 0.2 {}
T {A1} -125 36 0 0 0.2 0.2 {}
T {VPWR} 125 -44 0 1 0.2 0.2 {}
T {OUT} 125 -24 0 1 0.2 0.2 {}