v {xschem version=2.9.9 file_version=1.2 }
G {}
K {type=subcircuit
format="@name @pinlist @symname"
verilog_primitive=true
template="name=x1"
}
V {}
S {}
E {}
L 4 40 -160 40 20 {}
L 4 -130 20 40 20 {}
L 4 -130 -160 -130 20 {}
L 4 -130 -160 40 -160 {}
L 7 40 -150 60 -150 {}
L 7 -150 -120 -130 -120 {}
L 7 40 -130 60 -130 {}
L 7 -150 -100 -130 -100 {}
L 7 40 -110 60 -110 {}
L 7 -150 -80 -130 -80 {}
L 7 40 -90 60 -90 {}
L 7 -150 -60 -130 -60 {}
L 7 40 -70 60 -70 {}
L 7 -150 -40 -130 -40 {}
L 7 40 -50 60 -50 {}
L 7 -150 -20 -130 -20 {}
L 7 40 -30 60 -30 {}
L 7 -150 0 -130 0 {}
L 7 40 -10 60 -10 {}
L 7 40 10 60 10 {}
B 5 57.5 -152.5 62.5 -147.5 {name=VINJ dir=inout }
B 5 -152.5 -122.5 -147.5 -117.5 {name=IO07 dir=inout }
B 5 57.5 -132.5 62.5 -127.5 {name=PIN1 dir=inout }
B 5 -152.5 -102.5 -147.5 -97.5 {name=IO08 dir=inout }
B 5 57.5 -112.5 62.5 -107.5 {name=PIN2 dir=inout }
B 5 -152.5 -82.5 -147.5 -77.5 {name=IO09 dir=inout }
B 5 57.5 -92.5 62.5 -87.5 {name=PIN3 dir=inout }
B 5 -152.5 -62.5 -147.5 -57.5 {name=IO10 dir=inout }
B 5 57.5 -72.5 62.5 -67.5 {name=PIN4 dir=inout }
B 5 -152.5 -42.5 -147.5 -37.5 {name=IO11 dir=inout }
B 5 57.5 -52.5 62.5 -47.5 {name=PIN5 dir=inout }
B 5 -152.5 -22.5 -147.5 -17.5 {name=IO12 dir=inout }
B 5 57.5 -32.5 62.5 -27.5 {name=PIN6 dir=inout }
B 5 -152.5 -2.5 -147.5 2.5 {name=IO13 dir=inout }
B 5 57.5 -12.5 62.5 -7.5 {name=PIN7 dir=inout }
B 5 57.5 7.5 62.5 12.5 {name=VGND dir=inout }
T {RightProtection} -124 -156 0 0 0.3 0.3 {}
T {@name} 45 -172 0 0 0.2 0.2 {}
T {VINJ} 35 -154 0 1 0.2 0.2 {}
T {IO07} -95 -124 0 1 0.2 0.2 {}
T {PIN1} 35 -134 0 1 0.2 0.2 {}
T {IO08} -95 -104 0 1 0.2 0.2 {}
T {PIN2} 35 -114 0 1 0.2 0.2 {}
T {IO09} -95 -84 0 1 0.2 0.2 {}
T {PIN3} 35 -94 0 1 0.2 0.2 {}
T {IO10} -95 -64 0 1 0.2 0.2 {}
T {PIN4} 35 -74 0 1 0.2 0.2 {}
T {IO11} -95 -44 0 1 0.2 0.2 {}
T {PIN5} 35 -54 0 1 0.2 0.2 {}
T {IO12} -95 -24 0 1 0.2 0.2 {}
T {PIN6} 35 -34 0 1 0.2 0.2 {}
T {IO13} -95 -4 0 1 0.2 0.2 {}
T {PIN7} 35 -14 0 1 0.2 0.2 {}
T {VGND} 35 6 0 1 0.2 0.2 {}