)]}'
{
  "commit": "a79eb3f262c7116ca4b3ffc0e0738ae59a3a6bf6",
  "tree": "519dae319843ff7578482643468f267e4442ee48",
  "parents": [
    "bf4c2189f1e4390b7afb8674f740050925497a18"
  ],
  "author": {
    "name": "aghaalizeb-lm",
    "email": "agha.ali@lampromellon.com",
    "time": "Tue Jun 08 12:54:03 2021 +0500"
  },
  "committer": {
    "name": "aghaalizeb-lm",
    "email": "agha.ali@lampromellon.com",
    "time": "Tue Jun 08 12:54:03 2021 +0500"
  },
  "message": "la output logic fix\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c1b44f3311c965b8104f47623d159e9aab72faac",
      "old_mode": 33188,
      "old_path": "verilog/rtl/user_proj_example.sv",
      "new_id": "76aba0a301e4266c108af781ffb620b4c9282416",
      "new_mode": 33188,
      "new_path": "verilog/rtl/user_proj_example.sv"
    }
  ]
}