Table of contents
Caravel FPU
Floating Point Unit
FPU Architecture
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
FPU Exceptions
Integration of FPU as Memory Mapped Peripheral
Wishbone Interface
Logic Analyzer
GPIO
Result of FPU calculation also appers at the 32 GPIO pins.
CSRs for FPU
Instruction Flow