diff --git a/verilog/rtl/user_proj_example.v b/verilog/rtl/user_proj_example.v
index 177a733..b949583 100644
--- a/verilog/rtl/user_proj_example.v
+++ b/verilog/rtl/user_proj_example.v
@@ -100,7 +100,7 @@
     assign io_oeb = {(`MPRJ_IO_PADS-1){rst}};
 
     // IRQ
-    assigin irq = 3'b000;	// Unused
+    assign irq = 3'b000;	// Unused
 
     // LA
     assign la_data_out = {{(127-BITS){1'b0}}, count};