commit 401a14d95a1af3ec537ad68638c93320013a05cd
author manarabdelaty <manarabdelatty@aucegypt.edu> Fri Apr 23 17:20:56 2021 +0200
committer manarabdelaty <manarabdelatty@aucegypt.edu> Fri Apr 23 17:20:56 2021 +0200
tree 5c5ab6ea5bdfb5e21d968c906d09539151b9e1fa
parent 694bfd3c5ee03d3716541b7b55bcd5fc13343bfd

Fix syntax error

verilog/rtl/user_proj_example.v

diff --git a/verilog/rtl/user_proj_example.v b/verilog/rtl/user_proj_example.v
index 177a733..b949583 100644
--- a/verilog/rtl/user_proj_example.v
+++ b/verilog/rtl/user_proj_example.v
@@ -100,7 +100,7 @@
     assign io_oeb = {(`MPRJ_IO_PADS-1){rst}};
 
     // IRQ
-    assigin irq = 3'b000;	// Unused
+    assign irq = 3'b000;	// Unused
 
     // LA
     assign la_data_out = {{(127-BITS){1'b0}}, count};