)]}'
{
  "commit": "fa14e325ca198a100cfd2ac78190def0f51cd1ce",
  "tree": "ce7cc9ab838027d816dd189446d485c8080bbb75",
  "parents": [
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  ],
  "author": {
    "name": "manikandan-phd",
    "email": "manikandan_phd@outlook.com",
    "time": "Sat Jun 19 04:30:10 2021 +0530"
  },
  "committer": {
    "name": "manikandan-phd",
    "email": "manikandan_phd@outlook.com",
    "time": "Sat Jun 19 04:30:10 2021 +0530"
  },
  "message": "final design for submission\n",
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    {
      "type": "modify",
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      "old_path": "verilog/gl/user_proj_example.v",
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}
