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index a3a0329..eaad299 100644
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@@ -4,10 +4,11 @@
 
 
 
-This work is an integrated multi purpouse encoder design which can simultaneously get two 32-bit data and key of 32-bit size for generating 32-bit encoded data. Those two 32-bit data may belong to the same process in case of data encryption(64-bit parallel encryption can be done) and it can be from different processes in case of signal processing applications to establish authentication.
+This work is an integrated multi purpose encoder design which can simultaneously get two 32-bit data and key of 32-bit size for generating 32-bit encoded data. Those two 32-bit data may belong to the same process in case of data encryption(64-bit parallel encryption can be done) or it can be from different processes in case of signal processing applications to establish authentication.
 
-The encoder design is integrated with caravel. Inputs for the encoder can be fed from caravel management area through LA and output can also be read from LA.
+The encoder design is integrated with caravel through LA. Inputs for the encoder can be fed from caravel management area through LA and output can also be read from LA.
 
+Testbench and sample firmware to evaluate the multi encoder can be found in /caravel_encoder/tree/main/verilog/dv/la_test1. 
 
 
 Refer to [README](docs/source/index.rst) for the environmental setup, project compilation and validation.