)]}'
{
  "id": "3dffd47ae4586af75850f9a1aa107fce27eeae18",
  "entries": [
    {
      "mode": 33188,
      "type": "blob",
      "id": "adaeaab820b606baa98dde652377061b78cb4e12",
      "name": "eFPGA_CPU_top.gds"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "b32ae18957258f16b4e7113c148acacb6ef2a4ce",
      "name": "user_proj_example.gds"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "1821cb96825191ccaabb54d24b8ce9a7b588267d",
      "name": "user_project_wrapper.gds"
    },
    {
      "mode": 33188,
      "type": "blob",
      "id": "6b8b14a454fa12cbfe1d247144dd80141661c38f",
      "name": "user_project_wrapper.gds.gz"
    }
  ]
}