blob: c7eb7fe193a3cab0afd7be0a25c8b8a3d2422ecd [file] [log] [blame]
Step 1: Create new cells for new GPIO default vectors.
Creating new layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Layout file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/mag/gpio_defaults_block_0403.mag already exists and does not need to be generated.
Gate-level verilog file /mnt/shuttles/shuttle/mpw-two/slot-012/fuserisc_ver2/verilog/gl/gpio_defaults_block_0403.v already exists and does not need to be generated.
Step 2: Modify top-level layouts to use the specified defaults.
Done.