| ************************************************** |
| * OpenRAM generated memory. |
| * Words: 256 |
| * Data bits: 32 |
| * Banks: 1 |
| * Column mux: 4:1 |
| * Trimmed: False |
| * LVS: False |
| ************************************************** |
| * NGSPICE file created from sky130_fd_bd_sram__sram_sp_cell_opt1.ext - technology: sky130A |
| |
| .subckt sky130_fd_bd_sram__sram_sp_cell_opt1 BL BR VGND VPWR VPB VNB WL |
| X0 a_16_182# a_0_24# BR VNB sky130_fd_pr__special_nfet_pass ad=4.375e+10p pd=920000u as=1.68e+10p ps=520000u w=140000u l=150000u |
| X1 a_16_104# a_16_182# VGND VNB sky130_fd_pr__special_nfet_latch ad=1.56e+11p pd=2.38e+06u as=8.08e+10p ps=1.28e+06u w=210000u l=150000u |
| X2 BL WL a_16_104# VNB sky130_fd_pr__special_nfet_pass ad=1.68e+10p pd=520000u as=4.25e+10p ps=920000u w=140000u l=150000u |
| X3 a_16_104# WL a_16_104# VPB sky130_fd_pr__special_pfet_pass ad=3.5e+10p pd=780000u as=0p ps=0u w=70000u l=95000u |
| X4 a_16_182# a_0_24# a_16_182# VPB sky130_fd_pr__special_pfet_pass ad=3.32e+10p pd=720000u as=0p ps=0u w=70000u l=95000u |
| X5 VPWR a_16_104# a_16_182# VPB sky130_fd_pr__special_pfet_pass ad=6.4e+10p pd=1.14e+06u as=0p ps=0u w=140000u l=150000u |
| X6 a_16_104# a_16_182# VPWR VPB sky130_fd_pr__special_pfet_pass ad=0p pd=0u as=0p ps=0u w=140000u l=150000u |
| X7 VGND a_16_104# a_16_182# VNB sky130_fd_pr__special_nfet_latch ad=0p pd=0u as=0p ps=0u w=210000u l=150000u |
| .ends |
| * NGSPICE file created from sky130_fd_bd_sram__sram_sp_cell_opt1a.ext - technology: sky130A |
| |
| .subckt sky130_fd_bd_sram__sram_sp_cell_opt1a BL BR VGND VPWR VPB VNB WL |
| X0 a_16_182# WL BR VNB sky130_fd_pr__special_nfet_pass ad=4.375e+10p pd=920000u as=1.68e+10p ps=520000u w=140000u l=150000u |
| X1 a_16_104# a_16_182# VGND VNB sky130_fd_pr__special_nfet_latch ad=1.56e+11p pd=2.38e+06u as=8.08e+10p ps=1.28e+06u w=210000u l=150000u |
| X2 BL a_0_262# a_16_104# VNB sky130_fd_pr__special_nfet_pass ad=1.68e+10p pd=520000u as=4.25e+10p ps=920000u w=140000u l=150000u |
| X3 a_16_104# a_0_262# a_16_104# VPB sky130_fd_pr__special_pfet_pass ad=3.5e+10p pd=780000u as=0p ps=0u w=70000u l=95000u |
| X4 a_16_182# WL a_16_182# VPB sky130_fd_pr__special_pfet_pass ad=3.32e+10p pd=720000u as=0p ps=0u w=70000u l=95000u |
| X5 VPWR a_16_104# a_16_182# VPB sky130_fd_pr__special_pfet_pass ad=6.4e+10p pd=1.14e+06u as=0p ps=0u w=140000u l=150000u |
| X6 a_16_104# a_16_182# VPWR VPB sky130_fd_pr__special_pfet_pass ad=0p pd=0u as=0p ps=0u w=140000u l=150000u |
| X7 VGND a_16_104# a_16_182# VNB sky130_fd_pr__special_nfet_latch ad=0p pd=0u as=0p ps=0u w=210000u l=150000u |
| .ends |
| * NGSPICE file created from sky130_fd_bd_sram__sram_sp_wlstrap.ext - technology: sky130A |
| |
| .subckt sky130_fd_bd_sram__sram_sp_wlstrap VPWR |
| .ends |
| * NGSPICE file created from sky130_fd_bd_sram__sram_sp_wlstrap_p.ext - technology: sky130A |
| |
| .subckt sky130_fd_bd_sram__sram_sp_wlstrap_p VGND |
| .ends |
| * NGSPICE file created from sky130_fd_bd_sram__sram_sp_wlstrapa.ext - technology: sky130A |
| |
| .subckt sky130_fd_bd_sram__sram_sp_wlstrapa VPWR |
| .ends |
| |
| .SUBCKT sky130_bitcell_array bl_0_0 br_0_0 bl_0_1 br_0_1 bl_0_2 br_0_2 bl_0_3 br_0_3 bl_0_4 br_0_4 bl_0_5 br_0_5 bl_0_6 br_0_6 bl_0_7 br_0_7 bl_0_8 br_0_8 bl_0_9 br_0_9 bl_0_10 br_0_10 bl_0_11 br_0_11 bl_0_12 br_0_12 bl_0_13 br_0_13 bl_0_14 br_0_14 bl_0_15 br_0_15 bl_0_16 br_0_16 bl_0_17 br_0_17 bl_0_18 br_0_18 bl_0_19 br_0_19 bl_0_20 br_0_20 bl_0_21 br_0_21 bl_0_22 br_0_22 bl_0_23 br_0_23 bl_0_24 br_0_24 bl_0_25 br_0_25 bl_0_26 br_0_26 bl_0_27 br_0_27 bl_0_28 br_0_28 bl_0_29 br_0_29 bl_0_30 br_0_30 bl_0_31 br_0_31 bl_0_32 br_0_32 bl_0_33 br_0_33 bl_0_34 br_0_34 bl_0_35 br_0_35 bl_0_36 br_0_36 bl_0_37 br_0_37 bl_0_38 br_0_38 bl_0_39 br_0_39 bl_0_40 br_0_40 bl_0_41 br_0_41 bl_0_42 br_0_42 bl_0_43 br_0_43 bl_0_44 br_0_44 bl_0_45 br_0_45 bl_0_46 br_0_46 bl_0_47 br_0_47 bl_0_48 br_0_48 bl_0_49 br_0_49 bl_0_50 br_0_50 bl_0_51 br_0_51 bl_0_52 br_0_52 bl_0_53 br_0_53 bl_0_54 br_0_54 bl_0_55 br_0_55 bl_0_56 br_0_56 bl_0_57 br_0_57 bl_0_58 br_0_58 bl_0_59 br_0_59 bl_0_60 br_0_60 bl_0_61 br_0_61 bl_0_62 br_0_62 bl_0_63 br_0_63 bl_0_64 br_0_64 bl_0_65 br_0_65 bl_0_66 br_0_66 bl_0_67 br_0_67 bl_0_68 br_0_68 bl_0_69 br_0_69 bl_0_70 br_0_70 bl_0_71 br_0_71 bl_0_72 br_0_72 bl_0_73 br_0_73 bl_0_74 br_0_74 bl_0_75 br_0_75 bl_0_76 br_0_76 bl_0_77 br_0_77 bl_0_78 br_0_78 bl_0_79 br_0_79 bl_0_80 br_0_80 bl_0_81 br_0_81 bl_0_82 br_0_82 bl_0_83 br_0_83 bl_0_84 br_0_84 bl_0_85 br_0_85 bl_0_86 br_0_86 bl_0_87 br_0_87 bl_0_88 br_0_88 bl_0_89 br_0_89 bl_0_90 br_0_90 bl_0_91 br_0_91 bl_0_92 br_0_92 bl_0_93 br_0_93 bl_0_94 br_0_94 bl_0_95 br_0_95 bl_0_96 br_0_96 bl_0_97 br_0_97 bl_0_98 br_0_98 bl_0_99 br_0_99 bl_0_100 br_0_100 bl_0_101 br_0_101 bl_0_102 br_0_102 bl_0_103 br_0_103 bl_0_104 br_0_104 bl_0_105 br_0_105 bl_0_106 br_0_106 bl_0_107 br_0_107 bl_0_108 br_0_108 bl_0_109 br_0_109 bl_0_110 br_0_110 bl_0_111 br_0_111 bl_0_112 br_0_112 bl_0_113 br_0_113 bl_0_114 br_0_114 bl_0_115 br_0_115 bl_0_116 br_0_116 bl_0_117 br_0_117 bl_0_118 br_0_118 bl_0_119 br_0_119 bl_0_120 br_0_120 bl_0_121 br_0_121 bl_0_122 br_0_122 bl_0_123 br_0_123 bl_0_124 br_0_124 bl_0_125 br_0_125 bl_0_126 br_0_126 bl_0_127 br_0_127 bl_0_128 br_0_128 wl_0_0 wl_0_1 wl_0_2 wl_0_3 wl_0_4 wl_0_5 wl_0_6 wl_0_7 wl_0_8 wl_0_9 wl_0_10 wl_0_11 wl_0_12 wl_0_13 wl_0_14 wl_0_15 wl_0_16 wl_0_17 wl_0_18 wl_0_19 wl_0_20 wl_0_21 wl_0_22 wl_0_23 wl_0_24 wl_0_25 wl_0_26 wl_0_27 wl_0_28 wl_0_29 wl_0_30 wl_0_31 wl_0_32 wl_0_33 wl_0_34 wl_0_35 wl_0_36 wl_0_37 wl_0_38 wl_0_39 wl_0_40 wl_0_41 wl_0_42 wl_0_43 wl_0_44 wl_0_45 wl_0_46 wl_0_47 wl_0_48 wl_0_49 wl_0_50 wl_0_51 wl_0_52 wl_0_53 wl_0_54 wl_0_55 wl_0_56 wl_0_57 wl_0_58 wl_0_59 wl_0_60 wl_0_61 wl_0_62 wl_0_63 wl_0_64 vdd gnd |
| *.PININFO bl_0_0:B br_0_0:B bl_0_1:B br_0_1:B bl_0_2:B br_0_2:B bl_0_3:B br_0_3:B bl_0_4:B br_0_4:B bl_0_5:B br_0_5:B bl_0_6:B br_0_6:B bl_0_7:B br_0_7:B bl_0_8:B br_0_8:B bl_0_9:B br_0_9:B bl_0_10:B br_0_10:B bl_0_11:B br_0_11:B bl_0_12:B br_0_12:B bl_0_13:B br_0_13:B bl_0_14:B br_0_14:B bl_0_15:B br_0_15:B bl_0_16:B br_0_16:B bl_0_17:B br_0_17:B bl_0_18:B br_0_18:B bl_0_19:B br_0_19:B bl_0_20:B br_0_20:B bl_0_21:B br_0_21:B bl_0_22:B br_0_22:B bl_0_23:B br_0_23:B bl_0_24:B br_0_24:B bl_0_25:B br_0_25:B bl_0_26:B br_0_26:B bl_0_27:B br_0_27:B bl_0_28:B br_0_28:B bl_0_29:B br_0_29:B bl_0_30:B br_0_30:B bl_0_31:B br_0_31:B bl_0_32:B br_0_32:B bl_0_33:B br_0_33:B bl_0_34:B br_0_34:B bl_0_35:B br_0_35:B bl_0_36:B br_0_36:B bl_0_37:B br_0_37:B bl_0_38:B br_0_38:B bl_0_39:B br_0_39:B bl_0_40:B br_0_40:B bl_0_41:B br_0_41:B bl_0_42:B br_0_42:B bl_0_43:B br_0_43:B bl_0_44:B br_0_44:B bl_0_45:B br_0_45:B bl_0_46:B br_0_46:B bl_0_47:B br_0_47:B bl_0_48:B br_0_48:B bl_0_49:B br_0_49:B bl_0_50:B br_0_50:B bl_0_51:B br_0_51:B bl_0_52:B br_0_52:B bl_0_53:B br_0_53:B bl_0_54:B br_0_54:B bl_0_55:B br_0_55:B bl_0_56:B br_0_56:B bl_0_57:B br_0_57:B bl_0_58:B br_0_58:B bl_0_59:B br_0_59:B bl_0_60:B br_0_60:B bl_0_61:B br_0_61:B bl_0_62:B br_0_62:B bl_0_63:B br_0_63:B bl_0_64:B br_0_64:B bl_0_65:B br_0_65:B bl_0_66:B br_0_66:B bl_0_67:B br_0_67:B bl_0_68:B br_0_68:B bl_0_69:B br_0_69:B bl_0_70:B br_0_70:B bl_0_71:B br_0_71:B bl_0_72:B br_0_72:B bl_0_73:B br_0_73:B bl_0_74:B br_0_74:B bl_0_75:B br_0_75:B bl_0_76:B br_0_76:B bl_0_77:B br_0_77:B bl_0_78:B br_0_78:B bl_0_79:B br_0_79:B bl_0_80:B br_0_80:B bl_0_81:B br_0_81:B bl_0_82:B br_0_82:B bl_0_83:B br_0_83:B bl_0_84:B br_0_84:B bl_0_85:B br_0_85:B bl_0_86:B br_0_86:B bl_0_87:B br_0_87:B bl_0_88:B br_0_88:B bl_0_89:B br_0_89:B bl_0_90:B br_0_90:B bl_0_91:B br_0_91:B bl_0_92:B br_0_92:B bl_0_93:B br_0_93:B bl_0_94:B br_0_94:B bl_0_95:B br_0_95:B bl_0_96:B br_0_96:B bl_0_97:B br_0_97:B bl_0_98:B br_0_98:B bl_0_99:B br_0_99:B bl_0_100:B br_0_100:B bl_0_101:B br_0_101:B bl_0_102:B br_0_102:B bl_0_103:B br_0_103:B bl_0_104:B br_0_104:B bl_0_105:B br_0_105:B bl_0_106:B br_0_106:B bl_0_107:B br_0_107:B bl_0_108:B br_0_108:B bl_0_109:B br_0_109:B bl_0_110:B br_0_110:B bl_0_111:B br_0_111:B bl_0_112:B br_0_112:B bl_0_113:B br_0_113:B bl_0_114:B br_0_114:B bl_0_115:B br_0_115:B bl_0_116:B br_0_116:B bl_0_117:B br_0_117:B bl_0_118:B br_0_118:B bl_0_119:B br_0_119:B bl_0_120:B br_0_120:B bl_0_121:B br_0_121:B bl_0_122:B br_0_122:B bl_0_123:B br_0_123:B bl_0_124:B br_0_124:B bl_0_125:B br_0_125:B bl_0_126:B br_0_126:B bl_0_127:B br_0_127:B bl_0_128:B br_0_128:B wl_0_0:I wl_0_1:I wl_0_2:I wl_0_3:I wl_0_4:I wl_0_5:I wl_0_6:I wl_0_7:I wl_0_8:I wl_0_9:I wl_0_10:I wl_0_11:I wl_0_12:I wl_0_13:I wl_0_14:I wl_0_15:I wl_0_16:I wl_0_17:I wl_0_18:I wl_0_19:I wl_0_20:I wl_0_21:I wl_0_22:I wl_0_23:I wl_0_24:I wl_0_25:I wl_0_26:I wl_0_27:I wl_0_28:I wl_0_29:I wl_0_30:I wl_0_31:I wl_0_32:I wl_0_33:I wl_0_34:I wl_0_35:I wl_0_36:I wl_0_37:I wl_0_38:I wl_0_39:I wl_0_40:I wl_0_41:I wl_0_42:I wl_0_43:I wl_0_44:I wl_0_45:I wl_0_46:I wl_0_47:I wl_0_48:I wl_0_49:I wl_0_50:I wl_0_51:I wl_0_52:I wl_0_53:I wl_0_54:I wl_0_55:I wl_0_56:I wl_0_57:I wl_0_58:I wl_0_59:I wl_0_60:I wl_0_61:I wl_0_62:I wl_0_63:I wl_0_64:I vdd:B gnd:B |
| * INOUT : bl_0_0 |
| * INOUT : br_0_0 |
| * INOUT : bl_0_1 |
| * INOUT : br_0_1 |
| * INOUT : bl_0_2 |
| * INOUT : br_0_2 |
| * INOUT : bl_0_3 |
| * INOUT : br_0_3 |
| * INOUT : bl_0_4 |
| * INOUT : br_0_4 |
| * INOUT : bl_0_5 |
| * INOUT : br_0_5 |
| * INOUT : bl_0_6 |
| * INOUT : br_0_6 |
| * INOUT : bl_0_7 |
| * INOUT : br_0_7 |
| * INOUT : bl_0_8 |
| * INOUT : br_0_8 |
| * INOUT : bl_0_9 |
| * INOUT : br_0_9 |
| * INOUT : bl_0_10 |
| * INOUT : br_0_10 |
| * INOUT : bl_0_11 |
| * INOUT : br_0_11 |
| * INOUT : bl_0_12 |
| * INOUT : br_0_12 |
| * INOUT : bl_0_13 |
| * INOUT : br_0_13 |
| * INOUT : bl_0_14 |
| * INOUT : br_0_14 |
| * INOUT : bl_0_15 |
| * INOUT : br_0_15 |
| * INOUT : bl_0_16 |
| * INOUT : br_0_16 |
| * INOUT : bl_0_17 |
| * INOUT : br_0_17 |
| * INOUT : bl_0_18 |
| * INOUT : br_0_18 |
| * INOUT : bl_0_19 |
| * INOUT : br_0_19 |
| * INOUT : bl_0_20 |
| * INOUT : br_0_20 |
| * INOUT : bl_0_21 |
| * INOUT : br_0_21 |
| * INOUT : bl_0_22 |
| * INOUT : br_0_22 |
| * INOUT : bl_0_23 |
| * INOUT : br_0_23 |
| * INOUT : bl_0_24 |
| * INOUT : br_0_24 |
| * INOUT : bl_0_25 |
| * INOUT : br_0_25 |
| * INOUT : bl_0_26 |
| * INOUT : br_0_26 |
| * INOUT : bl_0_27 |
| * INOUT : br_0_27 |
| * INOUT : bl_0_28 |
| * INOUT : br_0_28 |
| * INOUT : bl_0_29 |
| * INOUT : br_0_29 |
| * INOUT : bl_0_30 |
| * INOUT : br_0_30 |
| * INOUT : bl_0_31 |
| * INOUT : br_0_31 |
| * INOUT : bl_0_32 |
| * INOUT : br_0_32 |
| * INOUT : bl_0_33 |
| * INOUT : br_0_33 |
| * INOUT : bl_0_34 |
| * INOUT : br_0_34 |
| * INOUT : bl_0_35 |
| * INOUT : br_0_35 |
| * INOUT : bl_0_36 |
| * INOUT : br_0_36 |
| * INOUT : bl_0_37 |
| * INOUT : br_0_37 |
| * INOUT : bl_0_38 |
| * INOUT : br_0_38 |
| * INOUT : bl_0_39 |
| * INOUT : br_0_39 |
| * INOUT : bl_0_40 |
| * INOUT : br_0_40 |
| * INOUT : bl_0_41 |
| * INOUT : br_0_41 |
| * INOUT : bl_0_42 |
| * INOUT : br_0_42 |
| * INOUT : bl_0_43 |
| * INOUT : br_0_43 |
| * INOUT : bl_0_44 |
| * INOUT : br_0_44 |
| * INOUT : bl_0_45 |
| * INOUT : br_0_45 |
| * INOUT : bl_0_46 |
| * INOUT : br_0_46 |
| * INOUT : bl_0_47 |
| * INOUT : br_0_47 |
| * INOUT : bl_0_48 |
| * INOUT : br_0_48 |
| * INOUT : bl_0_49 |
| * INOUT : br_0_49 |
| * INOUT : bl_0_50 |
| * INOUT : br_0_50 |
| * INOUT : bl_0_51 |
| * INOUT : br_0_51 |
| * INOUT : bl_0_52 |
| * INOUT : br_0_52 |
| * INOUT : bl_0_53 |
| * INOUT : br_0_53 |
| * INOUT : bl_0_54 |
| * INOUT : br_0_54 |
| * INOUT : bl_0_55 |
| * INOUT : br_0_55 |
| * INOUT : bl_0_56 |
| * INOUT : br_0_56 |
| * INOUT : bl_0_57 |
| * INOUT : br_0_57 |
| * INOUT : bl_0_58 |
| * INOUT : br_0_58 |
| * INOUT : bl_0_59 |
| * INOUT : br_0_59 |
| * INOUT : bl_0_60 |
| * INOUT : br_0_60 |
| * INOUT : bl_0_61 |
| * INOUT : br_0_61 |
| * INOUT : bl_0_62 |
| * INOUT : br_0_62 |
| * INOUT : bl_0_63 |
| * INOUT : br_0_63 |
| * INOUT : bl_0_64 |
| * INOUT : br_0_64 |
| * INOUT : bl_0_65 |
| * INOUT : br_0_65 |
| * INOUT : bl_0_66 |
| * INOUT : br_0_66 |
| * INOUT : bl_0_67 |
| * INOUT : br_0_67 |
| * INOUT : bl_0_68 |
| * INOUT : br_0_68 |
| * INOUT : bl_0_69 |
| * INOUT : br_0_69 |
| * INOUT : bl_0_70 |
| * INOUT : br_0_70 |
| * INOUT : bl_0_71 |
| * INOUT : br_0_71 |
| * INOUT : bl_0_72 |
| * INOUT : br_0_72 |
| * INOUT : bl_0_73 |
| * INOUT : br_0_73 |
| * INOUT : bl_0_74 |
| * INOUT : br_0_74 |
| * INOUT : bl_0_75 |
| * INOUT : br_0_75 |
| * INOUT : bl_0_76 |
| * INOUT : br_0_76 |
| * INOUT : bl_0_77 |
| * INOUT : br_0_77 |
| * INOUT : bl_0_78 |
| * INOUT : br_0_78 |
| * INOUT : bl_0_79 |
| * INOUT : br_0_79 |
| * INOUT : bl_0_80 |
| * INOUT : br_0_80 |
| * INOUT : bl_0_81 |
| * INOUT : br_0_81 |
| * INOUT : bl_0_82 |
| * INOUT : br_0_82 |
| * INOUT : bl_0_83 |
| * INOUT : br_0_83 |
| * INOUT : bl_0_84 |
| * INOUT : br_0_84 |
| * INOUT : bl_0_85 |
| * INOUT : br_0_85 |
| * INOUT : bl_0_86 |
| * INOUT : br_0_86 |
| * INOUT : bl_0_87 |
| * INOUT : br_0_87 |
| * INOUT : bl_0_88 |
| * INOUT : br_0_88 |
| * INOUT : bl_0_89 |
| * INOUT : br_0_89 |
| * INOUT : bl_0_90 |
| * INOUT : br_0_90 |
| * INOUT : bl_0_91 |
| * INOUT : br_0_91 |
| * INOUT : bl_0_92 |
| * INOUT : br_0_92 |
| * INOUT : bl_0_93 |
| * INOUT : br_0_93 |
| * INOUT : bl_0_94 |
| * INOUT : br_0_94 |
| * INOUT : bl_0_95 |
| * INOUT : br_0_95 |
| * INOUT : bl_0_96 |
| * INOUT : br_0_96 |
| * INOUT : bl_0_97 |
| * INOUT : br_0_97 |
| * INOUT : bl_0_98 |
| * INOUT : br_0_98 |
| * INOUT : bl_0_99 |
| * INOUT : br_0_99 |
| * INOUT : bl_0_100 |
| * INOUT : br_0_100 |
| * INOUT : bl_0_101 |
| * INOUT : br_0_101 |
| * INOUT : bl_0_102 |
| * INOUT : br_0_102 |
| * INOUT : bl_0_103 |
| * INOUT : br_0_103 |
| * INOUT : bl_0_104 |
| * INOUT : br_0_104 |
| * INOUT : bl_0_105 |
| * INOUT : br_0_105 |
| * INOUT : bl_0_106 |
| * INOUT : br_0_106 |
| * INOUT : bl_0_107 |
| * INOUT : br_0_107 |
| * INOUT : bl_0_108 |
| * INOUT : br_0_108 |
| * INOUT : bl_0_109 |
| * INOUT : br_0_109 |
| * INOUT : bl_0_110 |
| * INOUT : br_0_110 |
| * INOUT : bl_0_111 |
| * INOUT : br_0_111 |
| * INOUT : bl_0_112 |
| * INOUT : br_0_112 |
| * INOUT : bl_0_113 |
| * INOUT : br_0_113 |
| * INOUT : bl_0_114 |
| * INOUT : br_0_114 |
| * INOUT : bl_0_115 |
| * INOUT : br_0_115 |
| * INOUT : bl_0_116 |
| * INOUT : br_0_116 |
| * INOUT : bl_0_117 |
| * INOUT : br_0_117 |
| * INOUT : bl_0_118 |
| * INOUT : br_0_118 |
| * INOUT : bl_0_119 |
| * INOUT : br_0_119 |
| * INOUT : bl_0_120 |
| * INOUT : br_0_120 |
| * INOUT : bl_0_121 |
| * INOUT : br_0_121 |
| * INOUT : bl_0_122 |
| * INOUT : br_0_122 |
| * INOUT : bl_0_123 |
| * INOUT : br_0_123 |
| * INOUT : bl_0_124 |
| * INOUT : br_0_124 |
| * INOUT : bl_0_125 |
| * INOUT : br_0_125 |
| * INOUT : bl_0_126 |
| * INOUT : br_0_126 |
| * INOUT : bl_0_127 |
| * INOUT : br_0_127 |
| * INOUT : bl_0_128 |
| * INOUT : br_0_128 |
| * INPUT : wl_0_0 |
| * INPUT : wl_0_1 |
| * INPUT : wl_0_2 |
| * INPUT : wl_0_3 |
| * INPUT : wl_0_4 |
| * INPUT : wl_0_5 |
| * INPUT : wl_0_6 |
| * INPUT : wl_0_7 |
| * INPUT : wl_0_8 |
| * INPUT : wl_0_9 |
| * INPUT : wl_0_10 |
| * INPUT : wl_0_11 |
| * INPUT : wl_0_12 |
| * INPUT : wl_0_13 |
| * INPUT : wl_0_14 |
| * INPUT : wl_0_15 |
| * INPUT : wl_0_16 |
| * INPUT : wl_0_17 |
| * INPUT : wl_0_18 |
| * INPUT : wl_0_19 |
| * INPUT : wl_0_20 |
| * INPUT : wl_0_21 |
| * INPUT : wl_0_22 |
| * INPUT : wl_0_23 |
| * INPUT : wl_0_24 |
| * INPUT : wl_0_25 |
| * INPUT : wl_0_26 |
| * INPUT : wl_0_27 |
| * INPUT : wl_0_28 |
| * INPUT : wl_0_29 |
| * INPUT : wl_0_30 |
| * INPUT : wl_0_31 |
| * INPUT : wl_0_32 |
| * INPUT : wl_0_33 |
| * INPUT : wl_0_34 |
| * INPUT : wl_0_35 |
| * INPUT : wl_0_36 |
| * INPUT : wl_0_37 |
| * INPUT : wl_0_38 |
| * INPUT : wl_0_39 |
| * INPUT : wl_0_40 |
| * INPUT : wl_0_41 |
| * INPUT : wl_0_42 |
| * INPUT : wl_0_43 |
| * INPUT : wl_0_44 |
| * INPUT : wl_0_45 |
| * INPUT : wl_0_46 |
| * INPUT : wl_0_47 |
| * INPUT : wl_0_48 |
| * INPUT : wl_0_49 |
| * INPUT : wl_0_50 |
| * INPUT : wl_0_51 |
| * INPUT : wl_0_52 |
| * INPUT : wl_0_53 |
| * INPUT : wl_0_54 |
| * INPUT : wl_0_55 |
| * INPUT : wl_0_56 |
| * INPUT : wl_0_57 |
| * INPUT : wl_0_58 |
| * INPUT : wl_0_59 |
| * INPUT : wl_0_60 |
| * INPUT : wl_0_61 |
| * INPUT : wl_0_62 |
| * INPUT : wl_0_63 |
| * INPUT : wl_0_64 |
| * POWER : vdd |
| * GROUND: gnd |
| * rows: 65 cols: 129 |
| Xrow_0_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_0_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_0_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_0_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_0 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_1_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_1_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_1_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_1_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_1 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_2_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_2_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_2_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_2_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_2 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_3_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_3_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_3_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_3_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_3 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_4_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_4_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_4_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_4_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_4 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_5_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_5_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_5_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_5_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_5 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_6_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_6_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_6_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_6_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_6 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_7_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_7_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_7_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_7_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_7 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_8_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_8_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_8_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_8_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_8 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_9_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_9_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_9_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_9_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_9 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_10_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_10_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_10_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_10_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_10 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_11_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_11_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_11_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_11_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_11 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_12_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_12_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_12_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_12_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_12 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_13_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_13_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_13_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_13_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_13 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_14_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_14_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_14_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_14_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_14 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_15_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_15_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_15_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_15_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_15 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_16_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_16_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_16_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_16_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_16 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_17_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_17_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_17_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_17_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_17 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_18_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_18_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_18_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_18_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_18 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_19_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_19_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_19_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_19_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_19 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_20_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_20_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_20_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_20_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_20 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_21_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_21_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_21_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_21_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_21 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_22_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_22_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_22_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_22_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_22 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_23_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_23_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_23_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_23_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_23 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_24_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_24_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_24_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_24_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_24 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_25_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_25_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_25_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_25_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_25 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_26_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_26_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_26_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_26_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_26 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_27_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_27_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_27_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_27_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_27 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_28_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_28_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_28_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_28_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_28 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_29_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_29_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_29_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_29_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_29 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_30_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_30_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_30_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_30_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_30 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_31_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_31_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_31_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_31_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_31 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_32_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_32_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_32_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_32_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_32 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_33_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_33_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_33_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_33_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_33 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_34_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_34_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_34_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_34_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_34 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_35_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_35_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_35_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_35_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_35 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_36_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_36_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_36_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_36_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_36 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_37_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_37_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_37_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_37_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_37 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_38_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_38_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_38_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_38_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_38 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_39_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_39_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_39_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_39_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_39 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_40_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_40_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_40_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_40_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_40 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_41_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_41_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_41_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_41_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_41 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_42_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_42_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_42_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_42_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_42 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_43_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_43_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_43_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_43_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_43 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_44_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_44_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_44_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_44_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_44 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_45_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_45_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_45_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_45_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_45 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_46_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_46_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_46_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_46_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_46 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_47_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_47_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_47_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_47_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_47 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_48_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_48_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_48_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_48_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_48 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_49_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_49_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_49_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_49_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_49 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_50_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_50_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_50_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_50_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_50 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_51_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_51_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_51_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_51_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_51 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_52_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_52_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_52_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_52_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_52 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_53_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_53_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_53_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_53_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_53 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_54_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_54_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_54_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_54_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_54 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_55_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_55_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_55_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_55_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_55 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_56_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_56_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_56_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_56_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_56 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_57_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_57_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_57_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_57_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_57 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_58_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_58_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_58_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_58_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_58 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_59_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_59_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_59_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_59_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_59 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_60_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_117_bitcell bl_0_117 br_0_117 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_117_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_118_bitcell bl_0_118 br_0_118 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_118_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_119_bitcell bl_0_119 br_0_119 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_119_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_120_bitcell bl_0_120 br_0_120 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_120_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_121_bitcell bl_0_121 br_0_121 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_121_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_122_bitcell bl_0_122 br_0_122 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_122_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_123_bitcell bl_0_123 br_0_123 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_123_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_124_bitcell bl_0_124 br_0_124 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_124_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_125_bitcell bl_0_125 br_0_125 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_125_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_126_bitcell bl_0_126 br_0_126 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_126_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap |
| Xrow_60_col_127_bitcell bl_0_127 br_0_127 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_60_col_127_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_60_col_128_bitcell bl_0_128 br_0_128 gnd vdd vpb vnb wl_0_60 sky130_fd_bd_sram__sram_sp_cell_opt1 |
| Xrow_61_col_0_bitcell bl_0_0 br_0_0 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_0_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_1_bitcell bl_0_1 br_0_1 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_1_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_2_bitcell bl_0_2 br_0_2 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_2_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_3_bitcell bl_0_3 br_0_3 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_3_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_4_bitcell bl_0_4 br_0_4 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_4_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_5_bitcell bl_0_5 br_0_5 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_5_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_6_bitcell bl_0_6 br_0_6 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_6_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_7_bitcell bl_0_7 br_0_7 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_7_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_8_bitcell bl_0_8 br_0_8 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_8_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_9_bitcell bl_0_9 br_0_9 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_9_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_10_bitcell bl_0_10 br_0_10 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_10_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_11_bitcell bl_0_11 br_0_11 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_11_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_12_bitcell bl_0_12 br_0_12 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_12_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_13_bitcell bl_0_13 br_0_13 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_13_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_14_bitcell bl_0_14 br_0_14 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_14_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_15_bitcell bl_0_15 br_0_15 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_15_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_16_bitcell bl_0_16 br_0_16 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_16_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_17_bitcell bl_0_17 br_0_17 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_17_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_18_bitcell bl_0_18 br_0_18 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_18_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_19_bitcell bl_0_19 br_0_19 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_19_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_20_bitcell bl_0_20 br_0_20 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_20_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_21_bitcell bl_0_21 br_0_21 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_21_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_22_bitcell bl_0_22 br_0_22 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_22_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_23_bitcell bl_0_23 br_0_23 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_23_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_24_bitcell bl_0_24 br_0_24 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_24_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_25_bitcell bl_0_25 br_0_25 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_25_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_26_bitcell bl_0_26 br_0_26 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_26_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_27_bitcell bl_0_27 br_0_27 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_27_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_28_bitcell bl_0_28 br_0_28 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_28_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_29_bitcell bl_0_29 br_0_29 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_29_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_30_bitcell bl_0_30 br_0_30 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_30_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_31_bitcell bl_0_31 br_0_31 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_31_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_32_bitcell bl_0_32 br_0_32 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_32_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_33_bitcell bl_0_33 br_0_33 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_33_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_34_bitcell bl_0_34 br_0_34 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_34_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_35_bitcell bl_0_35 br_0_35 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_35_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_36_bitcell bl_0_36 br_0_36 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_36_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_37_bitcell bl_0_37 br_0_37 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_37_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_38_bitcell bl_0_38 br_0_38 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_38_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_39_bitcell bl_0_39 br_0_39 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_39_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_40_bitcell bl_0_40 br_0_40 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_40_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_41_bitcell bl_0_41 br_0_41 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_41_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_42_bitcell bl_0_42 br_0_42 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_42_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_43_bitcell bl_0_43 br_0_43 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_43_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_44_bitcell bl_0_44 br_0_44 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_44_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_45_bitcell bl_0_45 br_0_45 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_45_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_46_bitcell bl_0_46 br_0_46 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_46_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_47_bitcell bl_0_47 br_0_47 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_47_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_48_bitcell bl_0_48 br_0_48 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_48_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_49_bitcell bl_0_49 br_0_49 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_49_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_50_bitcell bl_0_50 br_0_50 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_50_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_51_bitcell bl_0_51 br_0_51 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_51_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_52_bitcell bl_0_52 br_0_52 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_52_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_53_bitcell bl_0_53 br_0_53 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_53_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_54_bitcell bl_0_54 br_0_54 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_54_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_55_bitcell bl_0_55 br_0_55 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_55_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_56_bitcell bl_0_56 br_0_56 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_56_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_57_bitcell bl_0_57 br_0_57 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_57_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_58_bitcell bl_0_58 br_0_58 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_58_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_59_bitcell bl_0_59 br_0_59 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_59_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_60_bitcell bl_0_60 br_0_60 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_60_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_61_bitcell bl_0_61 br_0_61 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_61_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_62_bitcell bl_0_62 br_0_62 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_62_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_63_bitcell bl_0_63 br_0_63 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_63_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_64_bitcell bl_0_64 br_0_64 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_64_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_65_bitcell bl_0_65 br_0_65 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_65_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_66_bitcell bl_0_66 br_0_66 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_66_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_67_bitcell bl_0_67 br_0_67 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_67_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_68_bitcell bl_0_68 br_0_68 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_68_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_69_bitcell bl_0_69 br_0_69 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_69_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_70_bitcell bl_0_70 br_0_70 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_70_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_71_bitcell bl_0_71 br_0_71 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_71_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_72_bitcell bl_0_72 br_0_72 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_72_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_73_bitcell bl_0_73 br_0_73 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_73_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_74_bitcell bl_0_74 br_0_74 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_74_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_75_bitcell bl_0_75 br_0_75 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_75_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_76_bitcell bl_0_76 br_0_76 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_76_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_77_bitcell bl_0_77 br_0_77 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_77_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_78_bitcell bl_0_78 br_0_78 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_78_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_79_bitcell bl_0_79 br_0_79 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_79_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_80_bitcell bl_0_80 br_0_80 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_80_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_81_bitcell bl_0_81 br_0_81 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_81_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_82_bitcell bl_0_82 br_0_82 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_82_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_83_bitcell bl_0_83 br_0_83 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_83_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_84_bitcell bl_0_84 br_0_84 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_84_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_85_bitcell bl_0_85 br_0_85 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_85_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_86_bitcell bl_0_86 br_0_86 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_86_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_87_bitcell bl_0_87 br_0_87 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_87_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_88_bitcell bl_0_88 br_0_88 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_88_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_89_bitcell bl_0_89 br_0_89 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_89_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_90_bitcell bl_0_90 br_0_90 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_90_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_91_bitcell bl_0_91 br_0_91 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_91_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_92_bitcell bl_0_92 br_0_92 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_92_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_93_bitcell bl_0_93 br_0_93 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_93_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_94_bitcell bl_0_94 br_0_94 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_94_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_95_bitcell bl_0_95 br_0_95 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_95_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_96_bitcell bl_0_96 br_0_96 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_96_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_97_bitcell bl_0_97 br_0_97 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_97_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_98_bitcell bl_0_98 br_0_98 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_98_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_99_bitcell bl_0_99 br_0_99 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_99_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_100_bitcell bl_0_100 br_0_100 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_100_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_101_bitcell bl_0_101 br_0_101 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_101_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_102_bitcell bl_0_102 br_0_102 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_102_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_103_bitcell bl_0_103 br_0_103 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_103_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_104_bitcell bl_0_104 br_0_104 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_104_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_105_bitcell bl_0_105 br_0_105 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_105_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_106_bitcell bl_0_106 br_0_106 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_106_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_107_bitcell bl_0_107 br_0_107 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_107_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_108_bitcell bl_0_108 br_0_108 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_108_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_109_bitcell bl_0_109 br_0_109 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_109_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_110_bitcell bl_0_110 br_0_110 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_110_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_111_bitcell bl_0_111 br_0_111 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_111_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_112_bitcell bl_0_112 br_0_112 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_112_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_113_bitcell bl_0_113 br_0_113 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_113_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_114_bitcell bl_0_114 br_0_114 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_114_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrapa |
| Xrow_61_col_115_bitcell bl_0_115 br_0_115 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_115_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlstrap_p |
| Xrow_61_col_116_bitcell bl_0_116 br_0_116 gnd vdd vpb vnb wl_0_61 sky130_fd_bd_sram__sram_sp_cell_opt1a |
| Xrow_61_col_116_wlstrap vdd sky130_fd_bd_sram__sram_sp_wlst
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