tree f43cd2b8a8bc597cadadcbaade77e98e59a9d1bb
parent ec3c4bf03909969fefcb22f4f5629f585a9cb06d
author AmoghLonkar <alonkar@ucsc.edu> 1623436642 -0700
committer AmoghLonkar <alonkar@ucsc.edu> 1623436642 -0700

Two input clocks for control module