)]}'
{
  "commit": "a83e12c9840ef3200b9e26b9f251c573f253e329",
  "tree": "971ee2edb48926e0721fb3bb2cc74f2ba7a1c50e",
  "parents": [
    "c9d38d57986fcc257eaabb1723ab1e7195637388"
  ],
  "author": {
    "name": "AmoghLonkar",
    "email": "alonkar@ucsc.edu",
    "time": "Sat Jun 12 10:57:01 2021 -0700"
  },
  "committer": {
    "name": "AmoghLonkar",
    "email": "alonkar@ucsc.edu",
    "time": "Sat Jun 12 10:57:01 2021 -0700"
  },
  "message": "Removed two extra registers to hold dout0,1\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "acde30cd783a776ebdf4332e61b11db137723543",
      "old_mode": 33188,
      "old_path": "verilog/rtl/openram_testchip.v",
      "new_id": "2018741a689552abdee3110f217439f2b0f6df5e",
      "new_mode": 33188,
      "new_path": "verilog/rtl/openram_testchip.v"
    }
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}