)]}'
{
  "commit": "78ec13740b868751b9b5e8b339210561efb5bfdb",
  "tree": "babb1fcfc011617d0b19964434da007693f7dcc2",
  "parents": [
    "7a68107e5da719153a4a7c3fbcab557f0e662a0f"
  ],
  "author": {
    "name": "AmoghLonkar",
    "email": "alonkar@ucsc.edu",
    "time": "Sat Jun 12 16:02:55 2021 -0700"
  },
  "committer": {
    "name": "AmoghLonkar",
    "email": "alonkar@ucsc.edu",
    "time": "Sat Jun 12 16:02:55 2021 -0700"
  },
  "message": "Fixed dual port address bits, set sram DFF to 32 bits, idle SRAM inputs to 1\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "baad2da403f33fa88f2cb2a128aefef6bf235d46",
      "old_mode": 33188,
      "old_path": "verilog/rtl/openram_testchip.v",
      "new_id": "1195e633088696d653654386b04b9d8a0c06666a",
      "new_mode": 33188,
      "new_path": "verilog/rtl/openram_testchip.v"
    }
  ]
}