)]}'
{
  "commit": "785473b0461a10178fb271b1d342b5b016fa0a1c",
  "tree": "9430d9a5586e0e3c433ec6a9117595025c6c0beb",
  "parents": [
    "1450be6ba6397a1426a5ba731b541a2b3aa5477f"
  ],
  "author": {
    "name": "AmoghLonkar",
    "email": "alonkar@ucsc.edu",
    "time": "Fri Jun 18 16:02:24 2021 -0700"
  },
  "committer": {
    "name": "AmoghLonkar",
    "email": "alonkar@ucsc.edu",
    "time": "Fri Jun 18 16:02:24 2021 -0700"
  },
  "message": "Added tests for single port memories. Assert causing errors but still running tests\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "4e75cb5f10139867cca385694542a1bef8fca98d",
      "old_mode": 33188,
      "old_path": "verilog/dv/gpio_test/gpio_test_tb.v",
      "new_id": "6f76576b63209f241ea7db2151d5a3b9dc6f6679",
      "new_mode": 33188,
      "new_path": "verilog/dv/gpio_test/gpio_test_tb.v"
    }
  ]
}