)]}'
{
  "commit": "68cc0a90691e85409bfc7abb65709744010be3f5",
  "tree": "ae54f5bda28c4ee64638130fca360e82f4b805a9",
  "parents": [
    "785acbf6f2458dd140fbe4d0d763893f1c356c0f"
  ],
  "author": {
    "name": "mrg",
    "email": "mrg@ucsc.edu",
    "time": "Fri Jun 25 09:21:20 2021 -0700"
  },
  "committer": {
    "name": "mrg",
    "email": "mrg@ucsc.edu",
    "time": "Fri Jun 25 09:21:20 2021 -0700"
  },
  "message": "Add signal from mgmt to start testing\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b5953036fdebf65b0b119e6cdfd81e41504b26d1",
      "old_mode": 33188,
      "old_path": "verilog/dv/gpio_test/gpio_test.c",
      "new_id": "df13d8fa2a444b85d97d69b2ed4bfb80d642fdd5",
      "new_mode": 33188,
      "new_path": "verilog/dv/gpio_test/gpio_test.c"
    },
    {
      "type": "modify",
      "old_id": "6f4ddf80abb30d57c0cbcb05e70ce0ebf80cbb0e",
      "old_mode": 33188,
      "old_path": "verilog/dv/gpio_test/gpio_test_tb.v",
      "new_id": "e6aae0f22badc00a39f3cae66b415b4560089854",
      "new_mode": 33188,
      "new_path": "verilog/dv/gpio_test/gpio_test_tb.v"
    }
  ]
}